| d04a8d4b33ff316ca4cf961e06c9e312eff8e64f |
|
03-Dec-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Use the new script to sort the includes of every file under lib.
Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.
Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| 39834da697e5a6d0198a6a802133ce351c871904 |
|
27-Nov-2012 |
Manman Ren <mren@apple.com> |
CSE: allow PerformTrivialCoalescing to check copies across basic block
boundaries.
Given the following case:
BB0
%vreg1<def> = SUBrr %vreg0, %vreg7
%vreg2<def> = COPY %vreg7
BB1
%vreg10<def> = SUBrr %vreg0, %vreg2
We should be able to CSE between SUBrr in BB0 and SUBrr in BB1.
rdar://12462006
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168717 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| bb8ddc7e4ff1f06c7289865bbf9e1fa4632d1c8e |
|
26-Nov-2012 |
Jakub Staszak <kubastaszak@gmail.com> |
Don't use iterator after being erased.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168622 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| b64e2115de3b293ef706b75f040277477c949208 |
|
13-Nov-2012 |
Ulrich Weigand <ulrich.weigand@de.ibm.com> |
Do not consider a machine instruction that uses and defines the same
physical register as candidate for common subexpression elimination
in MachineCSE.
This fixes a bug on PowerPC in MultiSource/Applications/oggenc/oggenc
caused by MachineCSE invalidly merging two separate DYNALLOC insns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167855 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| feab72c20acc97f8942148189c06e443b29df841 |
|
16-Oct-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove unused BitVectors from getAllocatableSet().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165999 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| fb9ebbf236974beac31705eaeb9f50ab585af6ab |
|
15-Oct-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Switch most getReservedRegs() clients to the MRI equivalent.
Using the cached bit vector in MRI avoids comstantly allocating and
recomputing the reserved register bit vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165983 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| 5fa2d458af8522a0fc3c6c93227d8cb3c0dc2862 |
|
11-Aug-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
MachineCSE: Hoist isConstantPhysReg out of the loop, it checks for overlaps already.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161729 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| cfc0ad6e48fcbb5d9d7d97307e5b5df6bba53a97 |
|
11-Aug-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
PR13578: Teach MachineCSE that instructions that use a constant register can be CSE'd safely.
This is common e.g. when doing rip-relative addressing on x86_64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161728 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| 39ad568c62f5120faec29f69d3d614303a1f992d |
|
08-Aug-2012 |
Manman Ren <mren@apple.com> |
X86: enable CSE between CMP and SUB
We perform the following:
1> Use SUB instead of CMP for i8,i16,i32 and i64 in ISel lowering.
2> Modify MachineCSE to correctly handle implicit defs.
3> Convert SUB back to CMP if possible at peephole.
Removed pattern matching of (a>b) ? (a-b):0 and like, since they are handled
by peephole now.
rdar://11873276
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161462 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| ba86b13ad9cd6a9707a954598863da1e2a9f773b |
|
07-Aug-2012 |
Manman Ren <mren@apple.com> |
MachineCSE: Update the heuristics for isProfitableToCSE.
If the result of a common subexpression is used at all uses of the candidate
expression, CSE should not increase the live range of the common subexpression.
rdar://11393714 and rdar://11819721
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161396 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| 96cb1128528a512f1ef9c28ae5e1b78a98dcc505 |
|
19-Jul-2012 |
Bill Wendling <isanbard@gmail.com> |
Remove tabs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160475 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| 7a7a6db6d79b53fdf01bbd9519e669424c3ea7a0 |
|
05-Jul-2012 |
Nick Lewycky <nicholas@mxc.ca> |
Remove ParentMap. You can just ask the domnode for its parent. No functionality
change.
Move the "Not profitable, avoid CSE!" debug message next to where we fail the
check for profitability and use a different message for avoiding CSE due to
being in different register classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159729 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| f152fe8d487c46873bbdd4abab43200f783e978b |
|
01-Jun-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Switch some getAliasSet clients to MCRegAliasIterator.
MCRegAliasIterator can optionally visit the register itself, allowing
for simpler code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157837 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| e4fd907e72a599eddfa7a81eac4366b5b82523e3 |
|
04-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Use uint16_t to store register overlaps to reduce static data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152001 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| 2129a0f6773b3625ddc5d541fe454a9a923cec2a |
|
28-Feb-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Handle regmasks in MachineCSE.
Don't attempt to extend physreg live ranges across calls.
<rdar://problem/10942095>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151610 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| c2e08db4e5a8e1b3c253fb07c6eb736dfb66fe59 |
|
17-Feb-2012 |
Lang Hames <lhames@gmail.com> |
Re-enable 150652 and 150654 - Make FPSCR non-reserved, and make MachineCSE bail on reserved registers. This *should* be safe as of r150786.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150769 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| 1834df8384354217c59e1c5dd8bc091c11b8ca43 |
|
16-Feb-2012 |
Lang Hames <lhames@gmail.com> |
Oop - r150653 + r150654 broke one of my test cases. Backing out for now...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150655 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| f7e31b9e81da165da0e18895713385af73e3b5ee |
|
16-Feb-2012 |
Lang Hames <lhames@gmail.com> |
MachineCSE shouldn't extend the live ranges of reserved or allocatable registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150653 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| 1dd8c8560d45d36a8e507cd014352f1d313f9f9e |
|
08-Feb-2012 |
Andrew Trick <atrick@apple.com> |
Codegen pass definition cleanup. No functionality.
Moving toward a uniform style of pass definition to allow easier target configuration.
Globally declare Pass ID.
Globally declare pass initializer.
Use INITIALIZE_PASS consistently.
Add a call to the initializer from CodeGen.cpp.
Remove redundant "createPass" functions and "getPassName" methods.
While cleaning up declarations, cleaned up comments (sorry for large diff).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150100 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| 1df91b0e54bc62f8fc7a06a4f75220e40aa2dfe0 |
|
08-Feb-2012 |
Andrew Trick <atrick@apple.com> |
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150094 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| 5b8a1db7ea6510a2589f710d50754599da742de9 |
|
05-Feb-2012 |
Duncan Sands <baldrick@free.fr> |
Persuade GCC that there is nothing worth warning about here (there isn't).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149834 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| f96703e62f2302cfe2465fb0fddaf62259eee62c |
|
11-Jan-2012 |
Evan Cheng <evan.cheng@apple.com> |
Avoid CSE of instructions which define physical registers across MBBs unless
the physical registers are not allocatable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147902 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| 97b5beb7fe7bb776654b04ae6c18af6ea15c74f7 |
|
10-Jan-2012 |
Evan Cheng <evan.cheng@apple.com> |
Allow machine-cse to look across MBB boundary when cse'ing instructions that
define physical registers. It's currently very restrictive, only catching
cases where the CE is in an immediate (and only) predecessor. But it catches
a surprising large number of cases.
rdar://10660865
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147827 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| 5a96b3dad2f634c9081c8b2b6c2575441dc5a2bd |
|
07-Dec-2011 |
Evan Cheng <evan.cheng@apple.com> |
Add bundle aware API for querying instruction properties and switch the code
generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.
For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146026 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| f6fb7ed53c786228445fc55e8d495ccead59b9ae |
|
13-Oct-2011 |
Bill Wendling <isanbard@gmail.com> |
We need to verify that the machine instruction we're using as a replacement for
our current machine instruction defines a register with the same register class
as what's being replaced. This showed up in the SPEC 403.gcc benchmark, where it
would ICE because a tail call was expecting one register class but was given
another. (The machine instruction verifier catches this situation.)
<rdar://problem/10270968>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141830 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| e837dead3c8dc3445ef6a0e2322179c57e264a13 |
|
28-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134021 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| 5e926ac651ac497ab782439a3a42840d0ef6f57c |
|
06-May-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Re-revert r130877; it's apparently causing a regression on 197.parser,
possibly related to cbnz formation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130977 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| 5f6bf5d44138a3537822ac057cd7576375c94df1 |
|
05-May-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Minor correction to r130877; fixes PR9846 and hopefully the buildbot failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130925 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| baf717a08a0bc8cb0a7931ea3ce51d063a8fe6f0 |
|
05-May-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Re-commit r130862 with a minor change to avoid an iterator running off the edge in some cases.
Original message:
Teach MachineCSE how to do simple cross-block CSE involving physregs. This allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130877 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| 24d4c9911e7707eb0c35872f33c8ca01b3edcd7f |
|
04-May-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Back out r130862; it appears to be breaking bootstrap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130867 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| 49cec1d818d0c7d801e786c458896a60eb424524 |
|
04-May-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Teach MachineCSE how to do simple cross-block CSE involving physregs. This allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130862 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| cfea985f5319991fcb1feac3e66f645da4a0b507 |
|
11-Apr-2011 |
Evan Cheng <evan.cheng@apple.com> |
Fix a couple of places where changes are made but not tracked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129287 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| 622a11bc0764897f6aaf80fe96b3abac6215f06b |
|
10-Jan-2011 |
Chris Lattner <sabre@nondot.org> |
fit in 80 cols and use MBB::isSuccessor instead of a hand
rolled std::find.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123164 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| c9df025e33ac435adb3b3318d237c36ca7cec659 |
|
10-Jan-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.
These functions not longer assert when passed 0, but simply return false instead.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123155 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| c36b7069b42bece963b7e6adf020353ce990ef76 |
|
08-Jan-2011 |
Evan Cheng <evan.cheng@apple.com> |
Do not model all INLINEASM instructions as having unmodelled side effects.
Instead encode llvm IR level property "HasSideEffects" in an operand (shared
with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check
the operand when the instruction is an INLINEASM.
This allows memory instructions to be moved around INLINEASM instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123044 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| 53eeba586dac8a25db63fe02a00ef10feb8b3925 |
|
03-Jan-2011 |
Cameron Zwarich <zwarich@apple.com> |
Use a RecyclingAllocator to allocate values for MachineCSE's ScopedHashTable for
a 28% speedup of MachineCSE time on 403.gcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122735 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| a63cde26ff698284ecdbec357966ca9d69e1d83a |
|
15-Dec-2010 |
Evan Cheng <evan.cheng@apple.com> |
Teach machine cse to commute instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121903 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| 189c1ec4c162ca3d36d9bca803b032eb19de434a |
|
30-Oct-2010 |
Evan Cheng <evan.cheng@apple.com> |
Teach machine cse to eliminate instructions with multiple physreg uses and defs. rdar://8610857.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117745 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| 081c34b725980f995be9080eaec24cd3dfaaf065 |
|
19-Oct-2010 |
Owen Anderson <resistor@mac.com> |
Get rid of static constructors for pass registration. Instead, every pass exposes an initializeMyPassFunction(), which
must be called in the pass's constructor. This function uses static dependency declarations to recursively initialize
the pass's dependencies.
Clients that only create passes through the createFooPass() APIs will require no changes. Clients that want to use the
CommandLine options for passes will need to manually call the appropriate initialization functions in PassInitialization.h
before parsing commandline arguments.
I have tested this with all standard configurations of clang and llvm-gcc on Darwin. It is possible that there are problems
with the static dependencies that will only be visible with non-standard options. If you encounter any crash in pass
registration/creation, please send the testcase to me directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116820 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| 2ab36d350293c77fc8941ce1023e4899df7e3a82 |
|
12-Oct-2010 |
Owen Anderson <resistor@mac.com> |
Begin adding static dependence information to passes, which will allow us to
perform initialization without static constructors AND without explicit initialization
by the client. For the moment, passes are required to initialize both their
(potential) dependencies and any passes they preserve. I hope to be able to relax
the latter requirement in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116334 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| ce665bd2e2b581ab0858d1afe359192bac96b868 |
|
08-Oct-2010 |
Owen Anderson <resistor@mac.com> |
Now with fewer extraneous semicolons!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115996 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| bf4699c56100a0184bbe4fb53937c7204ca1ceb0 |
|
07-Oct-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add MachineRegisterInfo::constrainRegClass and use it in MachineCSE.
This function is intended to be used when inserting a machine instruction that
trivially restricts the legal registers, like LEA requiring a GR32_NOSP
argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115875 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| c2b768f09e108b71348af58f3ab31d0fc6d15dd6 |
|
17-Sep-2010 |
Evan Cheng <evan.cheng@apple.com> |
Machine CSE was forgetting to clear some data structures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114222 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| f437f733484169cf67f7c3e798908bbf27175580 |
|
17-Sep-2010 |
Evan Cheng <evan.cheng@apple.com> |
Fix a potential bug that can cause miscomparison with and without debug info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114220 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| 6542416560589c9cfa6298d2edc73f3350ccf56a |
|
17-Aug-2010 |
Evan Cheng <evan.cheng@apple.com> |
Machine CSE preserves CFG. Pass manager was freeing machineloopinfo after machine cse before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111281 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|
| 90c579de5a383cee278acc3f7e7b9d0a656e6a35 |
|
06-Aug-2010 |
Owen Anderson <resistor@mac.com> |
Reapply r110396, with fixes to appease the Linux buildbot gods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110460 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| 1f74590e9d1b9cf0f1f81a156efea73f76546e05 |
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06-Aug-2010 |
Owen Anderson <resistor@mac.com> |
Revert r110396 to fix buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110410 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| 9ccaf53ada99c63737547c0235baeb8454b04e80 |
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06-Aug-2010 |
Owen Anderson <resistor@mac.com> |
Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static
ID member as the sole unique type identifier. Clean up APIs related to this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110396 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| d13db2c59cc94162d6cf0a04187d408bfef6d4a7 |
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22-Jul-2010 |
Owen Anderson <resistor@mac.com> |
Fix batch of converting RegisterPass<> to INTIALIZE_PASS().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109045 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| 04c528a0c86ddf3d6a70681f72e1b2ec07b0b53a |
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16-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove many calls to TII::isMoveInstr. Targets should be producing COPY anyway.
TII::isMoveInstr is going tobe completely removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108507 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| 0bc25f40402f48ba42fc45403f635b20d90fabb3 |
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08-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Convert EXTRACT_SUBREG to COPY when emitting machine instrs.
EXTRACT_SUBREG no longer appears as a machine instruction. Use COPY instead.
Add isCopy() checks in many places using isMoveInstr() and isExtractSubreg().
The isMoveInstr hook will be removed later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107879 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| 273f7e42994a5bce0614d04d96dbfdf05fd652e5 |
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03-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Detect and handle COPY in many places.
This code is transitional, it will soon be possible to eliminate
isExtractSubreg, isInsertSubreg, and isMoveInstr in most places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107547 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| 2b4e727c6f55a4045a397250648227e2ded6c7d9 |
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05-Jun-2010 |
Evan Cheng <evan.cheng@apple.com> |
Re-apply 105308 with fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105502 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| 3844173f6e5c2d3e309d71d8980e25cca1b9305d |
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03-Jun-2010 |
Bob Wilson <bob.wilson@apple.com> |
Revert 105308.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105399 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| 9d709a8edb696e89b33cd3c2886c8db735b02318 |
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02-Jun-2010 |
Evan Cheng <evan.cheng@apple.com> |
Enable machine cse of instructions which define physical registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105308 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| e81d0105894a7d0cdd9ffb788a10715ed073ac67 |
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22-May-2010 |
Eric Christopher <echristo@apple.com> |
Make this LookAheadLimit, not the uninitialized LookAheadLeft.
Evan please verify!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104408 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| 835810bbf8cd8b5ed92df66127c5aed16d022c74 |
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21-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Allow machine cse to cse instructions which define physical registers. Controlled by option -machine-cse-phys-defs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104385 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| 49b4589978ca181537c8ae694ac4c8d58d27a09a |
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13-May-2010 |
Dan Gohman <gohman@apple.com> |
Add a utility function for conservatively clearing kill flags, and make
use of it in MachineCSE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103726 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| 311569861162c12b78b6c445793d4074aa4e4512 |
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21-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Rewrite machine cse to avoid recursion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101964 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| d6060a4ce94424e0fd7b926d7cb41799b6debe4a |
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20-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101914 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| db8771af286bc84267e7b5bd17eab51cd4ea552f |
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02-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
After trivial coalescing, the MI being visited may have become a copy. Avoid adding it to CSE hash table since copies aren't being considered for CSE and they may be deleted.
rdar://7819990
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100170 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| 2250425d6e44558f9d333a5c7faef33744f561d6 |
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24-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
dbg_value may end a block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99378 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| 112e5e7eff408cb106386a0641db258048bcc836 |
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23-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99319 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| e68ea060c78356253d771e039747fbc06c623646 |
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11-Mar-2010 |
Dale Johannesen <dalej@apple.com> |
Fix debug_value handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98224 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| 2938a00f29dae82e47bf4939bcc8d0ff734ef582 |
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10-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Add a couple more heuristics to neuter machine cse some more.
1. Be careful with cse "cheap" expressions. e.g. constant materialization. Only cse them when the common expression is local or in a direct predecessor. We don't want cse of cheap instruction causing other expressions to be spilled.
2. Watch out for the case where the expression doesn't itself uses a virtual register. e.g. lea of frame object. If the common expression itself is used by copies (common for passing addresses to function calls), don't perform the cse. Since these expressions do not use a register, it creates a live range but doesn't close any, we want to be very careful with increasing register pressure.
Note these are heuristics so machine cse doesn't make register allocator unhappy. Once we have proper live range splitting and re-materialization support in place, these should be evaluated again.
Now machine cse is almost always a win on llvm nightly tests on x86 and x86_64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98121 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| bfc999956315ec0b29b4feb3780dd985e8e3f288 |
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09-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Allow more cross-rc coalescing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98048 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| 1552cccc76c62513a1b38dc1d6fac2c11897cebe |
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09-Mar-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Don't do illegal cross-class coalescing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98044 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| 31f94c7c22cbf59753764bc17130dca6a73c0b4e |
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09-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
- Make the machine cse dumb coalescer (as opposed to the more awesome simple
coalescer) handle sub-register classes.
- Add heuristics to avoid non-profitable cse. Given the current lack of live
range splitting, avoid cse when an expression has PHI use and the would be
new use is in a BB where the expression wasn't already being used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98043 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| 5196018d9cb80a1cc81b95c6365de24f33c5f6bb |
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09-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Don't waste time trying to CSE labels, phis, inline asm. Definitely avoid cse implicit-def for obvious performance reason.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98009 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| 6c3b8ac6c9dfd7687a8097586925c09a84ab3d2e |
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09-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Restrict machine cse to really trivial coalescing. Leave the heavy lifting to a real coalescer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98007 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| 6cc1aeaad23b878fbf252efc3e45fb3a74a646eb |
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06-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Don't update physical register def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97861 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| a5f32cb3d3cab0463c407cfd2c4153d5dea4498d |
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04-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Avoid cse load instructions unless they are known to be invariant loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97747 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| b3958e80324884e3d1c1e198a50f212bae0c3b77 |
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04-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Look ahead a bit to determine if a physical register def that is not marked dead is really alive. This is necessary to catch a lot of common cse opportunities for targets like x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97706 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| 67bda7215b4bc1b3cc9dd80ef5785ac6dd26fb8c |
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04-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Fix a logic error. An instruction that has a live physical register def cannot be CSE'ed, but it *can* be used to replace a common subexpression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97688 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| 05bdcbb1ae48d1d1209173d137d11c35f46abff3 |
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04-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Re-apply r97667 but with a little bit of thought put into the patch. This implements a special DenseMapInfo trait for DenseMap<MachineInstr*> that compare the value of the MachineInstr rather than the pointer value. Since the hashing and equality test functions ignore defs it's useful for doing CSE kind optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97678 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| 319dfa3fb38a0769806b155dbe8fc0af7f8bdb1e |
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03-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Revert 97667. It broke a bunch of tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97673 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| a054ae02fda1886f36b4b51cba8ac8000ed8be8a |
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03-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Move DenseMapInfo for MachineInstr* to MachineInstr.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97667 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| 16b48b8a05d6881b575846fe42fad9a0c75b8a53 |
|
03-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Machine CSE work in progress. It's doing some CSE now. But implicit def of physical registers are getting in the way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97664 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| 6ba9554988f2efe13c6556c6149aea4846cf415d |
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03-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Work in progress. Finding some cse now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97635 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| c5bbba1e499d46f52364e76ea95d4a37adced676 |
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02-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97577 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
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| c6fe333688519c5a28d1e0f30ecdaa2ad8f1d410 |
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02-Mar-2010 |
Evan Cheng <evan.cheng@apple.com> |
Add skeleton of a machine level cse pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97543 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/MachineCSE.cpp
|