acf2077ca497980a066e8e7bb81ceec0de82d5da |
|
26-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Replace uses of ARMBaseInstrInfo and ARMTargetMachine with the Base versions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153421 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
c1f6f42049696e7357fb4837e1b25dabbaed3fe6 |
|
17-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Reorder includes to match coding standards. Fix an issue or two exposed by that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152978 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
c01810eeb7227010f73cb39e3c4fa0197a3c4ef0 |
|
29-Feb-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM implement TargetInstrInfo::getNoopForMachoTarget() Without this hook, functions w/ a completely empty body (including no epilogue) will cause an MCEmitter assertion failure. For example, define internal fastcc void @empty_function() { unreachable } rdar://10947471 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151673 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
31d157ae1ac2cd9c787dc3c1d28e64c682803844 |
|
18-Feb-2012 |
Jia Liu <proljc@gmail.com> |
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
893d7fe2098cc81ba1b4ce0ed71f6f614843961f |
|
13-Nov-2010 |
Evan Cheng <evan.cheng@apple.com> |
Eliminate ARM::MOVi2pieces. Just use MOVi32imm and expand it to either movi+orr or movw+movt depending on the subtarget. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118938 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
9edf7deb37f0f97664f279040fa15d89f32e23d9 |
|
03-Jun-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Slightly change the meaning of the reMaterialize target hook when the original instruction defines subregisters. Any existing subreg indices on the original instruction are preserved or composed with the new subreg index. Also substitute multiple operands mentioning the original register by using the new MachineInstr::substituteRegister() function. This is necessary because there will soon be <imp-def> operands added to non read-modify-write partial definitions. This instruction: %reg1234:foo = FLAP %reg1234<imp-def> will reMaterialize(%reg3333, bar) like this: %reg3333:bar-foo = FLAP %reg333:bar<imp-def> Finally, replace the TargetRegisterInfo pointer argument with a reference to indicate that it cannot be NULL. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105358 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
864e2efce2cb5d02e376933933d96074723fe77c |
|
05-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of MachineBasicBlock::canFallThrough(), which is target-independent and more thorough. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90634 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
d57cdd5683ea926e489067364fb7ffe5fd5d35ee |
|
14-Nov-2009 |
Evan Cheng <evan.cheng@apple.com> |
- Change TargetInstrInfo::reMaterialize to pass in TargetRegisterInfo. - If destination is a physical register and it has a subreg index, use the sub-register instead. This fixes PR5423. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88745 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
b9803a8fa65f043c96612fa9c5aeeee12739db2b |
|
07-Nov-2009 |
Evan Cheng <evan.cheng@apple.com> |
- Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relative load of a GV from constantpool and then add pc. It allows the code sequence to be rematerializable so it would be hoisted by machine licm. - Add a late pass to break these pseudo instructions into a number of real instructions. Also move the code in Thumb2 IT pass that breaks up t2MOVi32imm to this pass. This is done before post regalloc scheduling to allow the scheduler to proper schedule these instructions. It also allow them to be if-converted and shrunk by later passes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86304 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
f95215f551949d5e5adfbf4753aa833b9009b77a |
|
02-Nov-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Use NEON reg-reg moves, where profitable. This reduces "domain-cross" stalls, when we used to mix vfp and neon code (the former were used for reg-reg moves) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85764 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
f0409ea488ec2cf27daeb192d18e206b11c6360f |
|
04-Aug-2009 |
Evan Cheng <evan.cheng@apple.com> |
Remove ARM specific getInlineAsmLength. We'll rely on the simpler (and faster) generic algorithm for now. If more accurate computation is needed, we'll rely on the disassembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78032 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
d90183d25dcbc0eabde56319fed4e8d6ace2e6eb |
|
02-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
Move the getInlineAsmLength virtual method from TAI to TII, where the only real caller (GetFunctionSizeInBytes) uses it. The custom ARM implementation of this is basically reimplementing an assembler poorly for negligible gain. It should be removed IMNSHO, but I'll leave that to ARMish folks to decide. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77877 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
6495f63945e8dbde81f03a1dc2ab421993b9a495 |
|
28-Jul-2009 |
Evan Cheng <evan.cheng@apple.com> |
- More refactoring. This gets rid of all of the getOpcode calls. - This change also makes it possible to switch between ARM / Thumb on a per-function basis. - Fixed thumb2 routine which expand reg + arbitrary immediate. It was using using ARM so_imm logic. - Use movw and movt to do reg + imm when profitable. - Other code clean ups and minor optimizations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77300 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
5ff58b5c3ab6df332600678798ea5c69c5e943d3 |
|
24-Jul-2009 |
David Goodwin <david_goodwin@apple.com> |
Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index elimination more exactly for Thumb-2 to get better code gen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76919 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
b53cc014d0f47b898c9daca34566c16dda6c4c1e |
|
23-Jul-2009 |
David Goodwin <david_goodwin@apple.com> |
Fix frame index elimination to correctly handle thumb-2 addressing modes that don't allow negative offsets. During frame elimination convert *i12 opcode to a *i8 when necessary due to a negative offset. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76883 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
378445303b10b092a898a75131141a8259cff50b |
|
16-Jul-2009 |
Evan Cheng <evan.cheng@apple.com> |
Let callers decide the sub-register index on the def operand of rematerialized instructions. Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75900 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
334c26473bba3ad8b88341bb0d25d0ac2008bb8d |
|
08-Jul-2009 |
David Goodwin <david_goodwin@apple.com> |
Checkpoint Thumb2 Instr info work. Generalized base code so that it can be shared between ARM and Thumb2. Not yet activated because register information must be generalized first. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75010 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
34a0fa362dde63cf9adf5917ab2ee2c2b7dd2179 |
|
08-Jul-2009 |
Evan Cheng <evan.cheng@apple.com> |
Add a Thumb2 instruction flag to that indicates whether the instruction can be transformed to 16-bit variant. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74988 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
b50ea5c48f8b1ce259e034ca5c16dc14af1a582c |
|
03-Jul-2009 |
David Goodwin <david_goodwin@apple.com> |
Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1InstrInfo, Thumb2InstrInfo, Thumb1RegisterInfo and Thumb2RegisterInfo. Move methods from ARMInstrInfo to ARMBaseInstrInfo to prepare for sharing with Thumb2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74731 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
8b024a5eb5b64b482f7d92aad7a3f0e6cac93f12 |
|
02-Jul-2009 |
Bob Wilson <bob.wilson@apple.com> |
Add a new addressing mode for NEON load/store instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74658 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
f3c21b857b8449bcde35e499ef8268c0fec9514d |
|
30-Jun-2009 |
Evan Cheng <evan.cheng@apple.com> |
A few more load instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74500 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
055b0310f862b91f33699037ce67d3ab8137c20c |
|
29-Jun-2009 |
Evan Cheng <evan.cheng@apple.com> |
Implement Thumb2 ldr. After much back and forth, I decided to deviate from ARM design and split LDR into 4 instructions (r + imm12, r + imm8, r + r << imm12, constantpool). The advantage of this is 1) it follows the latest ARM technical manual, and 2) makes it easier to reduce the width of the instruction later. The down side is this creates more inconsistency between the two sub-targets. We should split ARM LDR instruction in a similar fashion later. I've added a README entry for this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74420 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
a98cbc554ca2cd40426e7c3ff8d1467da32e195d |
|
27-Jun-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
ARM refactoring. Step 2: split RegisterInfo git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74384 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
d49ea77cbc24776142615fecf75f41e191c765bd |
|
26-Jun-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Split thumb-related stuff into separate classes. Step 1: ARMInstructionInfo => {ARM,Thumb}InstructionInfo git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74329 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
5bafff36c798608a189c517d37527e4a38863071 |
|
23-Jun-2009 |
Bob Wilson <bob.wilson@apple.com> |
Add support for ARM's Advanced SIMD (NEON) instruction set. This is still a work in progress but most of the NEON instruction set is supported. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73919 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
dc54d317e7a381ef8e4aca80d54ad1466bb85dda |
|
09-Feb-2009 |
Evan Cheng <evan.cheng@apple.com> |
Turns out AnalyzeBranch can modify the mbb being analyzed. This is a nasty suprise to some callers, e.g. register coalescer. For now, add an parameter that tells AnalyzeBranch whether it's safe to modify the mbb. A better solution is out there, but I don't have time to deal with it right now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64124 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
770bcc7b15adbc978800db70dbb1c3c22913b52c |
|
06-Feb-2009 |
Evan Cheng <evan.cheng@apple.com> |
Move getPointerRegClass from TargetInstrInfo to TargetRegisterInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63938 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
04ee5a1d9267e5e6fab8f088095fcb83c3c5cbd1 |
|
20-Jan-2009 |
Evan Cheng <evan.cheng@apple.com> |
Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62600 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
c54baa2d43730f1804acfb4f4e738fba72f966bd |
|
03-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Split foldMemoryOperand into public non-virtual and protected virtual parts, and add target-independent code to add/preserve MachineMemOperands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60488 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
cbad42cfd1cc93a41ff26ea2e8895bfbc09f54f2 |
|
18-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Add more const qualifiers. This fixes build breakage from r59540. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59542 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
ffa6d962a7d75500269ce5d2012b58249fee3d6d |
|
14-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
Handle the rest of pseudo instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59275 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
148cad8b308c0f8fdb37b368f2c911861dd2421a |
|
13-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix pre- and post-indexed load / store encoding bugs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59230 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
706329143d0cbe83684275417c514725aab773e9 |
|
12-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix address mode 3 immediate offset mode encoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59109 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
3c4a4ffa3dba5e3c7a0900d0bafe28d7095f3ada |
|
12-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
Consolidate formats; fix FCMPED etc. encodings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59107 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
80a119842da2ce2786ea476037001ab5b6c67046 |
|
12-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix VFP conversion instruction encodings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59104 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
0a0ab1387a3923769990e91cce8e098366c4a920 |
|
11-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix FMDRR encoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59088 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
cd8e66a1efdb31f0514270387207fb8c63bae4ed |
|
11-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
Encode VFP load / store instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59084 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
78be83d7c2a5b94e635b0227924a489b8d8937e8 |
|
11-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
Encode VFP conversion instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59074 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
96581d3633edf702b14a60472a1ec5354f327c18 |
|
11-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
Encode VFP arithmetic instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59016 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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8b59db3f2c72a642251d4f86ea61f5d27e8919a6 |
|
07-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
Encode misc arithmetic instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58828 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
97f48c39fd158ad1a701002e2d6798c4b4ae4ab8 |
|
06-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
Encode extend instructions; more clean up. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58818 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
12c3a533c50fe3c7475c1ff7c1bb4b26e36dc6c3 |
|
06-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
- Improve naming consistency: Branch -> BrFrm, BranchMisc -> BrMiscFrm. - Consolidate instruction formats. - Other clean up. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58808 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
d87293ce78ae7568477374cd83b22c84214316fb |
|
06-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
Remove opcode from instruction TS flags; add MOVCC support; fix addrmode3 encoding bug. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58800 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
eb4f52eb6287919fe2bdca62364046af800cd15d |
|
06-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
Handle smul<x><y>, smulw<y>, smla<x><y>, smlaw<y>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58793 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
fbc9d412efdfa1ed30ff4d2baedc775a5f59c638 |
|
06-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix encoding of multiple instructions with 3 src operands; also handle smmul, smmla, and smmls. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58789 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
edda31c412d524531ee6cd3f2d21c2ef85b6afb0 |
|
05-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
Restructure ARM code emitter to use instruction formats instead of addressing modes to determine how to encode instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58764 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
0a4b9dc9b127c3fae6069f85a7858db5a06ff3a8 |
|
03-Nov-2008 |
Jim Grosbach <grosbach@apple.com> |
Add binary encoding support for multiply instructions. Some blanks left to fill in, but the basics are there. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58626 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
8e8b8a223c2b0e69f44c0639f846260c8011668f |
|
16-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Const-ify several TargetInstrInfo methods. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57622 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
cbc47b89340c8ab995453f2b18ff237c1303e89d |
|
07-Oct-2008 |
Jim Grosbach <grosbach@apple.com> |
need ARM.h for ARMCC definition git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57261 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|
3341262de27dad5e1f983fe072a749356a8f3c78 |
|
07-Oct-2008 |
Jim Grosbach <grosbach@apple.com> |
Encode the conditional execution predicate when JITing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57258 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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05fc9664018f867b2184589e8a04cc8f056cfa16 |
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13-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
Revert 56176. All those instruction formats are still needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56180 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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a964b7dffe89d22569e96f5801886ef347d01b0a |
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13-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
Eliminate unnecessary instruction formats. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56176 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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5f1db7bf31eec999a55845f91778143b8b3e0aec |
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13-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
Rewrite address mode 1 code emission routines. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56171 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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940f83e772ca2007d62faffc83094bd7e8da6401 |
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26-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested was inserted or not. This allows bitcast in fast isel to properly handle the case where an appropriate reg-to-reg copy is not available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55375 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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44eb65cf58e3ab9b5621ce72256d1621a18aeed7 |
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15-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Convert uses of std::vector in TargetInstrInfo to SmallVector. This change had to be propoagated down into all the targets and up into all clients of this API. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54802 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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f660c171c838793b87b7e58e91609cecf256378d |
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03-Jul-2008 |
Owen Anderson <resistor@mac.com> |
Make LiveVariables even more optional, by making it optional in the call to TargetInstrInfo::convertToThreeAddressInstruction Also, if LV isn't around, then TwoAddr doesn't need to be updating flags, since they won't have been set in the first place. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53058 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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c9f5f3f64f896d0a8c8fa35a1dd98bc57b8960f6 |
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14-May-2008 |
Dan Gohman <gohman@apple.com> |
Change target-specific classes to use more precise static types. This eliminates the need for several awkward casts, including the last dynamic_cast under lib/Target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51091 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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52e724ad7e679ee590f4bd763d55280586a8f1bc |
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16-Apr-2008 |
Nicolas Geoffray <nicolas.geoffray@lip6.fr> |
Infrastructure for getting the machine code size of a function and an instruction. X86, PowerPC and ARM are implemented git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49809 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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ca1267c02b025cc719190b05f9e1a5d174a9caf7 |
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31-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48995 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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950a4c40b823cd4f09dc71be635229246dfd6cac |
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25-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Add explicit keywords. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48801 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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6f0d024a534af18d9e60b3ea757376cd8a3a980e |
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10-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Rename MRegisterInfo to TargetRegisterInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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5fd79d0560570fed977788a86fa038b898564dfa |
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08-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46893 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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43dbe05279b753aabda571d9c83eaeb36987001a |
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07-Jan-2008 |
Owen Anderson <resistor@mac.com> |
Move even more functionality from MRegisterInfo into TargetInstrInfo. Some day I'll get it all moved over... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45672 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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d94b6a16fec7d5021e3922b0e34f9ddb268d54b1 |
|
05-Jan-2008 |
Owen Anderson <resistor@mac.com> |
Move some more functionality from MRegisterInfo to TargetInstrInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45603 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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f6372aa1cc568df19da7c5023e83c75aa9404a07 |
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01-Jan-2008 |
Owen Anderson <resistor@mac.com> |
Move some more instruction creation methods from RegisterInfo into InstrInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45484 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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641055225092833197efe8e5bce01d50bcf1daae |
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01-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Fix a problem where lib/Target/TargetInstrInfo.h would include and use a header file from libcodegen. This violates a layering order: codegen depends on target, not the other way around. The fix to this is to split TII into two classes, TII and TargetInstrInfoImpl, which defines stuff that depends on libcodegen. It is defined in libcodegen, where the base is not. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45475 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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d10fd9791c20fd8368fa0ce94b626b769c6c8ba0 |
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31-Dec-2007 |
Owen Anderson <resistor@mac.com> |
Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the Machine-level API cleanup instigated by Chris. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45470 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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4ee451de366474b9c228b4e5fa573795a715216d |
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29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Remove attribution from file headers, per discussion on llvmdev. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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a4c791072f65b44b069a8acf17f85a3849cfb36d |
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18-Oct-2007 |
Christopher Lamb <christopher.lamb@gmail.com> |
Fix a misnamed parameter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43145 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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8c132633c86a7e496f84e3458c47520d0cc4d938 |
|
31-Aug-2007 |
Raul Herbster <raulherbster@gmail.com> |
Instruction formats added used to generate multiply instructions of V5TE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41629 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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0ff94f7fcc95112331ee0f4f3d31c90acb9f2952 |
|
07-Aug-2007 |
Evan Cheng <evan.cheng@apple.com> |
Initial JIT support for ARM by Raul Fernandes Herbster. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40887 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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13ab020ea08826f1b87db6ec3da63889a12e3d9d |
|
10-Jul-2007 |
Evan Cheng <evan.cheng@apple.com> |
Remove clobbersPred. Add an OptionalDefOperand to instructions which have the 's' bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38501 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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d45eddd214061bf12ad1e6b86497a41725e61d75 |
|
26-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Revert the earlier change that removed the M_REMATERIALIZABLE machine instruction flag, and use the flag along with a virtual member function hook for targets to override if there are instructions that are only trivially rematerializable with specific operands (i.e. constant pool loads). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37728 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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82a87a01723c095176c6940bcc63d3a7c8007b4b |
|
19-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad with a general target hook to identify rematerializable instructions. Some instructions are only rematerializable with specific operands, such as loads from constant pools, while others are always rematerializable. This hook allows both to be identified as being rematerializable with the same mechanism. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37644 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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eaa91b0a1fc68984aae51f3c4b0cf29b38f89dac |
|
19-Jun-2007 |
Evan Cheng <evan.cheng@apple.com> |
Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37643 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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d42e56e166761d79201f09eeb4ab782e3097bfcd |
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15-Jun-2007 |
Evan Cheng <evan.cheng@apple.com> |
Instructions with unique labels or embedded jumptables cannot be duplicated during ifcvt. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37606 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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62ccdbf0b3b75661bcdb20476609fece499c767f |
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29-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Add missing const qualifiers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37342 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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69d555611aa1b7e45fc1b3719bfcb17a39dff9f3 |
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23-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Hooks for predication support. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37308 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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6ae3626a4fda14e6250ac8d8ff487efb8952cdf7 |
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18-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37193 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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02c602b333ed2a1a13a17981f3c3f2f5463d5e5c |
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16-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
PredicateInstruction returns true if the operation was successful. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37124 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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b5f8eff566ab35a15dcd5bf490047c7ccfcecce0 |
|
16-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Removed isPredicable(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37119 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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9307292ae27c125a10eabccb5a437200d831a55f |
|
16-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Hooks for predication support. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37093 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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29836c330ff33e3c6a250a89b3e78abb3a1970c9 |
|
30-Jan-2007 |
Evan Cheng <evan.cheng@apple.com> |
Factor GetInstSize() out of constpool island pass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33644 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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1ee29257428960fede862fcfdbe80d5d007927e9 |
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26-Jan-2007 |
Jim Laskey <jlaskey@mac.com> |
Make LABEL a builtin opcode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33537 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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a8e2989ece6dc46df59b0768184028257f913843 |
|
19-Jan-2007 |
Evan Cheng <evan.cheng@apple.com> |
ARM backend contribution from Apple. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33353 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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578e64a041ab2c199d37fd6346eb34b9e9c2e9ed |
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24-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
implement uncond branch insertion, mark branches with isBranch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31160 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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46adf8119df362bfed7c6d71dd467527981b97da |
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08-Aug-2006 |
Rafael Espindola <rafael.espindola@gmail.com> |
change the addressing mode of the str instruction to reg+imm git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29571 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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aefe14299a05621864e6372639f372173a96bf38 |
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10-Jul-2006 |
Rafael Espindola <rafael.espindola@gmail.com> |
create the raddr addressing mode that matches any register and the frame index use raddr for the ldr instruction. This removes a dummy mov from the assembly output remove SelectFrameIndex remove isLoadFromStackSlot remove isStoreToStackSlot git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29079 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
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7bc59bc3952ad7842b1e079753deb32217a768a3 |
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15-May-2006 |
Rafael Espindola <rafael.espindola@gmail.com> |
added a skeleton of the ARM backend git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28301 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/ARMInstrInfo.h
|