d04a8d4b33ff316ca4cf961e06c9e312eff8e64f |
|
03-Dec-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Use the new script to sort the includes of every file under lib. Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
|
a7542d5f870c5d98960d1676e23ac1d1d975d7e5 |
|
06-Jun-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Remove unused private fields found by clang's new -Wunused-private-field. There are some that I didn't remove this round because they looked like obvious stubs. There are dead variables in gtest too, they should be fixed upstream. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158090 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
|
396618b43a85e12d290a90b181c6af5d7c0c5f11 |
|
02-Jun-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Switch all register list clients to the new MC*Iterator interface. No functional change intended. Sorry for the churn. The iterator classes are supposed to help avoid giant commits like this one in the future. The TableGen-produced register lists are getting quite large, and it may be necessary to change the table representation. This makes it possible to do so without changing all clients (again). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157854 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
|
8d813de71e18dd73ed98e8d58407caba0265e38e |
|
28-Mar-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Revert r153516: "Invalidate liveness in Thumb2ITBlockPass." Revert r153519: "ARMLoadStoreOptimizer invalidates register liveness." These patches caused miscompilations in povray by turning off branch folding's updating of live-in lists. It turns out the the late scheduler depends on the live-in lists, even if it doesn't need correct kill flags. <rdar://problem/11139228> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153593 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
|
33fa614b16db175d0687eb34aea3a080d0d237c2 |
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27-Mar-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Invalidate liveness in Thumb2ITBlockPass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153516 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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c89c744b69cecac576317a98322fd295e36e9886 |
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27-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Remove unnecessary llvm:: qualifications git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153500 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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9ebfbf8b9fd5f982e0db9293808bd32168615ba9 |
|
05-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce static data size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152016 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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31d157ae1ac2cd9c787dc3c1d28e64c682803844 |
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18-Feb-2012 |
Jia Liu <proljc@gmail.com> |
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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bca15f9c8059ccb9244853f86593c35ac35c8801 |
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19-Jan-2012 |
Evan Cheng <evan.cheng@apple.com> |
- Slight change to finalizeBundle() interface. LastMI is not exclusive (pointing to instruction right after the last instruction in the bundle. - Add a finalizeBundle() variant that doesn't specify LastMI. Instead, the code will find the last instruction in the bundle by following the 'InsideBundle' marker. This is useful in case bundles are formed early (i.e. during MI scheduling) but finalized later (i.e. after register allocator has finished rewriting virtual registers with physical registers). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148444 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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9b159710ebe8a37cba38ca0c5b465e362bd68af7 |
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19-Jan-2012 |
Evan Cheng <evan.cheng@apple.com> |
Rename Finalizebundle to finalizeBundle to conform to coding guideline. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148440 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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ddfd1377d2e4154d44dc3ad217735adc15af2e3f |
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14-Dec-2011 |
Evan Cheng <evan.cheng@apple.com> |
- Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function to finalize MI bundles (i.e. add BUNDLE instruction and computing register def and use lists of the BUNDLE instruction) and a pass to unpack bundles. - Teach more of MachineBasic and MachineInstr methods to be bundle aware. - Switch Thumb2 IT block to MI bundles and delete the hazard recognizer hack to prevent IT blocks from being broken apart. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146542 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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5a96b3dad2f634c9081c8b2b6c2575441dc5a2bd |
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07-Dec-2011 |
Evan Cheng <evan.cheng@apple.com> |
Add bundle aware API for querying instruction properties and switch the code generator to it. For non-bundle instructions, these behave exactly the same as the MC layer API. For properties like mayLoad / mayStore, look into the bundle and if any of the bundled instructions has the property it would return true. For properties like isPredicable, only return true if *all* of the bundled instructions have the property. For properties like canFoldAsLoad, isCompare, conservatively return false for bundles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146026 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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3f56d4b957b04aaaf3ad27900713ea4d67f3189e |
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11-Oct-2011 |
Bill Wendling <isanbard@gmail.com> |
Simplify check that optional def is there and is CPSR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141602 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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721e1d266902f4d906645b130d1b2a905d75fa31 |
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11-Oct-2011 |
Bill Wendling <isanbard@gmail.com> |
If the CPSR is defined by a copy, then we don't want to merge it into an IT block. E.g., if we have: movs r1, r1 rsb r1, 0 movs r2, r2 rsb r2, 0 we don't want this to be converted to: movs r1, r1 movs r2, r2 itt mi rsb r1, 0 rsb r2, 0 PR11107 & <rdar://problem/10259534> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141589 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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2a7b41ba4d3eb3c6003f6768dc20b28d83eac265 |
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01-Jul-2011 |
Jim Grosbach <grosbach@apple.com> |
Refact ARM Thumb1 tMOVr instruction family. Merge the tMOVr, tMOVgpr2tgpr, tMOVtgpr2gpr, and tMOVgpr2gpr instructions into tMOVr. There's no need to keep them separate. Giving the tMOVr instruction the proper GPR register class for its operands is sufficient to give the register allocator enough information to do the right thing directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134204 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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90c579de5a383cee278acc3f7e7b9d0a656e6a35 |
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06-Aug-2010 |
Owen Anderson <resistor@mac.com> |
Reapply r110396, with fixes to appease the Linux buildbot gods. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110460 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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1f74590e9d1b9cf0f1f81a156efea73f76546e05 |
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06-Aug-2010 |
Owen Anderson <resistor@mac.com> |
Revert r110396 to fix buildbots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110410 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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9ccaf53ada99c63737547c0235baeb8454b04e80 |
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06-Aug-2010 |
Owen Anderson <resistor@mac.com> |
Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static ID member as the sole unique type identifier. Clean up APIs related to this change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110396 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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c66756ba16a3df8b6426aee4ffd9c308f38bea57 |
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17-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use a small local function for a single remaining late isMoveInstr call in Thumb2ITBlockPass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108564 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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dca653951c693edf47437cf0a10d0d0dbb57276d |
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02-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
Remove early IT block formation. It's not used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107513 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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31a3a3ebaf9c28fcfd82b1494a47fb11cc00759b |
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29-Jun-2010 |
Duncan Sands <baldrick@free.fr> |
Remove pointless variable LastDef. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107135 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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e9e3f20ffbb20ebae6c48c3499c9b069f28e28fc |
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28-Jun-2010 |
Jim Grosbach <grosbach@apple.com> |
minor housekeeping cleanup: 80-column, trailing whitespace, spelling, etc.. No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106988 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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e39e06af38281bb8923d28b554a11a74e4eb67b7 |
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26-Jun-2010 |
Daniel Dunbar <daniel@zuster.org> |
Thumb2ITBlockPass: Fix a possible dereference of an invalid iterator. This was introduced in r106343, but only showed up recently (with a particular compiler & linker combination) because of the particular check, and because we have no builtin checking for dereferencing the end of an array, which is truly unfortunate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106908 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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4d54e5b2dd4a3d3bed38ff9c7aa57fc66adb5855 |
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22-Jun-2010 |
Evan Cheng <evan.cheng@apple.com> |
Tail merging pass shall not break up IT blocks. rdar://8115404 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106517 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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859df5e9f9a71213dd7e017683d359131ec2d263 |
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20-Jun-2010 |
Evan Cheng <evan.cheng@apple.com> |
Fix a crash caused by dereference of MBB.end(). rdar://8110842 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106399 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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86050dc8cc0aaea8c9dfeb89de02cafbd7f48d92 |
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19-Jun-2010 |
Evan Cheng <evan.cheng@apple.com> |
Allow ARM if-converter to be run after post allocation scheduling. - This fixed a number of bugs in if-converter, tail merging, and post-allocation scheduler. If-converter now runs branch folding / tail merging first to maximize if-conversion opportunities. - Also changed the t2IT instruction slightly. It now defines the ITSTATE register which is read by instructions in the IT block. - Added Thumb2 specific hazard recognizer to ensure the scheduler doesn't change the instruction ordering in the IT block (since IT mask has been finalized). It also ensures no other instructions can be scheduled between instructions in the IT block. This is not yet enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106344 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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aa4b5429ef0c174dbff52b6e67b78c0a68f2025e |
|
10-Jun-2010 |
Evan Cheng <evan.cheng@apple.com> |
Delete code that's not safe. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105774 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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68fc2daf8fa446be04d2ed2b3cbb1b00c382458f |
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09-Jun-2010 |
Evan Cheng <evan.cheng@apple.com> |
Allow target to place 2-address pass inserted copies in better spots. Thumb2 will use this to try to avoid breaking up IT blocks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105745 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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d84712421121744797210a7814aafce8c5377d92 |
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09-Jun-2010 |
Evan Cheng <evan.cheng@apple.com> |
Thumb2 IT blocks are fairly expensive. When there are multiple selects using the same condition, it's important to make sure they are scheduled together to avoid forming multiple IT blocks. I'm adding a pre-regalloc pass that forms IT blocks early (by re-scheduling instructions and split basic blocks) to attempt to fix this. This is not turned on by default since I am not sure this is the right fix. Another issue is llvm selects are modeled as two-address conditional moves. This can be very bad when the copies before the conditional moves are not coalesced away. Teach IT formation pass to move the copies above the IT block (when legal) to avoid breaking the IT block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105669 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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8077e76f934d575437a55315a0d5fcdcab6d6608 |
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07-Jun-2010 |
Jim Grosbach <grosbach@apple.com> |
Handle dbg_value instructions (i.e., skip them) when generating IT blocks. rdar://7797940 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105557 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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b675e255d0def28e9718c62336be6fd6e7a22e54 |
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18-Mar-2010 |
Johnny Chen <johnny.chen@apple.com> |
Fixed a bug in the IT mask printing where T means the cond bit in the mask matches that of Firstcond[0] and E means otherwise. The Firstcond[0] is also tagged in the Mask to facilitate Asm printing. The disassembler also depends on this arrangement. This is similar to what's described in A2.5.2 ITSTATE. Ran: utils/lit/lit.py test/CodeGen/ARM test/CodeGen/Thumb test/CodeGen/Thumb2 successfully. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98775 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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49d9dc4dd205b615beb7af160ef974eaabe4d1cf |
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16-Mar-2010 |
Bob Wilson <bob.wilson@apple.com> |
--- Reverse-merging r98637 into '.': U test/CodeGen/ARM/tls2.ll U test/CodeGen/ARM/arm-negative-stride.ll U test/CodeGen/ARM/2009-10-30.ll U test/CodeGen/ARM/globals.ll U test/CodeGen/ARM/str_pre-2.ll U test/CodeGen/ARM/ldrd.ll U test/CodeGen/ARM/2009-10-27-double-align.ll U test/CodeGen/Thumb2/thumb2-strb.ll U test/CodeGen/Thumb2/ldr-str-imm12.ll U test/CodeGen/Thumb2/thumb2-strh.ll U test/CodeGen/Thumb2/thumb2-ldr.ll U test/CodeGen/Thumb2/thumb2-str_pre.ll U test/CodeGen/Thumb2/thumb2-str.ll U test/CodeGen/Thumb2/thumb2-ldrh.ll U utils/TableGen/TableGen.cpp U utils/TableGen/DisassemblerEmitter.cpp D utils/TableGen/RISCDisassemblerEmitter.h D utils/TableGen/RISCDisassemblerEmitter.cpp U Makefile.rules U lib/Target/ARM/ARMInstrNEON.td U lib/Target/ARM/Makefile U lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp U lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp U lib/Target/ARM/AsmPrinter/ARMInstPrinter.h D lib/Target/ARM/Disassembler U lib/Target/ARM/ARMInstrFormats.td U lib/Target/ARM/ARMAddressingModes.h U lib/Target/ARM/Thumb2ITBlockPass.cpp git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98640 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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d30a98e43ae18e1fc70a7dc748edf669d809c685 |
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16-Mar-2010 |
Johnny Chen <johnny.chen@apple.com> |
Initial ARM/Thumb disassembler check-in. It consists of a tablgen backend (RISCDisassemblerEmitter) which emits the decoder functions for ARM and Thumb, and the disassembler core which invokes the decoder function and builds up the MCInst based on the decoded Opcode. Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm instructions to help disassembly. We also changed the output of the addressing modes to omit the '+' from the assembler syntax #+/-<imm> or +/-<Rm>. See, for example, A8.6.57/58/60. And modified test cases to not expect '+' in +reg or #+num. For example, ; CHECK: ldr.w r9, [r7, #28] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98637 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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31c24bf5b39cc8391d4cfdbf8cf5163975fdb81e |
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07-Nov-2009 |
Jim Grosbach <grosbach@apple.com> |
80-column cleanup of file header comments git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86408 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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b9803a8fa65f043c96612fa9c5aeeee12739db2b |
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07-Nov-2009 |
Evan Cheng <evan.cheng@apple.com> |
- Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relative load of a GV from constantpool and then add pc. It allows the code sequence to be rematerializable so it would be hoisted by machine licm. - Add a late pass to break these pseudo instructions into a number of real instructions. Also move the code in Thumb2 IT pass that breaks up t2MOVi32imm to this pass. This is done before post regalloc scheduling to allow the scheduler to proper schedule these instructions. It also allow them to be if-converted and shrunk by later passes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86304 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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f5a86f45e75ec744c203270ffa03659eb0a220c1 |
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25-Oct-2009 |
Nick Lewycky <nicholas@mxc.ca> |
Remove includes of Support/Compiler.h that are no longer needed after the VISIBILITY_HIDDEN removal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85043 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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6726b6d75a8b679068a58cb954ba97cf9d1690ba |
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25-Oct-2009 |
Nick Lewycky <nicholas@mxc.ca> |
Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces. Chris claims we should never have visibility_hidden inside any .cpp file but that's still not true even after this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85042 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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452b54a8aebee45088b2157a66ae0f9f6a9088fa |
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16-Oct-2009 |
Sandeep Patel <deeppatel1987@gmail.com> |
Branches must be the last instruction in a Thumb2 IT block. Approved by Evan Cheng. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84212 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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fd847118eda59dcfa318dcb0895d1764c2a7a0ba |
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28-Sep-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fix Thumb2 IT block pass bug. t2MOVi32imm may not be the start of a IT block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83008 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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5adb66a646e2ec32265263739f5b01c3f50c176a |
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28-Sep-2009 |
Evan Cheng <evan.cheng@apple.com> |
Make ARM and Thumb2 32-bit immediate materialization into a single 32-bit pseudo instruction. This makes it re-materializable. Thumb2 will split it back out into two instructions so IT pass will generate the right mask. Also, this expose opportunies to optimize the movw to a 16-bit move. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82982 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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bc9b754091ea281e769e487f396b40f6675b9edb |
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15-Aug-2009 |
Evan Cheng <evan.cheng@apple.com> |
Turn on if-conversion for thumb2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79084 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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34f8a029e341a74fd02ccb198f4d4f0c8b38c015 |
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08-Aug-2009 |
Evan Cheng <evan.cheng@apple.com> |
I can type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78453 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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7db949df789383acce98ef072f08794fdd5bd04e |
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07-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Fix a bunch of namespace pollution. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78363 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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ed338e80f92d6efa961d9f8c29239dde1507e683 |
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11-Jul-2009 |
Evan Cheng <evan.cheng@apple.com> |
Don't put IT instruction before conditional branches. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75361 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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06e16587ebc81e43b42157fa3afcfd806b59b296 |
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10-Jul-2009 |
Evan Cheng <evan.cheng@apple.com> |
Add a thumb2 pass to insert IT blocks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75218 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
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