| a1514e24cc24b050f53a12650e047799358833a1 |
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04-Dec-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Sort includes for all of the .h files under the 'lib' tree. These were
missed in the first pass because the script didn't yet handle include
guards.
Note that the script is now able to handle all of these headers without
manual edits. =]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169224 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeISelLowering.h
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| d2ea0e10cbd158c93fb870cdd03001b9cd1156b8 |
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25-May-2012 |
Justin Holewinski <jholewinski@nvidia.com> |
Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCall
to pass around a struct instead of a large set of individual values. This
cleans up the interface and allows more information to be added to the struct
for future targets without requiring changes to each and every target.
NV_CONTRIB
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157479 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeISelLowering.h
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| 79aa3417eb6f58d668aadfedf075240a41d35a26 |
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17-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152997 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeISelLowering.h
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| 4bfcd4acbc7d12aa55f8de9af84a38422f0f6d83 |
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28-Feb-2012 |
Evan Cheng <evan.cheng@apple.com> |
Re-commit r151623 with fix. Only issue special no-return calls if it's a direct call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151645 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeISelLowering.h
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| 20bd5296cec8d8d597ab9db2aca7346a88e580c8 |
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28-Feb-2012 |
Daniel Dunbar <daniel@zuster.org> |
Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack prediction. ...", it is breaking the Clang build during the Compiler-RT part.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151630 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeISelLowering.h
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| ec52aaa12f57896fc806e849fa21a61603050ac4 |
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28-Feb-2012 |
Evan Cheng <evan.cheng@apple.com> |
Some ARM implementaions, e.g. A-series, does return stack prediction. That is,
the processor keeps a return addresses stack (RAS) which stores the address
and the instruction execution state of the instruction after a function-call
type branch instruction.
Calling a "noreturn" function with normal call instructions (e.g. bl) can
corrupt RAS and causes 100% return misprediction so LLVM should use a
unconditional branch instead. i.e.
mov lr, pc
b _foo
The "mov lr, pc" is issued in order to get proper backtrace.
rdar://8979299
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151623 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeISelLowering.h
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| 28b77e968d2b01fc9da724762bd8ddcd80650e32 |
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06-Sep-2011 |
Duncan Sands <baldrick@free.fr> |
Add codegen support for vector select (in the IR this means a select
with a vector condition); such selects become VSELECT codegen nodes.
This patch also removes VSETCC codegen nodes, unifying them with SETCC
nodes (codegen was actually often using SETCC for vector SETCC already).
This ensures that various DAG combiner optimizations kick in for vector
comparisons. Passes dragonegg bootstrap with no testsuite regressions
(nightly testsuite as well as "make check-all"). Patch mostly by
Nadav Rotem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139159 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeISelLowering.h
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| 193f7e2eb01943900779e51513d6f5e709326dfa |
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29-Jun-2011 |
Eric Christopher <echristo@apple.com> |
Remove getRegClassForInlineAsmConstraint from MBlaze. Add a TODO comment
for the port.
Part of rdar://9643582
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134085 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeISelLowering.h
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| fc5d305597ea6336d75bd7f3b741e8d57d6a5105 |
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06-May-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Make the logic for determining function alignment more explicit. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131012 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeISelLowering.h
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| 6b3bbb149f6a49c9ad9f763c353bc6e7b5c864a1 |
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22-Dec-2010 |
Wesley Peck <peckw@wesleypeck.com> |
Add support for some of the LLVM atomic operations to the MBlaze backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122384 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeISelLowering.h
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| dc9d87a9bbb5bc2ddaad7ab0db4aed82d88636c6 |
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15-Dec-2010 |
Wesley Peck <peckw@wesleypeck.com> |
Lower the MBlaze target specific calling conventions for "interrupt_handler"
and "save_volatiles" correctly. This completes the custom calling convention
functionality changes for the MBlaze backend that were started in 121888.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121891 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeISelLowering.h
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| 44ab89eb376af838d1123293a79975aede501464 |
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29-Oct-2010 |
John Thompson <John.Thompson.JTSoftware@gmail.com> |
Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117667 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeISelLowering.h
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| 4da992aebada7445ef68a7b6b94676dd26e9d537 |
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21-Oct-2010 |
Wesley Peck <peckw@wesleypeck.com> |
Adding initial AsmParser implementation for the MBlaze backend. It is
mostly based on the ARM AsmParser at this time and is not particularly
functional.
Changed the MBlaze data layout from:
"E-p:32:32-i8:8:8-i16:16:16-i64:32:32-f64:32:32-v64:32:32-v128:32:32-n32"
to:
"E-p:32:32:32-i8:8:8-i16:16:16"
because the MicroBlaze doesn't have i64, f64, v64, or v128 data types.
Cleaned up the MBlaze source code:
1. The floating point register class has been removed. The
MicroBlaze does not have floating point registers. Floating
point values are simply stored in integer registers.
2. Renaming the CPURegs register class to GPR to reflect the
standard naming.
3. Removing a lot of stale code from AsmPrinter after
the conversion to InstPrinter.
4. Simplified sign extended loads by marking them as
expanded in ISelLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117054 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeISelLowering.h
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| c9403659a98bf6487ab6fbf40b81628b5695c02e |
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07-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Split the SDValue out of OutputArg so that SelectionDAG-independent
code can do calling-convention queries. This obviates OutputArgReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107786 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeISelLowering.h
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| af1d8ca44a18f304f207e209b3bdb94b590f86ff |
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01-May-2010 |
Dan Gohman <gohman@apple.com> |
Get rid of the EdgeMapping map. Instead, just check for BasicBlock
changes before doing phi lowering for switches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102809 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeISelLowering.h
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| d858e90f039f5fcdc2fa93035e911a5a9505cc50 |
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17-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Use const qualifiers with TargetLowering. This eliminates several
const_casts, and it reinforces the design of the Target classes being
immutable.
SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.
And PIC16's AsmPrinter no longer uses TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101635 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeISelLowering.h
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| 1e93df6f0b5ee6e36d7ec18e6035f0f5a53e5ec6 |
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17-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Move per-function state out of TargetLowering subclasses and into
MachineFunctionInfo subclasses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101634 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeISelLowering.h
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| c2bf2bbe93c7ce44bedc8485cc24927423404835 |
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07-Mar-2010 |
Wesley Peck <peckw@wesleypeck.com> |
Re-committing the failed r97807 commit with changes to eliminate warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97891 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeISelLowering.h
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| 0a7f442314a317ad8a108467269c2ee67b69331a |
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06-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
revert r97807, it introduced build warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97869 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeISelLowering.h
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| c4155d591b2c28877695543dd8fe195e52922166 |
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05-Mar-2010 |
Wesley Peck <peckw@wesleypeck.com> |
Reworking the stack layout that the MicroBlaze backend generates.
The MicroBlaze backend was generating stack layouts that did not
conform correctly to the ABI. This update generates stack layouts
which are closer to what GCC does.
Variable arguments support was added as well but the stack layout
for varargs has not been finalized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97807 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeISelLowering.h
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| a70f28ce7dc85d0075a7d86da5d7987b6e306bc6 |
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23-Feb-2010 |
Wesley Peck <peckw@wesleypeck.com> |
Adding the MicroBlaze backend.
The MicroBlaze is a highly configurable 32-bit soft-microprocessor for
use on Xilinx FPGAs. For more information see:
http://www.xilinx.com/tools/microblaze.htm
http://en.wikipedia.org/wiki/MicroBlaze
The current LLVM MicroBlaze backend generates assembly which can be
compiled using the an appropriate binutils assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96969 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/MBlaze/MBlazeISelLowering.h
|