| a5597f0eaf1f93c6d0bc641a0cc54ecffb33955a |
|
25-Jan-2013 |
Eli Bendersky <eliben@google.com> |
In this patch, we teach X86_64TargetMachine that it has a ILP32
(defined by the x32 ABI) mode, in which case its pointers are 32-bits
in size. This knowledge is also added to X86RegisterInfo that now
returns the appropriate registers in getPointerRegClass.
There are many outcomes to this change. In order to keep the patches
separate and manageable, we start by focusing on some simple testable
cases. The patch adds a test with passing a pointer to a function -
focusing on the difference between the two data models for x86-64.
Another test is added for handling of 'sret' arguments (and
functionality is added in X86ISelLowering to make it work).
A note on naming: the "x32 ABI" document refers to the AMD64
architecture (in LLVM it's distinguished by being is64Bits() in the
x86 subtarget) with two variations: the LP64 (default) data model, and
the ILP32 data model. This patch adds predicates to the subtarget
which are consistent with this naming scheme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173503 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 02c6325a4592fefebc837b677eaf87dc532ecb7c |
|
17-Jan-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Provide a place for targets to insert ILP optimization passes.
Move the early if-conversion pass into this group.
ILP optimizations usually need to find the right balance between
register pressure and ILP using the MachineTraceMetrics analysis to
identify critical paths and estimate other costs. Such passes should run
together so they can share dominator tree and loop info analyses.
Besides if-conversion, future passes to run here here could include
expression height reduction and ARM's MLxExpansion pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172687 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| c7b902e7fe3498503efbfd98cabb1b1c67cadda6 |
|
08-Jan-2013 |
Preston Gurd <preston.gurd@intel.com> |
Pad Short Functions for Intel Atom
The current Intel Atom microarchitecture has a feature whereby
when a function returns early then it is slightly faster to execute
a sequence of NOP instructions to wait until the return address is ready,
as opposed to simply stalling on the ret instruction until
the return address is ready.
When compiling for X86 Atom only, this patch will run a pass,
called "X86PadShortFunction" which will add NOP instructions where less
than four cycles elapse between function entry and return.
It includes tests.
This patch has been updated to address Nadav's review comments
- Optimize only at >= O1 and don't do optimization if -Os is set
- Stores MachineBasicBlock* instead of BBNum
- Uses DenseMap instead of std::map
- Fixes placement of braces
Patch by Andy Zhang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171879 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| aeef83c6afa1e18d1cf9d359cc678ca0ad556175 |
|
07-Jan-2013 |
Chandler Carruth <chandlerc@gmail.com> |
Switch TargetTransformInfo from an immutable analysis pass that requires
a TargetMachine to construct (and thus isn't always available), to an
analysis group that supports layered implementations much like
AliasAnalysis does. This is a pretty massive change, with a few parts
that I was unable to easily separate (sorry), so I'll walk through it.
The first step of this conversion was to make TargetTransformInfo an
analysis group, and to sink the nonce implementations in
ScalarTargetTransformInfo and VectorTargetTranformInfo into
a NoTargetTransformInfo pass. This allows other passes to add a hard
requirement on TTI, and assume they will always get at least on
implementation.
The TargetTransformInfo analysis group leverages the delegation chaining
trick that AliasAnalysis uses, where the base class for the analysis
group delegates to the previous analysis *pass*, allowing all but tho
NoFoo analysis passes to only implement the parts of the interfaces they
support. It also introduces a new trick where each pass in the group
retains a pointer to the top-most pass that has been initialized. This
allows passes to implement one API in terms of another API and benefit
when some other pass above them in the stack has more precise results
for the second API.
The second step of this conversion is to create a pass that implements
the TargetTransformInfo analysis using the target-independent
abstractions in the code generator. This replaces the
ScalarTargetTransformImpl and VectorTargetTransformImpl classes in
lib/Target with a single pass in lib/CodeGen called
BasicTargetTransformInfo. This class actually provides most of the TTI
functionality, basing it upon the TargetLowering abstraction and other
information in the target independent code generator.
The third step of the conversion adds support to all TargetMachines to
register custom analysis passes. This allows building those passes with
access to TargetLowering or other target-specific classes, and it also
allows each target to customize the set of analysis passes desired in
the pass manager. The baseline LLVMTargetMachine implements this
interface to add the BasicTTI pass to the pass manager, and all of the
tools that want to support target-aware TTI passes call this routine on
whatever target machine they end up with to add the appropriate passes.
The fourth step of the conversion created target-specific TTI analysis
passes for the X86 and ARM backends. These passes contain the custom
logic that was previously in their extensions of the
ScalarTargetTransformInfo and VectorTargetTransformInfo interfaces.
I separated them into their own file, as now all of the interface bits
are private and they just expose a function to create the pass itself.
Then I extended these target machines to set up a custom set of analysis
passes, first adding BasicTTI as a fallback, and then adding their
customized TTI implementations.
The fourth step required logic that was shared between the target
independent layer and the specific targets to move to a different
interface, as they no longer derive from each other. As a consequence,
a helper functions were added to TargetLowering representing the common
logic needed both in the target implementation and the codegen
implementation of the TTI pass. While technically this is the only
change that could have been committed separately, it would have been
a nightmare to extract.
The final step of the conversion was just to delete all the old
boilerplate. This got rid of the ScalarTargetTransformInfo and
VectorTargetTransformInfo classes, all of the support in all of the
targets for producing instances of them, and all of the support in the
tools for manually constructing a pass based around them.
Now that TTI is a relatively normal analysis group, two things become
straightforward. First, we can sink it into lib/Analysis which is a more
natural layer for it to live. Second, clients of this interface can
depend on it *always* being available which will simplify their code and
behavior. These (and other) simplifications will follow in subsequent
commits, this one is clearly big enough.
Finally, I'm very aware that much of the comments and documentation
needs to be updated. As soon as I had this working, and plausibly well
commented, I wanted to get it committed and in front of the build bots.
I'll be doing a few passes over documentation later if it sticks.
Commits to update DragonEgg and Clang will be made presently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171681 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 5d1f5c17377e56d88a525cf82d02e6e5df254580 |
|
05-Jan-2013 |
Nadav Rotem <nrotem@apple.com> |
Revert revision 171524. Original message:
URL: http://llvm.org/viewvc/llvm-project?rev=171524&view=rev
Log:
The current Intel Atom microarchitecture has a feature whereby when a function
returns early then it is slightly faster to execute a sequence of NOP
instructions to wait until the return address is ready,
as opposed to simply stalling on the ret instruction
until the return address is ready.
When compiling for X86 Atom only, this patch will run a pass, called
"X86PadShortFunction" which will add NOP instructions where less than four
cycles elapse between function entry and return.
It includes tests.
Patch by Andy Zhang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171603 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| dd30b471750aca5c652873f9a8972df162b7e5eb |
|
04-Jan-2013 |
Preston Gurd <preston.gurd@intel.com> |
The current Intel Atom microarchitecture has a feature whereby when a function
returns early then it is slightly faster to execute a sequence of NOP
instructions to wait until the return address is ready,
as opposed to simply stalling on the ret instruction
until the return address is ready.
When compiling for X86 Atom only, this patch will run a pass, called
"X86PadShortFunction" which will add NOP instructions where less than four
cycles elapse between function entry and return.
It includes tests.
Patch by Andy Zhang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171524 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| ba836a2e803e51cc26279a8522f05c7452729fe3 |
|
20-Dec-2012 |
Richard Smith <richard-llvm@metafoo.co.uk> |
Fix use-before-construction of X86TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170654 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| d04a8d4b33ff316ca4cf961e06c9e312eff8e64f |
|
03-Dec-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Use the new script to sort the includes of every file under lib.
Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.
Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 1243922fc1a1e3d2681ed9e78503eeabd875ba93 |
|
26-Nov-2012 |
Chad Rosier <mcrosier@apple.com> |
Remove the X86 Maximal Stack Alignment Check pass as it is no longer necessary.
This pass was conservative in that it always reserved the FP to enable dynamic
stack realignment, which allowed the RA to use aligned spills for vector
registers. This happens even when spills were not necessary. The RA has
since been improved to use unaligned spills when necessary.
The new behavior is to realign the stack if the frame pointer was already
reserved for some other reason, but don't reserve the frame pointer just
because a function contains vector virtual registers.
Part of rdar://12719844
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168627 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 0d91c0b519e0053931bf9502ebeaf44d397812f0 |
|
28-Oct-2012 |
Rafael Espindola <rafael.espindola@gmail.com> |
Remove TargetELFWriterInfo.
All the credit goes to Jan Voung for noticing it was dead!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166902 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 270483466124fe1e19d5439e958fef63cebd43cd |
|
24-Oct-2012 |
Nadav Rotem <nrotem@apple.com> |
Implement a basic VectorTargetTransformInfo interface to be used by the loop and bb vectorizers for modeling the cost of instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166593 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| cbd9a19b5d6ff93efa82c467508ede78b8af3bac |
|
19-Oct-2012 |
Nadav Rotem <nrotem@apple.com> |
Reapply the TargerTransformInfo changes, minus the changes to LSR and Lowerinvoke.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166248 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 3b9a911efcf280950f878a050728450423875639 |
|
18-Oct-2012 |
Bob Wilson <bob.wilson@apple.com> |
Temporarily revert the TargetTransform changes.
The TargetTransform changes are breaking LTO bootstraps of clang. I am
working with Nadav to figure out the problem, but I am reverting it for now
to get our buildbots working.
This reverts svn commits: 165665 165669 165670 165786 165787 165997
and I have also reverted clang svn 165741
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166168 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| e3d0e86919730784faaddcb5d9b0257c39b0804b |
|
11-Oct-2012 |
Nadav Rotem <nrotem@apple.com> |
Add a new interface to allow IR-level passes to access codegen-specific information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165665 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 3574eca1b02600bac4e625297f4ecf745f4c4f32 |
|
08-Oct-2012 |
Micah Villmow <villmow@gmail.com> |
Move TargetData to DataLayout.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165402 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 0d141f867d49dadc2f7580b149464f1e8e095f03 |
|
03-Oct-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
The early if conversion pass is ready to be used as an opt-in.
Enable the pass by default for targets that request it, and change the
-enable-early-ifcvt to the opposite -disable-early-ifcvt.
There are still some x86 regressions when enabling early if-conversion
because of the missing machine models. Disable the pass for x86 until
machine models are added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165075 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 59bde4d8a1065d3c48c5ea94a570b2c4d2f294a8 |
|
04-Jul-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add early if-conversion support to X86.
Implement the TII hooks needed by EarlyIfConversion to create cmov
instructions and estimate their latency.
Early if-conversion is still not enabled by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159695 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 564fbf6aff8fb95646a1290078a37c2d4dbe629f |
|
02-Jul-2012 |
Bob Wilson <bob.wilson@apple.com> |
Add all codegen passes to the PassManager via TargetPassConfig.
This is a preliminary step toward having TargetPassConfig be able to
start and stop the compilation at specified passes for unit testing
and debugging. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159567 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| f0234fcbc9be9798c10dedc3e3c134b7afbc6511 |
|
01-Jun-2012 |
Hans Wennborg <hans@hanshq.net> |
Implement the local-dynamic TLS model for x86 (PR3985)
This implements codegen support for accesses to thread-local variables
using the local-dynamic model, and adds a clean-up pass so that the base
address for the TLS block can be re-used between local-dynamic access on
an execution path.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157818 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 7c4ce30ea6a9d0410f306e805403dd224c3df65c |
|
01-May-2012 |
Bill Wendling <isanbard@gmail.com> |
Change the PassManager from a reference to a pointer.
The TargetPassManager's default constructor wants to initialize the PassManager
to 'null'. But it's illegal to bind a null reference to a null l-value. Make the
ivar a pointer instead.
PR12468
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155902 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 061efcfb3e79899493d857f49e50d09f29037e0a |
|
04-Feb-2012 |
Andrew Trick <atrick@apple.com> |
TargetPassConfig: confine the MC configuration to TargetMachine.
Passes prior to instructon selection are now split into separate configurable stages.
Header dependencies are simplified.
The bulk of this diff is simply removal of the silly DisableVerify flags.
Sorry for the target header churn. Attempting to stabilize them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149754 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 843ee2e6a46b2b2d74a84c2eea68dec35cb359cc |
|
03-Feb-2012 |
Andrew Trick <atrick@apple.com> |
Added TargetPassConfig. The first little step toward configuring codegen passes.
Allows command line overrides to be centralized in LLVMTargetMachine.cpp.
LLVMTargetMachine can intercept common passes and give precedence to command line overrides.
Allows adding "internal" target configuration options without touching TargetOptions.
Encapsulates the PassManager.
Provides a good point to initialize all CodeGen passes so that Pass ID's can be used in APIs.
Allows modifying the target configuration hooks without rebuilding the world.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149672 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 8247e0dca6759d9a22ac4c5cf305fac052b285ac |
|
03-Feb-2012 |
Andrew Trick <atrick@apple.com> |
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149671 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 922d314e8f9f0d8e447c055485a2969ee9cf2dd2 |
|
02-Feb-2012 |
Andrew Trick <atrick@apple.com> |
Instruction scheduling itinerary for Intel Atom.
Adds an instruction itinerary to all x86 instructions, giving each a default latency of 1, using the InstrItinClass IIC_DEFAULT.
Sets specific latencies for Atom for the instructions in files X86InstrCMovSetCC.td, X86InstrArithmetic.td, X86InstrControl.td, and X86InstrShiftRotate.td. The Atom latencies for the remainder of the x86 instructions will be set in subsequent patches.
Adds a test to verify that the scheduler is working.
Also changes the scheduling preference to "Hybrid" for i386 Atom, while leaving x86_64 as ILP.
Patch by Preston Gurd!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149558 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 2028b793e1fd1a8dd4d99b0b7c9972865d5e806a |
|
11-Jan-2012 |
Rafael Espindola <rafael.espindola@gmail.com> |
Support segmented stacks on mac.
This uses TLS slot 90, which actually belongs to JavaScriptCore. We only support
frames with static size
Patch by Brian Anderson.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147960 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 1accb7ed98d823c291a4d5df172d0538451aba9e |
|
10-Jan-2012 |
Craig Topper <craig.topper@gmail.com> |
Remove hasXMM/hasXMMInt functions. Move callers to hasSSE1/hasSSE2. This is the final piece to remove the AVX hack that disabled SSE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147843 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 2d24e2a396a1d211baaeedf32148a3b657240170 |
|
20-Dec-2011 |
David Blaikie <dblaikie@gmail.com> |
Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146960 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 8a8d479214745c82ef00f08d4e4f1c173b5f9ce2 |
|
02-Dec-2011 |
Nick Lewycky <nicholas@mxc.ca> |
Move global variables in TargetMachine into new TargetOptions class. As an API
change, now you need a TargetOptions object to create a TargetMachine. Clang
patch to follow.
One small functionality change in PTX. PTX had commented out the machine
verifier parts in their copy of printAndVerify. That now calls the version in
LLVMTargetMachine. Users of PTX who need verification disabled should rely on
not passing the command-line flag to enable it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145714 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| d224c7879ae71979e8b9675b38e9a16310560dc3 |
|
17-Nov-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Turn on vzeroupper insertion on call boundaries for AVX; it works as far as I know, and I'd like to see wider testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144867 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| b95fc31aa2e5a0a0b9ee1909d1cb949577c5aa16 |
|
16-Nov-2011 |
Evan Cheng <evan.cheng@apple.com> |
Sink codegen optimization level into MCCodeGenInfo along side relocation model
and code model. This eliminates the need to pass OptLevel flag all over the
place and makes it possible for any codegen pass to use this information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144788 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 2713d045e3df9d4602f020088001cbc96ca680c3 |
|
16-Nov-2011 |
Craig Topper <craig.topper@gmail.com> |
Remove code to enable execution dependency fix pass on VR256. VR128 is sufficient after r144636.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144777 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 4c077a1f04c97210793d62debef250b974d168bc |
|
15-Nov-2011 |
Craig Topper <craig.topper@gmail.com> |
Properly qualify AVX2 specific parts of execution dependency table. Also enable converting between 256-bit PS/PD operations when AVX1 is enabled. Fixes PR11370.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144622 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| b80ada98c50df226e210eabc9547101c5dee2181 |
|
09-Nov-2011 |
Craig Topper <craig.topper@gmail.com> |
Enable execution dependency fix pass for YMM registers when AVX2 is enabled. Add AVX2 logical operations to list of replaceable instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144179 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 857bf8341498448851fd7205e48307138823698b |
|
19-Oct-2011 |
Eric Christopher <echristo@apple.com> |
Revert "Turn on the vzeroupper pass by default."
This reverts commit 494f7ac3e8d2ab3d94e52317abf9c42a949fe1f3.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142455 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 7e8ae57be914cbb6fab111d98a89c6f07c77d2a1 |
|
19-Oct-2011 |
Eric Christopher <echristo@apple.com> |
Turn on the vzeroupper pass by default.
I'll remove/rename the option in a few days.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142439 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| b10946a5a938a433ca4d7301b8b5ff5a8c11a7ff |
|
14-Oct-2011 |
Evan Cheng <evan.cheng@apple.com> |
A few 80-col violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141988 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 4ad06e61c0881638d513511cefe4bb80bba68a47 |
|
11-Oct-2011 |
Lang Hames <lhames@gmail.com> |
Fixed natural stack alignment for Linux x86-32. Thanks Eli.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141616 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| bb5b3f33594cfa40e9f53bf9a71af359b080a697 |
|
11-Oct-2011 |
Lang Hames <lhames@gmail.com> |
Add a natural stack alignment field to TargetData, and prevent InstCombine from
promoting allocas to preferred alignments that exceed the natural
alignment. This avoids some potentially expensive dynamic stack realignments.
The natural stack alignment is set in target data strings via the "S<size>"
option. Size is in bits and must be a multiple of 8. The natural stack alignment
defaults to "unspecified" (represented by a zero value), and the "unspecified"
value does not prevent any alignment promotions. Target maintainers that care
about avoiding promotions should explicitly add the "S<size>" option to their
target data strings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141599 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| df4b35e3dd85fead444e23b477d61dfd43e1fb6f |
|
28-Sep-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove X86-dependent stuff from SSEDomainFix.
This also enables domain swizzling for AVX code which required a few
trivial test changes.
The pass will be moved to lib/CodeGen shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140659 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 41a9635292a069934f0674faca744118d4d25c5a |
|
15-Sep-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Enable SSEDomainFix pass for AVX mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139816 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| c53479d9c243e3331f8153840a5d1cc72b62f649 |
|
03-Sep-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Use internal storage for command line option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139079 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 3e74d6fdd248e20a280f1dff3da9a6c689c2c4c3 |
|
24-Aug-2011 |
Evan Cheng <evan.cheng@apple.com> |
Move TargetRegistry and TargetSelect from Target to Support where they belong.
These are strictly utilities for registering targets and components.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138450 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 3bde6fe0df05558b89e7edfe48ac05da59beb81a |
|
23-Aug-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Introduce a pass to insert vzeroupper instructions to avoid AVX to
SSE transition penalty. The pass is enabled through the "x86-use-vzeroupper"
llc command line option. This is only the first step (very naive and
conservative one) to sketch out the idea, but proper DFA is coming next
to allow smarter decisions. Comments and ideas now and in further commits
will be very appreciated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138317 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| a87e40f16f1c3117412e01107807e490d6fb29bc |
|
25-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
More refactoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135939 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 34ad6db8b958fdc0d38e122edf753b5326e69b03 |
|
20-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
- Move CodeModel from a TargetMachine global option to MCCodeGenInfo.
- Introduce JITDefault code model. This tells targets to set different default
code model for JIT. This eliminates the ugly hack in TargetMachine where
code model is changed after construction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135580 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 439661395fd2a2a832dba01c65bc88718528313c |
|
19-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Introduce MCCodeGenInfo, which keeps information that can affect codegen
(including compilation, assembly). Move relocation model Reloc::Model from
TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135468 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 1abf2cb59b8d63415780a03329307c0997b2670c |
|
15-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Rename createAsmInfo to createMCAsmInfo and move registration code to MCTargetDesc to prepare for next round of changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135219 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 59ee62d2418df8db499eca1ae17f5900dc2dcbba |
|
11-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
- Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfo
and MCSubtargetInfo.
- Added methods to update subtarget features (used when targets automatically
detect subtarget features or switch modes).
- Teach X86Subtarget to update MCSubtargetInfo features bits since the
MCSubtargetInfo layer can be shared with other modules.
- These fixes .code 16 / .code 32 support since mode switch is updated in
MCSubtargetInfo so MC code emitter can do the right thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134884 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 4d1a8dde2d9eea508f66d51428b4f155fa6a6756 |
|
09-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Restore old behavior. Always auto-detect features unless cpu or features are specified.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134757 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| ebdeeab812beec0385b445f3d4c41a114e0d972f |
|
08-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Eliminate asm parser's dependency on TargetMachine:
- Each target asm parser now creates its own MCSubtatgetInfo (if needed).
- Changed AssemblerPredicate to take subtarget features which tablegen uses
to generate asm matcher subtarget feature queries. e.g.
"ModeThumb,FeatureThumb2" is translated to
"(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134678 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 18fb1d35db9e2160be3a5bd2950f7e0d206bdbb8 |
|
07-Jul-2011 |
Evan Cheng <evan.cheng@apple.com> |
Add Mode64Bit feature and sink it down to MC layer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134641 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 276365dd4bc0c2160f91fd8062ae1fc90c86c324 |
|
30-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to
be the first encoded as the first feature. It then uses the CPU name to look up
features / scheduling itineray even though clients know full well the CPU name
being used to query these properties.
The fix is to just have the clients explictly pass the CPU name!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134127 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| f05589d0430a543e8158b912dcb8117bf5cb376e |
|
23-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
Rename TargetOptions::StackAlignment to StackAlignmentOverride.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133739 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| ef41ff618f2537539b538e6c7bf471c753391f92 |
|
23-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
Remove TargetOptions.h dependency from X86Subtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133726 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| bfa27cc5d72e061a96efbb461864d40bc8089ec2 |
|
28-Apr-2011 |
Rafael Espindola <rafael.espindola@gmail.com> |
Add a getExprForPersonalitySymbol method to MCAsmInfo. Use it when
converting the symbol passed to .cfi_personality into bytes is the file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130400 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 912225e18559a73228099330a4c253fdccf9fa3d |
|
19-Apr-2011 |
Daniel Dunbar <daniel@zuster.org> |
ADT/Triple: Move a variety of clients to using isOSDarwin() and isOSWindows()
predicates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129816 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| c92cb649e30f1a4119b8fc9d97caf70f1a21c646 |
|
01-Mar-2011 |
Duncan Sands <baldrick@free.fr> |
Add datalayout information for the IEEE quad precision fp128 type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126780 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 6904f05e607b6bbdfa96a2ebb628ebf3a1f21455 |
|
17-Feb-2011 |
NAKAMURA Takumi <geek4civic@gmail.com> |
Triple::MinGW64 is deprecated and removed. We can use Triple::MinGW32 generally.
No one uses *-mingw64. mingw-w64 is represented as {i686|x86_64}-w64-mingw32. In llvm side, i686 and x64 can be treated as similar way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125747 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| e310b3a2a32d356f3f890fb138b1694b53d15f4e |
|
17-Feb-2011 |
NAKAMURA Takumi <geek4civic@gmail.com> |
Fix whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125746 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 2bffee2ee725047137d2523e31db9ecc7b246cbb |
|
01-Feb-2011 |
Evan Cheng <evan.cheng@apple.com> |
Patches to build EFI with Clang/LLVM. By Carl Norum.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124639 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 96aa78c8c5ef1a5f268539c9edc86569b436d573 |
|
23-Jan-2011 |
Rafael Espindola <rafael.espindola@gmail.com> |
Add support for the --noexecstack option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124077 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 16c29b5f285f375be53dabaa73e3e91107485fe4 |
|
10-Jan-2011 |
Anton Korobeynikov <asl@math.spbu.ru> |
Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123170 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| d9e3385ced2dc887e2fe8e1c071bd2611e4d3ede |
|
19-Nov-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Move getInitialFrameState() to TargetFrameInfo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119754 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 33464912237efaa0ed7060829e66b59055bdd48b |
|
15-Nov-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
First step of huge frame-related refactoring: move emit{Prologue,Epilogue} out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119097 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| ec37b00b17fba355ac6d4a1bee918d3004c54584 |
|
08-Oct-2010 |
Cameron Esfahani <dirty@apple.com> |
Recommit 116056, now with the missing file...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116083 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| e7beda183db01deffb626bc154b42a0bac27b1de |
|
04-Oct-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
va_args support for Win64.
Patch by Cameron!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115480 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 0febc4657b0edbf16b55ca5365d2b6aab45be7c5 |
|
03-Oct-2010 |
Rafael Espindola <rafael.espindola@gmail.com> |
Jim Asked us to move DataLayout on ARM back to the most specialized classes. Do
so and also change X86 for consistency.
Investigating if this can be improved a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115469 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 699647cabcd98efd10b3bfb7cedc4d4b54f9b93d |
|
21-Aug-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Use rip-rel addressing on win64 by default. For this we just
defaults to small pic code model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111741 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 453db50333723cb59c64970b6860caa0a7c0b8c2 |
|
16-Aug-2010 |
Matt Fleming <matt@console-pimps.org> |
Hookup ELF support for X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111173 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| c575283675f7bd9f7cc40f06024ba6251c2d55a8 |
|
04-Aug-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
Print an error message when someone tries -integrated-as on an unsupported target.
- The COFF backend doesn't support MingW/Cygwin at the moment, it'll report an
error, but it's still much better than random assertions from the MachO backend.
- We want to make ELF the default eventually, it's what the majority of targets use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110197 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| e2195d8b357d7081edb5eb09d1d6e9d7b4bfc308 |
|
31-Jul-2010 |
Michael J. Spencer <bigcheesegs@gmail.com> |
Add relax all support to the COFF object streamer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109947 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| dfd30187c685c2c5200ee795c64885c0a39dc2d0 |
|
27-Jul-2010 |
Michael J. Spencer <bigcheesegs@gmail.com> |
Make MC use Windows COFF on Windows and add tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109494 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 468a2a44e2a2efb5a2cd441205fc78b80edd3844 |
|
16-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Remove the X86::FP_REG_KILL pseudo-instruction and the X86FloatingPointRegKill
pass that inserted it.
It is no longer necessary to limit the live ranges of FP registers to a single
basic block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108536 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| e928ec9480072ed1298fba2fbd8faa0e89253bf1 |
|
16-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Allow x87 FP registers to be alive globally in a function.
FP_REG_KILL instructions are still inserted, but can be disabled by passing
-live-x87 to llc. The X87FPRegKillInserterPass is going to be removed shortly.
CFG edges are partioned into bundles where the x87 stack must be allocated
identically. Code is insertad at the end of each basic block that shuffles the
live FP registers to match the outgoing bundles expectations.
This fix is in preparation for some upcoming register allocator improvements
that may extend the live range of registers beyond a basic block, similar to
LICM. It also provides a nice runtime speedup if you are building with
-mfpmath=387.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108529 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 84023e0fbefc406a4c611d3d64a10df5d3a97dd7 |
|
10-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Reapply bottom-up fast-isel, with several fixes for x86-32:
- Check getBytesToPopOnReturn().
- Eschew ST0 and ST1 for return values.
- Fix the PIC base register initialization so that it doesn't ever
fail to end up the top of the entry block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108039 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 14152b480d09c7ca912af7c06d00b0ff3912e4f5 |
|
06-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Reapply r107655 with fixes; insert the pseudo instruction into
the block before calling the expansion hook. And don't
put EFLAGS in a mbb's live-in list twice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107691 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 258c58cc6257cf61c9bdbb9c4cea67ba2691adf0 |
|
06-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Revert r107655.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107668 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| b81c771c0d9ab5a980caf3383932b051eafd1a39 |
|
06-Jul-2010 |
Dan Gohman <gohman@apple.com> |
Fix a bunch of custom-inserter functions to handle the case where
the pseudo instruction is not at the end of the block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107655 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| d8a33ddcfeb29e7ec792b14be946a05ab998a38e |
|
21-May-2010 |
Matt Fleming <matt@console-pimps.org> |
Currently, createMachOStreamer() is invoked directly in llvm-mc which
isn't ideal if we want to be able to use another object file format.
Add a createObjectStreamer() factory method so that the correct object
file streamer can be instantiated for a given target triple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104318 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| ff7a562751604a9fe13efc75bd59622244b54d35 |
|
11-May-2010 |
Dan Gohman <gohman@apple.com> |
Implement a bunch more TargetSelectionDAGInfo infrastructure.
Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and
EmitTargetCodeForMemmove out of TargetLowering and into
SelectionDAGInfo to exercise this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103481 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| f4f06906b8360b55a37b958b8915948afc227704 |
|
05-May-2010 |
Eric Christopher <echristo@apple.com> |
Revert 102941, we're going to do this via attr and can just
hack the code to turn it off when debugging.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103083 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 0b12348ddf54ef2ca96bf807742e1c6622c692d4 |
|
03-May-2010 |
Eric Christopher <echristo@apple.com> |
Add an option, defaulting to off, to disable the sse domain crossing opts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102941 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| fe5dcbc27d4c21ed80cb5531cad215aa272fded9 |
|
21-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Trim include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101978 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| fa85eb62378900a884a7eb4933a9deb6513d26ab |
|
06-Apr-2010 |
Jim Grosbach <grosbach@apple.com> |
Fix PR6696 and PR6663
When a frame pointer is not otherwise required, and dynamic stack alignment
is necessary solely due to the spilling of a register with larger alignment
requirements than the default stack alignment, the frame pointer can be both
used as a general purpose register and a frame pointer. That goes poorly, for
obvious reasons. This patch brings back a bit of old logic for identifying
the use of such registers and conservatively reserves the frame pointer
during register allocation in such cases.
For now, implement for X86 only since it's 32-bit linux which is hitting this,
and we want a targeted fix for 2.7. As a follow-on, this will be expanded
to handle other targets, as theoretically the problem could arise elsewhere
as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100559 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| bfcd61b907e1ec7e6b21fafa7c362e3002ddf3c1 |
|
31-Mar-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Enable -sse-domain-fix by default. Now with tests!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99954 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| adffc9d20ef0f6e1379056a937ec7b4c4ae304a1 |
|
30-Mar-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Revert "Enable -sse-domain-fix by default. What could possibly go wrong?"
Not running 'make check-all' before committing is a bad idea.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99933 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 90b9df4e6f61a3f27d6905655719f9b6ffadfca5 |
|
30-Mar-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Enable -sse-domain-fix by default. What could possibly go wrong?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99931 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 352aa503faee6c58e9cdb5054cc5ec1d90c696b4 |
|
25-Mar-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add a late SSEDomainFix pass that twiddles SSE instructions to avoid domain crossings.
On Nehalem and newer CPUs there is a 2 cycle latency penalty on using a register
in a different domain than where it was defined. Some instructions have
equvivalents for different domains, like por/orps/orpd.
The SSEDomainFix pass tries to minimize the number of domain crossings by
changing between equvivalent opcodes where possible.
This is a work in progress, in particular the pass doesn't do anything yet. SSE
instructions are tagged with their execution domain in TableGen using the last
two bits of TSFlags. Note that not all instructions are tagged correctly. Life
just isn't that simple.
The SSE execution domain issue is very similar to the ARM NEON/VFP pipeline
issue handled by NEONMoveFixPass. This pass may become target independent to
handle both.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99524 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| fe4b92baf11785bf0bfc26b256ca841c9848f77a |
|
24-Mar-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Revert "Add a late SSEDomainFix pass that twiddles SSE instructions to avoid domain crossings."
This reverts commit 99345. It was breaking buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99352 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| c75c5fa12582956fc6b7d7d756b2bdd49fa61f71 |
|
24-Mar-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add a late SSEDomainFix pass that twiddles SSE instructions to avoid domain crossings.
This is work in progress. So far, SSE execution domain tables are added to
X86InstrInfo, and a skeleton pass is enabled with -sse-domain-fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99345 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 5d067fe1580772a8e012ff0acc06e21e9b95d340 |
|
20-Mar-2010 |
Daniel Dunbar <daniel@zuster.org> |
TargetRegistry: Fix create{AsmInfo,MCDisassembler} to return non-const objects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99097 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 12783d1c3a86d1b5287b0703db6893ae1f283877 |
|
21-Feb-2010 |
Daniel Dunbar <daniel@zuster.org> |
MC/X86: Add stub AsmBackend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96763 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 9184b25fa543a900463215c11635c2c014ddb623 |
|
15-Feb-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Preliminary patch to improve dwarf EH generation - Hooks to return Personality / FDE / LSDA / TType encoding depending on target / options (e.g. code model / relocation model) - MCIzation of Dwarf EH printer to use encoding information - Stub generation for ELF target (needed for indirect references) - Some other small changes here and there
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96285 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 245ba9698e465338fa79f81cd9a65fc885702041 |
|
14-Feb-2010 |
Anton Korobeynikov <asl@math.spbu.ru> |
Drop winmcasminfo and use normal AT&T COFF for all windows targets.
Otherwise AT&T asm printer is used with non-compatible MCAsmInfo and
there is no way to override this behaviour.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96165 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| f068304b1f9205b49aa4bef75e669f750906b84f |
|
13-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
rip out the 'heinous' x86 MCCodeEmitter implementation.
We still have the templated X86 JIT emitter, *and* the
almost-copy in X86InstrInfo for getting instruction sizes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96059 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 00a99a35840451a291eb61a192a750908a4073ae |
|
06-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Run codegen dce pass for all targets at all optimization levels. Previously it's
only run for x86 with fastisel. I've found it being very effective in
eliminating some obvious dead code as result of formal parameter lowering
especially when tail call optimization eliminated the need for some of the loads
from fixed frame objects. It also shrinks a number of the tests. A couple of
tests no longer make sense and are now eliminated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95493 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 457624792803e26136889b8cf17e8aa7b84e58b4 |
|
03-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
stub out a new X86 encoder, which can be tried with
-enable-new-x86-encoder until its stable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95256 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| ce79a25980da3279f05adf324d9d6adefb9c979c |
|
03-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
rename createX86MCCodeEmitter to more accurately reflect what it creates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95254 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 7f89fdae34a11f8b0b3e0ee1de3f2f6d317f38c4 |
|
02-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
remove dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95144 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| f1d6b107d2ea4518d240ee93bf4bffd53e71206d |
|
02-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
eliminate all the dead addSimpleCodeEmitter implementations.
eliminate random "code emitter" stuff in Alpha, except for
the JIT path. Next up, remove the template cruft.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95131 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| e45ab8a0a90e4f3a59d8c38038ae3e495ee1fef3 |
|
19-Jan-2010 |
Jim Grosbach <grosbach@apple.com> |
For aligned load/store instructions, it's only required to know whether a
function can support dynamic stack realignment. That's a much easier question
to answer at instruction selection stage than whether the function actually
will have dynamic alignment prologue. This allows the removal of the
stack alignment heuristic pass, and improves code quality for cases where
the heuristic would result in dynamic alignment code being generated when
it was not strictly necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93885 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| e1e0f485f9721a0c4236326f32d0a48561a1af7a |
|
19-Jan-2010 |
Bill Wendling <isanbard@gmail.com> |
Even more explanation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93841 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 48814681d72242e0179d7100f263952fdf4f51d6 |
|
18-Jan-2010 |
Bill Wendling <isanbard@gmail.com> |
- Add getLSDAEncoding to the PowerPC backend.
- Greatly improve the comments to the getLSDAEncoding method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93796 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 097ea8315f107fe632df9e9de3af2f97a8d2ff65 |
|
18-Jan-2010 |
Bill Wendling <isanbard@gmail.com> |
Add FIXME comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93755 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| a8c18890da312e810c687b78658dcd4c989b9776 |
|
18-Jan-2010 |
Bill Wendling <isanbard@gmail.com> |
- Add a comment to the callback indicating that it's *extremely* not a good
idea, but unfortunately necessary.
- Default to using 4-bytes for the LSDA pointer encoding to agree with the
encoded value in the CIE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93753 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| d58e9cb42d7f5cf83c9b982df7e2c822b2e285e9 |
|
16-Jan-2010 |
Bill Wendling <isanbard@gmail.com> |
Retrying r91337:
The CIE says that the LSDA point in the FDE section is an "sdata4". That's fine,
but we need it to actually be 4-bytes in the FDE for some platforms. Allow
individual platforms to decide for themselves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93616 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 0122c9051a0157908e3f4e1c604435339ac4761d |
|
22-Dec-2009 |
Sean Callanan <scallanan@apple.com> |
Fixed library dependencies between the X86 disassembler and
X86 codegen that were causing circular symbol dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91871 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| f4f43cb5011611d44219ffb1caa988f5adf305bf |
|
21-Dec-2009 |
Eric Christopher <echristo@apple.com> |
Fix setting and default setting of code model for jit. Do this
by allowing backends to override routines that will default
the JIT and Static code generation to an appropriate code model
for the architecture.
Should fix PR 5773.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91824 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 8ed9f51663bc5533f36ca62e5668ae08e9a1313f |
|
19-Dec-2009 |
Sean Callanan <scallanan@apple.com> |
Table-driven disassembler for the X86 architecture (16-, 32-, and 64-bit
incarnations), integrated into the MC framework.
The disassembler is table-driven, using a custom TableGen backend to
generate hierarchical tables optimized for fast decode. The disassembler
consumes MemoryObjects and produces arrays of MCInsts, adhering to the
abstract base class MCDisassembler (llvm/MC/MCDisassembler.h).
The disassembler is documented in detail in
- lib/Target/X86/Disassembler/X86Disassembler.cpp (disassembler runtime)
- utils/TableGen/DisassemblerEmitter.cpp (table emitter)
You can test the disassembler by running llvm-mc -disassemble for i386
or x86_64 targets. Please let me know if you encounter any problems
with it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91749 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| e27d205d5d4d53cceabcd6325533fbdf9c0cee42 |
|
02-Dec-2009 |
Jim Grosbach <grosbach@apple.com> |
Factor the stack alignment calculations out into a target independent pass.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90336 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| d1ba06bf131a9d217426529d2e28af1f2eeed47a |
|
16-Nov-2009 |
Jeffrey Yasskin <jyasskin@google.com> |
Make X86-64 in the Large model always emit 64-bit calls.
The large code model is documented at
http://www.x86-64.org/documentation/abi.pdf and says that calls should
assume their target doesn't live within the 32-bit pc-relative offset
that fits in the call instruction.
To do this, we turn off the global-address->target-global-address
conversion in X86TargetLowering::LowerCall(). The first attempt at
this broke the lazy JIT because it can separate the movabs(imm->reg)
from the actual call instruction. The lazy JIT receives the address of
the movabs as a relocation and needs to record the return address from
the call; and then when that call happens, it needs to patch the
movabs with the newly-compiled target. We could thread the call
instruction into the relocation and record the movabs<->call mapping
explicitly, but that seems to require at least as much new
complication in the code generator as this change.
To fix this, we make lazy functions _always_ go through a call
stub. You'd think we'd only have to force lazy calls through a stub on
difficult platforms, but that turns out to break indirect calls
through a function pointer. The right fix for that is to distinguish
between calls and address-of operations on uncompiled functions, but
that's complex enough to leave for someone else to do.
Another attempt at this defined a new CALL64i pseudo-instruction,
which expanded to a 2-instruction sequence in the assembly output and
was special-cased in the X86CodeEmitter's emitInstruction()
function. That broke indirect calls in the same way as above.
This patch also removes a hack forcing Darwin to the small code model.
Without far-call-stubs, the small code model requires things of the
JITMemoryManager that the DefaultJITMemoryManager can't provide.
Thanks to echristo for lots of testing!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88984 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 2928c83b010f7cfdb0f819199d806f6942a7d995 |
|
06-Nov-2009 |
Daniel Dunbar <daniel@zuster.org> |
Pass StringRef by value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86251 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 7168a7dc6dd3b6a502372f34c2ed4ed91c85c090 |
|
27-Aug-2009 |
Daniel Dunbar <daniel@zuster.org> |
llvm-mc/X86: Implement single instruction encoding interface for MC.
- Note, this is a gigantic hack, with the sole purpose of unblocking further
work on the assembler (its also possible to test the mathcer more completely
now).
- Despite being a hack, its actually good enough to work over all of 403.gcc
(although some encodings are probably incorrect). This is a testament to the
beauty of X86's MachineInstr, no doubt! ;)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80234 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 2807afa664b579af4c559b3880d6763b9e7e236a |
|
22-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
rename COFFMCAsmInfo -> MCAsmInfoCOFF, likewise for darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79773 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| af76e592c7f9deff0e55c13dbb4a34f07f1c7f64 |
|
22-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79763 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| a7ac47cee1a0b3f4c798ecaa22ecf9d1be9c07e6 |
|
12-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
Change TargetAsmInfo to be constructed via TargetRegistry from a Target+Triple
pair instead of from a virtual method on TargetMachine. This cuts the final
ties of TargetAsmInfo to TargetMachine, meaning that MC can now use
TargetAsmInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78802 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 0a31d2f6456069adba19b8aeca66c68b633c38b4 |
|
11-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
pass the TargetTriple down from each target ctor to the
LLVMTargetMachine ctor. It is currently unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78711 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 275bb1bd1284b932bd7a2352f04e462ad7c33cd2 |
|
04-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
remove a random reference to subtarget. Even without this, we
still get "intel syntax" instructions from llc with
-x86-asm-syntax=intel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78103 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| cf6b739d3d4921dc9fc6908ec2009055c0927125 |
|
03-Aug-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Unbreak Win64 CC. Step one: honour register save area, fix some alignment and provide a different set of call-clobberred registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77962 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| e28039cfd1a9c43b5fa9274bf19372d96f58f460 |
|
03-Aug-2009 |
Daniel Dunbar <daniel@zuster.org> |
Move most targets TargetMachine constructor to only taking a target triple.
- The C, C++, MSIL, and Mips backends still need the module.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77927 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 3be03406c9c3b2075d5ae416499af2f15f703d6f |
|
03-Aug-2009 |
Daniel Dunbar <daniel@zuster.org> |
Normalize Subtarget constructors to take a target triple string instead of
Module*.
Also, dropped uses of TargetMachine where unnecessary. The only target which
still takes a TargetMachine& is Mips, I would appreciate it if someone would
normalize this to match other targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77918 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| f0144127b98425d214e59e4a1a4b342b78e3642b |
|
28-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
Rip all of the global variable lowering logic out of TargetAsmInfo. Since
it is highly specific to the object file that will be generated in the end,
this introduces a new TargetLoweringObjectFile interface that is implemented
for each of ELF/MachO/COFF/Alpha/PIC16 and XCore.
Though still is still a brutal and ugly refactoring, this is a major step
towards goodness.
This patch also:
1. fixes a bunch of dangling pointer problems in the PIC16 backend.
2. disables the TargetLowering copy ctor which PIC16 was accidentally using.
3. gets us closer to xcore having its own crazy target section flags and
pic16 not having to shadow sections with its own objects.
4. fixes wierdness where ELF targets would set CStringSection but not
CStringSection_. Factor the code better.
5. fixes some bugs in string lowering on ELF targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77294 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 0c795d61878156817cedbac51ec2921f2634c1a5 |
|
25-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Add new helpers for registering targets.
- Less boilerplate == good.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77052 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 4cb1e13769856716261a4d315f8202bd918502c3 |
|
19-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Put Target definitions inside Target specific header, and llvm namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76344 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 64cc97212346992892b6c92158c08cd93149a882 |
|
16-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Kill off <TARGET>MachineModule variables, and <TARGETASMPRINTER>ForceLink
variables.
- Module initialization functions supplanted the need for these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75886 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 5d77cad60bd82dfa2d00f78e26443d667922efbf |
|
16-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Lift addAssemblyEmitter into LLVMTargetMachine.
- No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75859 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| cfe9a605eea542d91e3db74289b69b7e317d90a6 |
|
16-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Lift DumpAsm / -print-emitted-asm functionality into LLVMTargetMachine.
- No intended functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75848 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| f05522974b3c1b9dc2644831364e19d5132e751b |
|
16-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Remove old style hacks to register AsmPrinter into TargetMachine.
- No intended functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75843 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 51b198af83cb0080c2709b04c129a3d774c07765 |
|
15-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Reapply TargetRegistry refactoring commits.
--- Reverse-merging r75799 into '.':
U test/Analysis/PointerTracking
U include/llvm/Target/TargetMachineRegistry.h
U include/llvm/Target/TargetMachine.h
U include/llvm/Target/TargetRegistry.h
U include/llvm/Target/TargetSelect.h
U tools/lto/LTOCodeGenerator.cpp
U tools/lto/LTOModule.cpp
U tools/llc/llc.cpp
U lib/Target/PowerPC/PPCTargetMachine.h
U lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
U lib/Target/PowerPC/PPCTargetMachine.cpp
U lib/Target/PowerPC/PPC.h
U lib/Target/ARM/ARMTargetMachine.cpp
U lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U lib/Target/ARM/ARMTargetMachine.h
U lib/Target/ARM/ARM.h
U lib/Target/XCore/XCoreTargetMachine.cpp
U lib/Target/XCore/XCoreTargetMachine.h
U lib/Target/PIC16/PIC16TargetMachine.cpp
U lib/Target/PIC16/PIC16TargetMachine.h
U lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp
U lib/Target/Alpha/AlphaTargetMachine.cpp
U lib/Target/Alpha/AlphaTargetMachine.h
U lib/Target/X86/X86TargetMachine.h
U lib/Target/X86/X86.h
U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
U lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp
U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
U lib/Target/X86/X86TargetMachine.cpp
U lib/Target/MSP430/MSP430TargetMachine.cpp
U lib/Target/MSP430/MSP430TargetMachine.h
U lib/Target/CppBackend/CPPTargetMachine.h
U lib/Target/CppBackend/CPPBackend.cpp
U lib/Target/CBackend/CTargetMachine.h
U lib/Target/CBackend/CBackend.cpp
U lib/Target/TargetMachine.cpp
U lib/Target/IA64/IA64TargetMachine.cpp
U lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp
U lib/Target/IA64/IA64TargetMachine.h
U lib/Target/IA64/IA64.h
U lib/Target/MSIL/MSILWriter.cpp
U lib/Target/CellSPU/SPUTargetMachine.h
U lib/Target/CellSPU/SPU.h
U lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
U lib/Target/CellSPU/SPUTargetMachine.cpp
U lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
U lib/Target/Mips/MipsTargetMachine.cpp
U lib/Target/Mips/MipsTargetMachine.h
U lib/Target/Mips/Mips.h
U lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
U lib/Target/Sparc/SparcTargetMachine.cpp
U lib/Target/Sparc/SparcTargetMachine.h
U lib/ExecutionEngine/JIT/TargetSelect.cpp
U lib/Support/TargetRegistry.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75820 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 2286f8dc4cec0625f7d7a14e2570926cf8599646 |
|
15-Jul-2009 |
Stuart Hastings <stuart@apple.com> |
Revert 75762, 75763, 75766..75769, 75772..75775, 75778, 75780, 75782 to repair broken LLVM-GCC build.
Will revert 75770 in the llvm-gcc trunk.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75799 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| f3f4715ac1de3ae4c89eeb96f23d6cd4876cc323 |
|
15-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Replace large swaths of copy-n-paste code with obvious helper function...
- Which was already present in the module!
- I skipped this xform for Alpha, since it runs an extra pass during assembly
emission, but not when emitting assembly via the DumpAsm flag.
- No functionality change.
--
ddunbar@giles:llvm$ svn diff | grep '^- ' | sort | uniq -c
18 - PM.add(AsmPrinterCtor(ferrs(), *this, true));
18 - assert(AsmPrinterCtor && "AsmPrinter was not linked in");
18 - if (AsmPrinterCtor)
18 - if (DumpAsm) {
18 - }
ddunbar@giles:llvm$ svn diff | grep '^+ ' | sort | uniq -c
18 + addAssemblyEmitter(PM, OptLevel, true, ferrs());
18 + if (DumpAsm)
--
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75782 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 6c05796294a7a0693d96c0c87194b9d5ddf55a94 |
|
15-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Kill off old (TargetMachine level, not Target level) match quality functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75780 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 03f4bc5d6cf777c8aa559c299ef7f85126872881 |
|
15-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Provide TargetMachine implementations with reference to Target they were created
from.
- This commit is almost entirely propogating the reference through the
TargetMachine subclasses' constructor calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75778 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 4246790aa84a530b0378d917023584c2c7adb4a9 |
|
15-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Register Target's TargetMachine and AsmPrinter in the new registry.
- This abuses TargetMachineRegistry's constructor for now, this will get
cleaned up in time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75762 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 71847813bc419f7a0667468136a07429c6d9f164 |
|
14-Jul-2009 |
David Greene <greened@obbligato.org> |
Have asm printers use formatted_raw_ostream directly to avoid a
dynamic_cast<>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75670 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 8097b65c432c3cc39339b6bb0ead9e1e09232ff7 |
|
10-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
make PIC vs DynamicNoPIC be explicit in PICStyles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75275 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 88e1fd539e80827931694e667c119ef01c7d1184 |
|
09-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
isPICStyleRIPRel() and friends are never true in -static mode.
Simplify code based on this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75099 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 482fa0f2bcfca5274b14c808526c8ae4fe97007d |
|
09-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
.o file writing shouldn't mess around with pic/relo models like the JIT does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75096 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| b2fc55b721e24e12b69edf791619935ba896d039 |
|
09-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
move a hack out of the asm-printer specific path to the main target selection path.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75095 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 11348ee263c37feed8f7695f631598ee112d2b44 |
|
09-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
many more cleanups, for example if in the "none" pic-style,
make sure we're set to static codegen. Simplify the decision
tree of target->picstyle/picmode settings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75094 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| e4df756289b6d80dcfd67b9f97fd464f62fd4902 |
|
09-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
When in -static mode, force the PIC style to none. Doing this requires fixing
code which conflated RIPRel PIC with x86-64. Fix these to just check for X86-64
directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75092 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| ac57e6e498abccb117e0d61c2fa0f733845e50cb |
|
06-Jul-2009 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Add the Object Code Emitter class. Original patch by Aaron Gray, I did some
cleanup, removed some #includes and moved Object Code Emitter out-of-line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74813 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 5bcc8bd0c60cfe583ee47852950aad9e532c932e |
|
01-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Remove unused AsmPrinter OptLevel argument, and propogate.
- This more or less amounts to a revert of r65379. I'm curious to know what
happened that caused this variable to become unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74579 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 4c1b606ecd9cb02c0ae1e468ad57d76d6d96bc26 |
|
27-Jun-2009 |
Chris Lattner <sabre@nondot.org> |
simplify some code and eliminate the symbolicAddressesAreRIPRel() predicate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74377 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 18c5987fa33ba9d57ea597e3131f664443765f4e |
|
27-Jun-2009 |
Chris Lattner <sabre@nondot.org> |
Reimplement rip-relative addressing in the X86-64 backend. The new
implementation primarily differs from the former in that the asmprinter
doesn't make a zillion decisions about whether or not something will be
RIP relative or not. Instead, those decisions are made by isel lowering
and propagated through to the asm printer. To achieve this, we:
1. Represent RIP relative addresses by setting the base of the X86 addr
mode to X86::RIP.
2. When ISel Lowering decides that it is safe to use RIP, it lowers to
X86ISD::WrapperRIP. When it is unsafe to use RIP, it lowers to
X86ISD::Wrapper as before.
3. This removes isRIPRel from X86ISelAddressMode, representing it with
a basereg of RIP instead.
4. The addressing mode matching logic in isel is greatly simplified.
5. The asmprinter is greatly simplified, notably the "NotRIPRel" predicate
passed through various printoperand routines is gone now.
6. The various symbol printing routines in asmprinter now no longer infer
when to emit (%rip), they just print the symbol.
I think this is a big improvement over the previous situation. It does have
two small caveats though: 1. I implemented a horrible "no-rip" modifier for
the inline asm "P" constraint modifier. This is a short term hack, there is
a much better, but more involved, solution. 2. I had to xfail an
-aggressive-remat testcase because it isn't handling the use of RIP in the
constant-pool reading instruction. This specific test is easy to fix without
-aggressive-remat, which I intend to do next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74372 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| a96751fc8ff1cc9a225ffbba73de53e2b9e1ae35 |
|
24-Jun-2009 |
Bob Wilson <bob.wilson@apple.com> |
Provide InitializeAllTargets and InitializeNativeTarget functions in the
C bindings. Change all the backend "Initialize" functions to have C linkage.
Change the "llvm/Config/Targets.def" header to use C-style comments to avoid
compile warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74026 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 1555a23335400143f2b54a66aedc4b5cbbb79f8d |
|
16-Jun-2009 |
Douglas Gregor <dgregor@apple.com> |
Introduce new headers whose inclusion forces linking and
initialization of all targets (InitializeAllTargets.h) or assembler
printers (InitializeAllAsmPrinters.h). This is a step toward the
elimination of relinked object files, so that we can build normal
archives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73543 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| c997d45ae5d2e25643d3ccc2c4ae44dcca6cdf5b |
|
11-Jun-2009 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Support for ELF Visibility
Emission for globals, using the correct data sections
Function alignment can be computed for each target using TargetELFWriterInfo
Some small fixes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73201 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| cf0a5770330a939788db321e2988617ce42de4ed |
|
06-Jun-2009 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
x86_64 now uses the correct ELF e_machine type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72986 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 424f8f339a0c70f58ce90254c0e04f637ab4da40 |
|
03-Jun-2009 |
Evan Cheng <evan.cheng@apple.com> |
For Darwin / x86_64, override -relocation-model=static to pic if the output is assembly since Darwin assembler does not really support -static codeine.
I view this as a temporary workaround until the assembler / linker changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72806 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 434dd4fd94f5f248492c675e4285e7d67342d4c4 |
|
01-Jun-2009 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Fix new CodeEmitter stuff to follow LLVM codying style. Patch by Aaron Gray
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72697 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| a3f99f90338d89354384ca25f53ca4450a1a9d18 |
|
30-May-2009 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
First patch in the direction of splitting MachineCodeEmitter in two subclasses:
JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72631 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 98a366d547772010e94609e4584489b3e5ce0043 |
|
30-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
Instead of passing in an unsigned value for the optimization level, use an enum,
which better identifies what the optimization is doing. And is more flexible for
future uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70440 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| be8cc2a3dedeb7685f07e68cdc4b9502eb97eb2b |
|
29-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
Second attempt:
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.
Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70343 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| c69d56f1154342a57c9bdd4c17a10333e3520127 |
|
28-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
r70270 isn't ready yet. Back this out. Sorry for the noise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70275 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 2e9d5f912a9841d3685ba0241abe1131943fed29 |
|
28-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.
Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'm not 100% sure if it's necessary to change it there...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70270 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 42bf74be1402df7409efbea089310d4c276fde37 |
|
25-Mar-2009 |
Evan Cheng <evan.cheng@apple.com> |
CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67668 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 57f0db833dc30404f1f5d28b23df326e520698ec |
|
24-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Overhaul my earlier submission due to feedback. It's a large patch, but most of
them are generic changes.
- Use the "fast" flag that's already being passed into the asm printers instead
of shoving it into the DwarfWriter.
- Instead of calling "MI->getParent()->getParent()" for every MI, set the
machine function when calling "runOnMachineFunction" in the asm printers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65379 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 288b824cef2a431a96e00ce6e88b10705f69734a |
|
07-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Make a comment a doxygen comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63988 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| f9a67a894366482cb2aa70a0e4dfeb5d76f91988 |
|
28-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Fix build with gcc-4.4: it doesn't like PICStyle
being both a namespace and a variable name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60208 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| bc5cbb8be9d935240be5a57a8f37c5258a9d0563 |
|
12-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Move the code that inserts X87 FP_REG_KILL instructions from a
special-purpose hook to a new pass. Also, add check to see if any
x87 virtual registers are used, to avoid doing any work in the
common case that no x87 code is needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59190 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 71b7f646de0d9e74198534d4a7b6059e6031ed59 |
|
25-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Move the code that adds the DeadMachineInstructionElimPass from
target-independent code to target-specific code. This prevents it
from running on targets that aren't using fast-isel.
In addition to saving compile time, this addresses the problem
that not all targets are prepared for it. In order to use this
pass, all instructions must declare all their fixed uses and
defs of physical registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58144 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 6520e20e4fb31f2e65e25c38b372b19d33a83df4 |
|
18-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Teach DAGCombine to fold constant offsets into GlobalAddress nodes,
and add a TargetLowering hook for it to use to determine when this
is legal (i.e. not in PIC mode, etc.)
This allows instruction selection to emit folded constant offsets
in more cases, such as the included testcase, eliminating the need
for explicit arithmetic instructions.
This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp
that attempted to achieve the same effect, but wasn't as effective.
Also, fix handling of offsets in GlobalAddressSDNodes in several
places, including changing GlobalAddressSDNode's offset from
int to int64_t.
The Mips, Alpha, Sparc, and CellSPU targets appear to be
unaware of GlobalAddress offsets currently, so set the hook to
false on those targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57748 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| b8cab9227a0f6ffbdaae33e3c64268e265008a6a |
|
14-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Fix command-line option printing to print two spaces where needed,
instead of requiring all "short description" strings to begin with
two spaces. This makes these strings less mysterious, and it fixes
some cases where short description strings mistakenly did not
begin with two spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57521 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 97135e1ee51357245561a5108f90a8a1161431a1 |
|
26-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Factor out the code for determining when symblic addresses
require RIP-relative addressing and use it to fix a bug
in X86FastISel in x86-64 PIC mode, where it was trying to
use base/index registers with RIP-relative addresses. This
fixes a bunch of x86-64 testsuite failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56676 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 32b952a2a60d1091e0e17bb6ce788cd1d41e6f8b |
|
25-Sep-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Reapply 56585:56589 with proper fix for some gcc versions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56621 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 688535e005f370a98e82c10be7346eb981b3dfc7 |
|
25-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
Temporarily backing out 56585:56589 to unbreak the build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56607 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 8490322fa9d4c3359015510e772e231273476739 |
|
25-Sep-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Use crazy template-based inheritance instead of virtual one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56585 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| cb3718832375a581c5ea23f15918f3ea447a446c |
|
21-Aug-2008 |
Owen Anderson <resistor@mac.com> |
Use raw_ostream throughout the AsmPrinter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55092 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 3c3bc48d331db26aaff3ff4f7a61f60a17fea112 |
|
17-Aug-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Move X86 assembler printers into separate directory. This allows JIT-only users not to link it in (use 'x86codegen' llvm-config arg for this)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54886 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 5f777192a0de98e636bc560c3187fbdac3614000 |
|
12-Aug-2008 |
Dale Johannesen <dalej@apple.com> |
Make x86-64 JIT changes Darwin-specific.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54700 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 50dd1d028021bd7fd8bca3f33633ea59577c9d5e |
|
12-Aug-2008 |
Dale Johannesen <dalej@apple.com> |
Some fixes for x86-64 JIT. Make it use small code
model, except for external calls; this makes
addressing modes PC-relative. Incomplete.
The assertion at the top of Emitter::runOnMachineFunction
was obviously bogus (always true) so I removed it.
If someone knows what the correct test should be to cover
all the various targets, please fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54656 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 4468b7a988b09ceb9f2772d7af948847afd3bb7d |
|
09-Jul-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Split X86TargetAsmInfo into 4 subtarget-specific classes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53299 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 09d3fdc254c0b922c38f7c2bcad27c02fa0904f3 |
|
22-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Remove unnecessary #includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52613 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 5bbaf01b84d22fc654588e1e3c2db5be4cb41531 |
|
23-May-2008 |
Evan Cheng <evan.cheng@apple.com> |
X86CodeEmitter should not set PIC style to None at initialization time. This will break codegen if relocation model is changed to PIC_ later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51455 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 844731a7f1909f55935e3514c9e713a62d67662e |
|
13-May-2008 |
Dan Gohman <gohman@apple.com> |
Clean up the use of static and anonymous namespaces. This turned up
several things that were neither in an anonymous namespace nor static
but not intended to be global.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51017 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| d52bdaff0c73c105167b70941af245f46b70753f |
|
23-Apr-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Be over-conservative: scan for all used virtual registers and calculate maximal stack alignment in assumption, that there will be spill of vector register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50167 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 856914fe0084278d11edec79c8b707a6276b8857 |
|
23-Apr-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Add X86 Maximal Stack Alignment Calculator Pass before RA
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50166 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 8c278295147c7612c968f983a6d5f20e9c5d47e1 |
|
23-Mar-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Provide a JIT selector on win64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48704 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| c15b81ba17151e0e0d85724c9c70ecfe83e69df5 |
|
23-Mar-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Hack out the PIC mode on Win64 targets. This needs to be investigated later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48703 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| bfae83139dcb4fffd50b939e1b1224b0126f04d4 |
|
11-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Use PassManagerBase instead of FunctionPassManager for functions
that merely add passes. This allows them to be used with either
FunctionPassManager or PassManager, or even with a custom new
kind of pass manager.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48256 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| d703ed6aed98c8156829399efbafb13a3cca0b69 |
|
29-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
Added option -align-loops=<true/false> to disable loop aligner pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47736 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| fb8075d03f5c87bd57dcc9c5f2304f6b13c55aad |
|
28-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47703 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 7c1c261272b43f2a9397c3052819b92c53918075 |
|
20-Feb-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Remove bunch of gcc 4.3-related warnings from Target
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47369 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| b353459d68a53733f2551d04e84dd54d8df8b67f |
|
08-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
Minor fix to enable x86-64 pic jit (still fails for other reasons).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45734 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 4ee451de366474b9c228b4e5fa573795a715216d |
|
29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Remove attribution from file headers, per discussion on llvmdev.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| aabe38bf0c773dffed5c12a35e894915418af512 |
|
22-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
Preliminary PIC JIT support for X86 (32-bit) / Darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45313 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| a9ab84666927e2ecb79bc7cba6c0df0c88c03912 |
|
22-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
Oops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45312 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 889ac61113e82abb71138d91a9b7edd6be76cbe0 |
|
22-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
Allow JIT with non-static relocation model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45304 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 27f92be8b7e83d3fe612ecf28393a9ce8334898a |
|
06-Aug-2007 |
Dale Johannesen <dalej@apple.com> |
Move lengthy conditional down 1 level per review comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 8c78a269557ac9f2173cccdb17886f523e5679aa |
|
04-Aug-2007 |
Dale Johannesen <dalej@apple.com> |
Make x86 long double alignment 32 for everything but
Darwin (which makes size within a struct==96)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40796 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 8c1e6a119a68b258365677a9ee5176af3525a26f |
|
03-Aug-2007 |
Dale Johannesen <dalej@apple.com> |
long double patch 2 of N. Handle it in TargetData.
(I've tried to get the info right for all targets,
but I'm not expert on all of them - check yours.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40792 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 8bd6035750f1b290832a3b1c90766d9b45ed8d6b |
|
20-Jul-2007 |
Evan Cheng <evan.cheng@apple.com> |
Added -print-emitted-asm to print out JIT generated asm to cerr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40123 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 87bdba6d6a1684373c94df0363a3b620de6dab6c |
|
09-Jul-2007 |
Chris Lattner <sabre@nondot.org> |
The various "getModuleMatchQuality" implementations should return
zero if they see a target triple they don't understand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38463 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| cdc694440b930e085cfff61fe5a22082ea63a7c0 |
|
23-Feb-2007 |
Evan Cheng <evan.cheng@apple.com> |
80 col. violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34520 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| d2b7cec527a0efa552628378ebca7a8ca63bb45d |
|
14-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
Generalize TargetData strings, to support more interesting forms of data.
Patch by Scott Michel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34266 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| eb1ac3385096dd6f45a1548f3492f21648f55b4c |
|
08-Feb-2007 |
Bill Wendling <isanbard@gmail.com> |
Moved the MachOWriter and ELFWriter out of the Target/* files. Placed the
definition of it into the CodeGen library. This is so that a backend doesn't
necessarily add in these writers if it doesn't use them (like in the lli
program).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34034 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| ebd9b73ecd61cc30a3af80414dc82a5c66fb86c7 |
|
23-Jan-2007 |
Evan Cheng <evan.cheng@apple.com> |
Double and long preferred alignment is 8 byte.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33446 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 58092e35a3368e130438cbc793c8f9dce2e4fe0f |
|
20-Jan-2007 |
Chris Lattner <sabre@nondot.org> |
Teach TargetData to handle 'preferred' alignment for each target, and use
these alignment amounts to align scalars when we can. Patch by Scott Michel!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33409 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| ae19abc2cc81fea233d08148287052204112f489 |
|
18-Jan-2007 |
Evan Cheng <evan.cheng@apple.com> |
- Target PIC style is no longer affected by relocation model.
- In x86-64 mode, symbols with external linkage (not just symbols which are
defined externally) requires GOT indirect reference.
- Stylistic code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33345 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| e911615c4769d793588087b5321d303ecb9661c7 |
|
17-Jan-2007 |
Bill Wendling <isanbard@gmail.com> |
Revert patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33298 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 22fb30231b87e7b090ab1b135cb478c0c3feefe4 |
|
17-Jan-2007 |
Bill Wendling <isanbard@gmail.com> |
Create the specified TargetObjInfo and use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33291 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 7f70559bc47877bafc6dfa92b7df6b64650445fb |
|
12-Jan-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
* PIC codegen for X86/Linux has been implemented
* PIC-aware internal structures in X86 Codegen have been refactored
* Visibility (default/weak) has been added
* Docs fixes (external weak linkage, visibility, formatting)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33136 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 317848f4a11f7fe55afdd6d90ded8444069b56fb |
|
03-Jan-2007 |
Anton Korobeynikov <asl@math.spbu.ru> |
Really big cleanup.
- New target type "mingw" was introduced
- Same things for both mingw & cygwin are marked as "cygming" (as in
gcc)
- .lcomm is supported here, so allow LLVM to use it
- Correctly use underscored versions of setjmp & _longjmp for both mingw
& cygwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32833 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 2b2bc688849234b9ee5e0c8704a2984f0e9cbba3 |
|
22-Dec-2006 |
Anton Korobeynikov <asl@math.spbu.ru> |
Refactored JIT codegen for mingw32. Now we're using standart relocation
type for distinguish JIT & non-JIT instead of "dirty" hacks :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32745 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 15fccf1d9395ccf3f60404e71dc9db029d04f910 |
|
20-Dec-2006 |
Anton Korobeynikov <asl@math.spbu.ru> |
Fixed dllimported symbols support during JIT'ing. JIT on mingw32
platform should be more or less workable. At least, sim is running fine
under lli :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32711 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 21847f43e8d7964816ad1f82a6e8d3cf958012cb |
|
19-Dec-2006 |
Chris Lattner <sabre@nondot.org> |
The x86-64 target machine should be used for amd64-* target triples.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32678 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 28b51439f3b99bac332f32778ef26d000dc85301 |
|
05-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
- Switch X86-64 JIT to large code size model.
- Re-enable some codegen niceties for X86-64 static relocation model codegen.
- Clean ups, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32238 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 2c312adac9755c0cf626ffd697daa736880673de |
|
04-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
Non-darwin gcc should default to static relocation to match gcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32184 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 6345d75729392d9b50383f1b5c7f92d477572290 |
|
17-Nov-2006 |
Bill Wendling <isanbard@gmail.com> |
Removed even more std::cerr and #include <iostream> things.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31813 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 25ab690a43cbbb591b76d49e3595b019c32f4b3f |
|
08-Sep-2006 |
Evan Cheng <evan.cheng@apple.com> |
Committing X86-64 support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30177 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| fde1b3bb2f15b74c713d98a79fcddaff1ac00dd1 |
|
08-Sep-2006 |
Jim Laskey <jlaskey@mac.com> |
1. Remove condition on delete.
2. Protect and outline createTargetAsmInfo.
3. Misc. kruft.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30169 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 2130b99eb29796d80b978f7c4b4f64dcca0d1309 |
|
04-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Fix some X86 JIT failures. This should really come from TargetJITInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30102 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 1911fd4f85aebcd4d7b8f27313c5a363eebf49cb |
|
04-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Completely rearchitect the interface between targets and the pass manager.
This pass:
1. Splits TargetMachine into TargetMachine (generic targets, can be implemented
any way, like the CBE) and LLVMTargetMachine (subclass of TM that is used by
things using libcodegen and other support).
2. Instead of having each target fully populate the passmgr for file or JIT
output, move all this to common code, and give targets hooks they can
implement.
3. Commonalize the target population stuff between file emission and JIT
emission.
4. All (native code) codegen stuff now happens in a FunctionPassManager, which
paves the way for "fast -O0" stuff in the CFE later, and now LLC could
lazily stream .bc files from disk to use less memory.
5. There are now many fewer #includes and the targets don't depend on the
scalar xforms or libanalysis anymore (but codegen does).
6. Changing common code generator pass ordering stuff no longer requires
touching all targets.
7. The JIT now has the option of "-fast" codegen or normal optimized codegen,
which is now orthogonal to the fact that JIT'ing is being done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30081 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| c4fa386471cb1ff9d1f2acc24e2d0682e5a17b1b |
|
03-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Simplify target construction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30070 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| e50794adda9256d6fe2f378c01ee3c44e1fbd86c |
|
29-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
- Enable x86 isel preprocessing by default unless -fast is specified.
- Also disable isel load folding if -fast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29956 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| eb883af3903286ac20f5bbf549c555c9ef961e14 |
|
23-Aug-2006 |
Nate Begeman <natebegeman@mac.com> |
Initial checkin of the Mach-O emitter. There's plenty of fixmes, but it
does emit linkable .o files in very simple cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29850 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 8f74680c78b1913fa280637e9f626d0d70f918ed |
|
02-Aug-2006 |
Nate Begeman <natebegeman@mac.com> |
Disable LSR at -fast
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29467 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 35d86fef1f1fc5845366c7c36803a6a3334d8a2e |
|
26-Jul-2006 |
Chris Lattner <sabre@nondot.org> |
Rename RelocModel::PIC to PIC_, to avoid conflicts with -DPIC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29307 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 55fc28076fa48723bd170e51638b3b5974ca0fa1 |
|
25-Jul-2006 |
Evan Cheng <evan.cheng@apple.com> |
- Refactor the code that resolve basic block references to a TargetJITInfo
method.
- Added synchronizeICache() to TargetJITInfo. It is called after each block
of code is emitted to flush the icache. This ensures correct execution
on targets that have separate dcache and icache.
- Added PPC / Mac OS X specific code to do icache flushing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29276 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 1790d44d0dbe3412e012be5e43b89e67064bdb86 |
|
16-Jun-2006 |
Chris Lattner <sabre@nondot.org> |
Don't pass target name into TargetData anymore, it is never used or needed.
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28830 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| aa3c1410b427909da350f2b5e8d4ec3db62a3618 |
|
30-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fix a build breaker.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28574 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| bcd8a8264e35e147e23c219f0435c9277e24ec66 |
|
21-May-2006 |
Owen Anderson <resistor@mac.com> |
Make TargetData strings less redundant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28423 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| d988b32abad0634df07c18629e899f256935fde7 |
|
20-May-2006 |
Owen Anderson <resistor@mac.com> |
Make all of the TargetMachine subclasses use the new string TargetData methods.
This is part of the on-going work on PR 761.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28414 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| a69571c7991813c93cba64e88eced6899ce93d81 |
|
03-May-2006 |
Owen Anderson <resistor@mac.com> |
Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.
This fixes PR 759.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28074 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 957e1674e797c8880114fb27a3aa1c32f9967329 |
|
08-Apr-2006 |
Nate Begeman <natebegeman@mac.com> |
Disable switch lowering for targets based on the selection dag isel,
letting the code generator handle them directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27539 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| f15485a8d0dff5f720b7ad27346129ac5c3ec503 |
|
27-Mar-2006 |
Nate Begeman <natebegeman@mac.com> |
SelectionDAGISel can now natively handle Switch instructions, in the same
manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks. The new approach has several advantages:
it is faster, it generates significantly smaller code in many cases, and
it paves the way for implementing dense switch tables as a jump table by
handling switches directly in the instruction selector.
This functionality is currently only enabled on x86, but should be safe for
every target. In anticipation of making it the default, the cfg is now
properly updated in the x86, ppc, and sparc select lowering code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27156 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| bc641b9d8b5ecafe0137c1a49f4777608981d81b |
|
23-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Eliminate IntrinsicLowering from TargetMachine.
Make the CBE and V9 backends create their own, since they're the only ones that use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26974 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 5fef51e9aa015e0936d6a6c93b71bb386be9c8f5 |
|
19-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Turning on LSR by default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26861 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 714554d70717c73e0542ca93df36fa78765f87af |
|
16-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added a way for TargetLowering to specify what values can be used as the
scale component of the target addressing mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26802 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| c4c6257c1a154279bf10e9498d46d6c1793dbaa7 |
|
14-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added getTargetLowering() to TargetMachine. Refactored targets to support this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26742 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 627fb57e191cb4b5ba85e3e7842c5c4826179fe7 |
|
09-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Add option -enable-x86-lsr to enable x86 loop strength reduction pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26665 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 4c1aa866578f7a358407a22fe55b454f52a24325 |
|
22-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
- Added option -relocation-model to set relocation model. Valid values include static, pic,
dynamic-no-pic, and default.
PPC and x86 default is dynamic-no-pic for Darwin, pic for others.
- Removed options -enable-pic and -ppc-static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26315 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 6428302f3d5c70b3fa4bdedfc14cdd9104e271cf |
|
18-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Disable PIC for JIT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26281 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 4c5dcf54ff927d377655d673ac5d560b39008e37 |
|
17-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
Kill the x86 pattern isel. boom.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26246 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 4efab056e16595b4062e85ee2619b7f6e0430964 |
|
03-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
remove an old comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25940 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 299f9bab47d53ca79be5c9ed53f22fd5846b9cd6 |
|
03-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Remove the X86PeepholeOptimizerPass, a truly horrible old hack that is now
obsolete. yaay :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25939 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 8e44f0756ffdcba4aeddee00dd643b3839acd434 |
|
27-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Bye bye Pattern ISel, hello DAG ISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25700 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 559806f575297866609c7bef0e5c1084dcdda9a5 |
|
27-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
x86 CPU detection and proper subtarget support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25679 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 97c7fc351e4dd73041bc7e47c8a144216a50a648 |
|
26-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added preliminary x86 subtarget support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25645 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 2c2c6c61f100bc7c3df873b11203fcea1b5e18fe |
|
23-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Add explicit #includes of <iostream>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25515 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 98f5dab8a78248c79dbdf70bb5751834a9b962bd |
|
20-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Stop doing that accidental commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25474 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 21d544393480c7cfadf9a7c389be1b99d5017440 |
|
20-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
A few more SH{L|R}D peepholes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25473 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| cce47faf522711223ca09163765f42c5fe71ee9d |
|
20-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Didn't mean to commit the last one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25469 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 956044cf0398c3a4db94a56fde6e87ac880d8f19 |
|
20-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added i16 SH{L|R}D patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25468 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| bbc8ddbea30ea807ef6deeaa2b7965e38ac3c28a |
|
20-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
SSE2 floating point load / store patterns. SSE2 fp to int conversion patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24886 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 56323c761a73c5b227dc89085e1350c43f7bfb2f |
|
17-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Only lower SELECT when using DAG based isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24755 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| a763969837e708c7a169a1ea91a9168d040d79eb |
|
12-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
remove some never-completed and now-obsolete code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24671 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| c961eea6cb8d0a2d75fa074832f5c797f90330ef |
|
16-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
initial step at adding a dag-to-dag isel for X86 backend. Patch contributed
by Evan Cheng!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24371 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| dbdbf0ce2eef7b6585397121f56d3845e04866d1 |
|
15-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Separate X86ISelLowering stuff out from the X86ISelPattern.cpp file. Patch
contributed by Evan Cheng.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24358 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| ce8eb0c16b7197eaa886f90c1ef9ab9bbf1957c4 |
|
08-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24233 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| b1e1180ca0b32f37aa74d7ad703eeaf91e66c8fa |
|
01-Sep-2005 |
Jim Laskey <jlaskey@mac.com> |
1. Use SubtargetFeatures in llc/lli.
2. Propagate feature "string" to all targets.
3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23192 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 73bfa7152481620d60bf63d5397dfe35bbc9c098 |
|
19-Aug-2005 |
Nate Begeman <natebegeman@mac.com> |
Remove the X86 and PowerPC Simple instruction selectors; their time has
passed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22886 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 00b16889ab461b7ecef1c91ade101186b7f1fce2 |
|
27-Jul-2005 |
Jeff Cohen <jeffc@jolt-lang.org> |
Eliminate all remaining tabs and trailing spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22523 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| fb5792f416089d8d8d0c6ee62c1f41a55d2cf75d |
|
12-Jul-2005 |
Nate Begeman <natebegeman@mac.com> |
Implement Subtarget support
Implement the X86 Subtarget.
This consolidates the checks for target triple, and setting options based
on target triple into one place. This allows us to convert the asm printer
and isel over from being littered with "forDarwin", "forCygwin", etc. into
just having the appropriate flags for each subtarget feature controlling
the code for that feature.
This patch also implements indirect external and weak references in the
X86 pattern isel, for darwin. Next up is to convert over the asm printers
to use this new interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22389 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 81b6ed7ed1dbf1e5cc001aaff2dee5bdd8d1122e |
|
11-Jul-2005 |
Chris Lattner <sabre@nondot.org> |
Refactor things a bit to allow the ELF code emitter to run the X86 machine code emitter
after itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22376 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| f63be7d3959939b2ffaf0bba5519b71216ec9ee6 |
|
06-Jul-2005 |
Nate Begeman <natebegeman@mac.com> |
First round of support for doing scalar FP using the SSE2 ISA extension and
XMM registers. There are many known deficiencies and fixmes, which will be
addressed ASAP. The major benefit of this work is that it will allow the
LLVM register allocator to allocate FP registers across basic blocks.
The x86 backend will still default to x87 style FP. To enable this work,
you must pass -enable-sse-scalar-fp and either -sse2 or -sse3 to llc.
An example before and after would be for:
double foo(double *P) { double Sum = 0; int i; for (i = 0; i < 1000; ++i)
Sum += P[i]; return Sum; }
The inner loop looks like the following:
x87:
.LBB_foo_1: # no_exit
fldl (%esp)
faddl (%eax,%ecx,8)
fstpl (%esp)
incl %ecx
cmpl $1000, %ecx
#FP_REG_KILL
jne .LBB_foo_1 # no_exit
SSE2:
addsd (%eax,%ecx,8), %xmm0
incl %ecx
cmpl $1000, %ecx
#FP_REG_KILL
jne .LBB_foo_1 # no_exit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22340 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 07a9144efea7e870c53552d73dc078de8a3d0731 |
|
27-Jun-2005 |
Chris Lattner <sabre@nondot.org> |
Add support to the X86 backend for emitting ELF files. To use this, we
currently use: llc t.bc --filetype=obj
This will produce a t.o file which is dumpable with readelf. Currently
the file produced is empty, but the scaffolding to do more is now in place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22292 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 0431c96cec9576611f06c513d6adcab0f950c18c |
|
25-Jun-2005 |
Chris Lattner <sabre@nondot.org> |
Refactor the addPassesToEmitAssembly interface into a addPassesToEmitFile
interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22282 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 664941859886c3337efce455c9df119bc48878a2 |
|
12-May-2005 |
Chris Lattner <sabre@nondot.org> |
Enable pattern isel by default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21898 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 0e0a7a45d3d0a8c865a078459d2e1c6d8967a100 |
|
22-Apr-2005 |
Misha Brukman <brukman+llvm@gmail.com> |
* Remove trailing whitespace
* Convert tabs to spaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21426 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| f8b02949e3d13e9b7cd38e029fcbf3e799366aa7 |
|
16-Apr-2005 |
Nate Begeman <natebegeman@mac.com> |
Make pattern isel default for ppc
Add new ppc beta option related to using condition registers
Make pattern isel control flag (-enable-pattern-isel) global and tristate
0 == off
1 == on
2 == target default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21309 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 18ad19488d41e074090169f7ab0b629f3d995210 |
|
07-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Allow the selection-dag based selector to be diabled with -disable-pattern-isel.
For now, this is the default, as the current selector is missing some big pieces.
To enable the new selector, pass -disable-pattern-isel=false to llc or lli.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19335 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 1c32f79a82293d0ef4cdc8decf67057356674af9 |
|
03-Jan-2005 |
Jeff Cohen <jeffc@jolt-lang.org> |
Revert elimination of global variable hack... still needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19273 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 40296bdf273bebd55899ce3199feba5409b59c27 |
|
02-Jan-2005 |
Jeff Cohen <jeffc@jolt-lang.org> |
Eliminate the use of the global variable hack in the X86 target that was used
to get Visual Studio to link in X86.lib to the executables that need it. There
is another way of doing it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19252 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 3ea78c4276dfbf5a078292ad8fd8dc952c4ff8b9 |
|
12-Dec-2004 |
Chris Lattner <sabre@nondot.org> |
Use the target triple to pick this target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18830 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| a62869b064f58d085a8426184a8abb4637104746 |
|
02-Nov-2004 |
Chris Lattner <sabre@nondot.org> |
Fix a warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17431 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 7cc372bfc36669ce4838a85da91b491486fb6a15 |
|
01-Nov-2004 |
Chris Lattner <sabre@nondot.org> |
Add placeholder variable to make Win32 work, applied for Morten Ofstad
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17406 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 7d0974b9a07aea5488d8123c6df6d79f1b40bc40 |
|
18-Oct-2004 |
Chris Lattner <sabre@nondot.org> |
Improve compatibility with VC++, patch contributed by Morten Ofstad!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17126 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 222b86f6947b68f6fd3b298c17ea8dd7f2e1455f |
|
09-Oct-2004 |
Chris Lattner <sabre@nondot.org> |
The person who was planning to add SSE support isn't anymore, so disable
the -sse* options (to avoid misleading people).
Also, the stack alignment of the target doesn't depend on whether SSE is
eventually implemented, so remove a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16860 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 551ccae044b0ff658fe629dd67edd5ffe75d10e8 |
|
02-Sep-2004 |
Reid Spencer <rspencer@reidspencer.com> |
Changes For Bug 352
Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16137 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 6f0161aac396de29d5a296f8b0ee81827b7e0a9c |
|
24-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
Add -sse[,2,3] arguments to LLC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16018 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| f60b91cbe333963c4a077972b3491429815314ee |
|
16-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
Disable the pattern isel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15787 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 1ab7c5b5e891804411d85d98403536f705d82fcc |
|
01-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
Completely disable the pattern isel until it is more substantial.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15380 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| cc46c4fceeef4d5a359a1188b737689a69f5be5f |
|
22-Jul-2004 |
Chris Lattner <sabre@nondot.org> |
Remove some (LARGE) abandoned code for the release. If this is ever needed
again in the future, it can be resurrected out of CVS
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15112 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 0cf0c3746995e8b95fc055cdf8e7210200cb942d |
|
11-Jul-2004 |
Chris Lattner <sabre@nondot.org> |
Delete the allocate*TargetMachine function, which is now dead .
The shared command line options are now in a header that makes sense.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14756 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 71d24aab2d52986cc8203d0c268adb88b0001bc4 |
|
11-Jul-2004 |
Chris Lattner <sabre@nondot.org> |
Make these format a bit nicer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14747 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| d36c970a11633414e56ac1e03010dafa4a63b9c4 |
|
11-Jul-2004 |
Chris Lattner <sabre@nondot.org> |
Auto-registrate target
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14745 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 9a9ca0f06bee3da8ef1f3874cccdfdf54ea2a74a |
|
02-Jul-2004 |
Chris Lattner <sabre@nondot.org> |
Remove dead blocks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14564 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 23a53aa9c4317a728cd185e8e803d7c7d9da5456 |
|
29-Jun-2004 |
Chris Lattner <sabre@nondot.org> |
I believe that the code generator now properly handles dead basic blocks. If not,
this is a bug, and should be fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14476 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 30483737486d00e5c1c37f51138419aa08d8b5e3 |
|
20-Jun-2004 |
Chris Lattner <sabre@nondot.org> |
Move the IntrinsicLowering header into the CodeGen directory, as per PR346
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14266 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 32305f7763ac0ab7ddad2ee97bd075591962cb3a |
|
10-Jun-2004 |
Chris Lattner <sabre@nondot.org> |
Fix the fixed stack offset, patch contributed by Vladimir Prus
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14110 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 99c59e8e217cd08bc53f7a260dce6c7a66b583f9 |
|
23-May-2004 |
Chris Lattner <sabre@nondot.org> |
Add support for accurate garbage collection to the LLVM code generators
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13696 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 0a8fd30c1bb4f324a9bca9b7b7c0efb0fa341112 |
|
06-Apr-2004 |
Jakub Staszak <kuba@gcc.gnu.org> |
Tablgen files for really simple instruction selector
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12714 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 08bde1870aede8a3f9eeaf9171960a0fc73f1887 |
|
01-Apr-2004 |
Chris Lattner <sabre@nondot.org> |
The X86 backend no longer needs the select lowering pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12578 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 12d96a0b4d78959c7f117838ec015aca9fee3e2a |
|
30-Mar-2004 |
Chris Lattner <sabre@nondot.org> |
Add direct support for integer select instructions, though we still don't support
folding compares into the select yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12553 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 5abd61f6d94bc9eab30778e05e69781a0d07781a |
|
30-Mar-2004 |
Chris Lattner <sabre@nondot.org> |
Add the select lowering pass to get initial support for select instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12541 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 323819e4e1e3573072e7dbd82b0ebd75b5df0648 |
|
04-Mar-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
make -print-machineinstrs work for both SparcV9 and X86
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12122 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 87124425d093bba29ddf2bc7b13232b276031abd |
|
25-Feb-2004 |
Chris Lattner <sabre@nondot.org> |
Fix failures in 099.go due to the cfgsimplify pass creating switch instructions
where there did not used to be any before
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11829 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| c81efdc59cd2ce5410cefd7ab5cb52cfd7ac3aad |
|
15-Feb-2004 |
Alkis Evlogimenos <alkis@evlogimenos.com> |
Add back machine code deleter pass until we get a MachineCode pass
that will be responsible for the creation of MachineFunctions and will
be required by all MachineFunctionPass passes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11453 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| c0b9dc5be79f009d260edb5cd5e1d8346587aaa2 |
|
12-Feb-2004 |
Alkis Evlogimenos <alkis@evlogimenos.com> |
Change MachineBasicBlock's vector of MachineInstr pointers into an
ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11340 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| f6f263ce8cf7963561295dea1add17f68063cd26 |
|
09-Feb-2004 |
Chris Lattner <sabre@nondot.org> |
Add a new (hidden) option that is useful for profiling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11218 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 74ceb298fed410b23b79f8b21fba5a97623f1ea0 |
|
04-Feb-2004 |
Brian Gaeke <gaeke@uiuc.edu> |
Take away the default iostream argument of createMachineFunctionPrinterPass(),
at Chris's request.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11120 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| f70e0c216c074bd2ae2b08178f5512849545db4e |
|
28-Dec-2003 |
Chris Lattner <sabre@nondot.org> |
Clean up a lot of the code I added yesterday by exposing the IntrinsicLowering
implementation from the TargetMachine directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10636 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 4482715f3d1c165be82bd5aed07231f956e472ef |
|
28-Dec-2003 |
Chris Lattner <sabre@nondot.org> |
implement support for the intrinsic lowering functionality
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10629 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| e0bb3e766d977d129da6add3bad6793ca20ab151 |
|
20-Dec-2003 |
Alkis Evlogimenos <alkis@evlogimenos.com> |
Remove floating point killer pass. This is now implemented in the
instruction selector by adding a new pseudo-instruction
FP_REG_KILL. This instruction implicitly defines all x86 fp registers
and is a terminator so that passes which add machine code at the end
of basic blocks (like phi elimination) do not add instructions between
it and the branch or return instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10562 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 655239cc6b7a3045df386b91b14b89e3f0adf434 |
|
20-Dec-2003 |
Chris Lattner <sabre@nondot.org> |
Finally, _actually delete the machine code_ for a function, after it has
been emitted. Also, since the FPK pass is causing memory access violations,
disable it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10559 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 1e60a9165dc4d6ce5650dacc026f2942696af920 |
|
20-Dec-2003 |
Chris Lattner <sabre@nondot.org> |
Rip JIT specific stuff out of TargetMachine, as per PR176
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10542 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 359b65f782cc323daba4f8c5c21c70a98c9d40ea |
|
13-Dec-2003 |
Alkis Evlogimenos <alkis@evlogimenos.com> |
Add a floating point killer pass. This pass runs before register
allocaton on the X86 to add information to the machine code denoting
that our floating point stackifier cannot handle virtual point
register that are alive across basic blocks. This pass adds an
implicit def of all virtual floating point register at the end of each
basic block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10446 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 9b527704f75d1ae15b9c290090c8991171a13af1 |
|
01-Dec-2003 |
Chris Lattner <sabre@nondot.org> |
Add an option to enable the SSA based peephole optimizer.
Eventually this pass will provide substantially better code in the interim between when we
have a crappy isel and nice isel. Unfortunately doing so requires fixing the backend to
actually SUPPORT all of the fancy addressing modes that we now generate, and writing a DCE
pass for machine code. Each of these is a fairly substantial job, so this will remain disabled
for the immediate future. :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10276 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| d0fde30ce850b78371fd1386338350591f9ff494 |
|
11-Nov-2003 |
Brian Gaeke <gaeke@uiuc.edu> |
Put all LLVM code into the llvm namespace, as per bug 109.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9903 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 2bee057a56e3ab7340f5417e977be412ce827351 |
|
06-Nov-2003 |
Chris Lattner <sabre@nondot.org> |
Fix warnings building on sparc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9758 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| b576c94c15af9a440f69d9d03c2afead7971118c |
|
20-Oct-2003 |
John Criswell <criswell@uiuc.edu> |
Added LLVM project notice to the top of every C++ source file.
Header files will be on the way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9298 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 682ce72e60efee791d48ff9fb753064115441ec7 |
|
20-Oct-2003 |
Brian Gaeke <gaeke@uiuc.edu> |
Make replaceMachineCodeForFunction return void.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9288 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 6c09db2959462506ebfea25a77cd61eea63ba161 |
|
20-Oct-2003 |
Chris Lattner <sabre@nondot.org> |
Eliminate code for pointer size and endianness emulation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9281 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| e5f6859911108f1fa445acb2ac29902d56fcfa58 |
|
17-Oct-2003 |
Brian Gaeke <gaeke@uiuc.edu> |
You can't just blat the address into memory, you have to blat its
displacement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9210 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 9b8c2911d9651179a62fea986a7346792a389d92 |
|
17-Oct-2003 |
Brian Gaeke <gaeke@uiuc.edu> |
Implement replaceMachineCodeForFunction() for x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9204 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| c58c169eda62e1c76814d731a567d15047f302d4 |
|
05-Oct-2003 |
Chris Lattner <sabre@nondot.org> |
Instead of hacking in custom support for Invoke/Unwind, use the LowerInvoke pass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8871 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 7237ecef134cd88aad13190f078ff23057bfcb71 |
|
02-Oct-2003 |
Alkis Evlogimenos <alkis@evlogimenos.com> |
Moved enum and command-line option in separate file. Also added function that returns the user selected register allocator to the caller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8819 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| eed462b6857e596d327886acab4ad7e22db953ce |
|
02-Oct-2003 |
Alkis Evlogimenos <alkis@evlogimenos.com> |
Change llc command line for register allocators
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8815 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 77e78d050af5c764a6d7fe77adb71842dc2e99d3 |
|
01-Oct-2003 |
Alkis Evlogimenos <alkis@evlogimenos.com> |
Revert previous change. For some reason this went into the main branch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8805 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
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| 6ac2c8c6731fdebd9373aa9e0faa21df38dc6cfe |
|
01-Oct-2003 |
Alkis Evlogimenos <alkis@evlogimenos.com> |
Added command line option for linear scan allocator
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8804 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
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| bb144a892b51ee4dc53471c490bda28de3cbcd79 |
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24-Aug-2003 |
Chris Lattner <sabre@nondot.org> |
Targets should configure themselves based on a Module, not some wierd flags
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8132 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
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| 7540565863c11ae3a65fe1a8159cedc0caf55c07 |
|
18-Aug-2003 |
Chris Lattner <sabre@nondot.org> |
Fix ABI issue: Longs really do need to be only 4 byte aligned on X86.
This bug caused miscompilation of programs using 'struct stat', but only if
compiled with support for 64-bit filesystems. This could in theory effect
other things, but only if the LLVM code shared data structures with native code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7928 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
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| b428654076f5faae00c1e64a0f0a398b22703109 |
|
13-Aug-2003 |
Brian Gaeke <gaeke@uiuc.edu> |
addPassesToJITCompile now takes a FunctionPassManager, to support
function-at-a-time compilation and emission of code.
Separate addPassesToEmitAssembly from addPassesToJITCompile, because
the latter requires you to use FunctionPasses, and the former might
diverge anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7817 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
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| ac0c8680ad53c08189c23f39c79a2147378692df |
|
11-Aug-2003 |
Chris Lattner <sabre@nondot.org> |
Add support for a pattern matching instruction selector. This is still in
the early implementation phases, so it is disabled by default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7719 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| c9bbfbc04e6e8c946851565c2c686c39297ced76 |
|
05-Aug-2003 |
Chris Lattner <sabre@nondot.org> |
Factor shared code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7600 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| d281de21815d4766cf4960ad2ef075bee3beac0b |
|
27-Jul-2003 |
Chris Lattner <sabre@nondot.org> |
Rename function to be more consistent with filename
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7352 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| de420aee32ea799eada24afb59857040172c75d1 |
|
23-Jul-2003 |
Brian Gaeke <gaeke@uiuc.edu> |
Printer.cpp: Ditch addRequired/getAnalysis, because they leave
Printer::doFinalization() out in the cold. Now we pass in a TargetMachine
to Printer's constructor and get the TargetData from the TargetMachine.
Don't pass TargetMachine or MRegisterInfo objects around in the Printer.
Constify TargetData references.
X86.h: Update comment and prototype of createX86CodePrinterPass().
X86TargetMachine.cpp: Update callers of createX86CodePrinterPass().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7275 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| de3aa4f77f511ace5b9fc1e3a777b0c3ec5ffa27 |
|
18-Jun-2003 |
Brian Gaeke <gaeke@uiuc.edu> |
lib/Target/X86/X86TargetMachine.{cpp,h}: Add initial version
(non-working) of llc guts for X86, and add a prototype for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6779 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 10daaa141661d96843f3d8ece0e5a4c2da4b6e87 |
|
26-Apr-2003 |
Chris Lattner <sabre@nondot.org> |
Remove two fields from TargetData which are target specific.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5963 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 98938f83d52e01b10e34f9fc6db55e4787fa3dad |
|
25-Apr-2003 |
Chris Lattner <sabre@nondot.org> |
Fix compatibility bug: X86 aligns doubles to 4 bytes, not 8!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5935 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 155e68feea21534d69be3cdbcc16991398b7664a |
|
23-Apr-2003 |
Chris Lattner <sabre@nondot.org> |
Add support for the Switch instruction by running the lowerSwitch pass first
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5867 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| ddd5b417c6eb7ee480976ec479e7c9e6a466f176 |
|
26-Feb-2003 |
Chris Lattner <sabre@nondot.org> |
Rename -no-* to -disable-*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5642 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| f158da2f78b5bedbffddeb15ff19de647954e645 |
|
16-Jan-2003 |
Chris Lattner <sabre@nondot.org> |
Implement code to keep the stack pointer aligned to an 8 byte boundary.
This improves the performance of the power benchmark by a few percent.
This will be neccesary for SSE code, which requires 16 byte alignment of
the stack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5320 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| d91d86f3a6d0c809d6ef1a4a75a3ed82a402af9c |
|
13-Jan-2003 |
Chris Lattner <sabre@nondot.org> |
* No longer need lowerallocation pass
* Add X86 Stackifier pass
* Add peephole optimizer pass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5233 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| d282cfef614db2a4540f2f8e72cb666f2b614296 |
|
28-Dec-2002 |
Chris Lattner <sabre@nondot.org> |
* Initialize new FrameInfo member
* most pass ctors no longer take TM arguments
* New prolog/epilog insertion pass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5188 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 430cda74528c50c50c4c2017895a75dcd37df773 |
|
25-Dec-2002 |
Chris Lattner <sabre@nondot.org> |
Free machine code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5146 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 5bcd95c57feb92b9036636d98157f1f11e432b6d |
|
24-Dec-2002 |
Chris Lattner <sabre@nondot.org> |
Changes to allow for a configurable target machine that allows big endian and/or long pointer operation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5131 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 14322cd3375c675309c14b7a2f95aef22c5eae25 |
|
17-Dec-2002 |
Chris Lattner <sabre@nondot.org> |
Local register allocator is now stable enough for use, it passes all tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5094 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 439a27ac425cb9e3f3947268e268c22b78b7e7cd |
|
16-Dec-2002 |
Chris Lattner <sabre@nondot.org> |
Add mechanism to select register allocator to use
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5079 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 1a45626c4c9cef2a8faafd58119d5648d85db8ac |
|
16-Dec-2002 |
Chris Lattner <sabre@nondot.org> |
Rename createSimpleX86RegisterAllocator to createSimpleRegisterAllocator
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5071 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| b8ead9dc222861be7999a421e86e8aa846255d6e |
|
13-Dec-2002 |
Misha Brukman <brukman+llvm@gmail.com> |
Make function code generation printing debug-only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5023 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| e48ec018a545c11f3686b99f881712457f83e882 |
|
13-Dec-2002 |
Brian Gaeke <gaeke@uiuc.edu> |
brg
InstSelectSimple.cpp: Add stub implementation of visitFreeInst.
Add comments that mention how we are failing to implement malloc/free.
Add initial implementation of visitAllocaInst.
X86TargetMachine.cpp: Include llvm/Transforms/Scalar.h.
Add LowerAllocations pass before instruction selection.
jello/Makefile: Add scalaropts.a.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4994 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| f88a2853c859adaba44054190405dea927240032 |
|
22-Nov-2002 |
Misha Brukman <brukman+llvm@gmail.com> |
Enable the register allocator pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4829 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| 3dffa7953f1c532944931c6fd77ab02ea3af00c1 |
|
30-Oct-2002 |
Chris Lattner <sabre@nondot.org> |
Print machine code after instruction selection
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4434 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|
| b4f68ed32ede4cf7d31ce9e516e4074dad0a24ee |
|
29-Oct-2002 |
Chris Lattner <sabre@nondot.org> |
Convert backend to use passes, implement X86TargetMachine
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4421 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86TargetMachine.cpp
|