| 26369a930c523b75fe8f4ba18456ff86f68d5612 |
|
17-Mar-2013 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Use ArrayRef<MVT::SimpleValueType> when possible.
Not passing vector references around makes it possible to use
SmallVector in most places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177235 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 94d7ab7da4601d0caa75e7cffcf542214fb830a8 |
|
24-Dec-2012 |
Elena Demikhovsky <elena.demikhovsky@intel.com> |
Added 6 more value types: v32i1, v64i1, v32i16, v32i8, v64i8, v8f64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171026 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 4ffd89fa4d2788611187d1a534d2ed46adf1702c |
|
04-Dec-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Sort the #include lines for utils/...
I've tried to find main moudle headers where possible, but the TableGen
stuff may warrant someone else looking at it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169251 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 61131ab15fd593a2e295d79fe2714e7bc21f2ec8 |
|
25-Oct-2012 |
Joerg Sonnenberger <joerg@bec.de> |
Remove exception handling usage from tblgen.
Most places can use PrintFatalError as the unwinding mechanism was not
used for anything other than printing the error. The single exception
was CodeGenDAGPatterns.cpp, where intermediate errors during type
resolution were ignored to simplify incremental platform development.
This use is replaced by an error flag in TreePattern and bailout earlier
in various places if it is set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166712 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 3e9b6db60ff5864d6789f768610a3509dac0b5ef |
|
20-Sep-2012 |
Micah Villmow <villmow@gmail.com> |
Add in new data types that are used by AMDIL/ANL among others.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164261 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| d2c699706ceae4a118a8dcafbef73b85093e5390 |
|
12-Sep-2012 |
Owen Anderson <resistor@mac.com> |
Compute a map from register names to registers, rather than scanning the list of registers every time we want to look up a register by name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163659 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| c05d30601ced172b55be81bb529df6be91d6ae15 |
|
06-Sep-2012 |
Nadav Rotem <nrotem@apple.com> |
Add a new optimization pass: Stack Coloring, that merges disjoint static allocations (allocas). Allocas are known to be
disjoint if they are marked by disjoint lifetime markers (@llvm.lifetime.XXX intrinsics).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163299 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| f104bf65b9d748618d23caa37b2407fe9c2b174c |
|
23-Aug-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add CodeGenTarget::guessInstructionProperties.
Currently, TableGen just guesses instruction properties when it can't
infer them form patterns.
This adds a guessInstructionProperties flag to the instruction set
definition that will be used to disable guessing. The flag is intended
as a migration aid. It will be removed again when no more targets need
their properties guessed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162460 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 2661b411ccc81b1fe19194d3f43b2630cbef3f28 |
|
07-Jul-2012 |
Andrew Trick <atrick@apple.com> |
I'm introducing a new machine model to simultaneously allow simple
subtarget CPU descriptions and support new features of
MachineScheduler.
MachineModel has three categories of data:
1) Basic properties for coarse grained instruction cost model.
2) Scheduler Read/Write resources for simple per-opcode and operand cost model (TBD).
3) Instruction itineraties for detailed per-cycle reservation tables.
These will all live side-by-side. Any subtarget can use any
combination of them. Instruction itineraries will not change in the
near term. In the long run, I expect them to only be relevant for
in-order VLIW machines that have complex contraints and require a
precise scheduling/bundling model. Once itineraries are only actively
used by VLIW-ish targets, they could be replaced by something more
appropriate for those targets.
This tablegen backend rewrite sets things up for introducing
MachineModel type #2: per opcode/operand cost model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159891 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 06495cd7f2a91c4f659eac5e55b1c08b014d0a08 |
|
07-Jul-2012 |
Andrew Trick <atrick@apple.com> |
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159890 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 86208903cb3b693b26e144b8c5c7a0ab6a9a45c6 |
|
28-May-2012 |
Chris Lattner <sabre@nondot.org> |
rdar://11542750 - llvm.trap should be marked no return.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157551 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 194f3fa9eadc7dfe9f1750c16e1c2a8ebe11c88c |
|
01-Mar-2012 |
Jim Grosbach <grosbach@apple.com> |
Revert "Emit the SubRegTable with the smallest possible integer type."
This reverts commit 151760.
We want to move getSubReg() from TargetRegisterInfo into MCRegisterInfo,
but to do that, the type of the lookup table needs to be the same for
all targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151814 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| b9ace0215d20e29a0e59de2917178ad5e308a835 |
|
29-Feb-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Emit the SubRegTable with the smallest possible integer type.
Doesn't help ARM with its massive register set, but halves the size on x86 and all other targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151760 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 655b8de7b2ab773a977e0c524307e71354d8af29 |
|
05-Feb-2012 |
Craig Topper <craig.topper@gmail.com> |
Convert assert(0) to llvm_unreachable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149814 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| ddfda5cd1648c4cae12e6f62c3d86a36be3aefe4 |
|
13-Jan-2012 |
Pete Cooper <peter_cooper@apple.com> |
Added MVT::v2f16
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148067 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 0dbcadaa2fdf7038431931bab090f4467d8e308f |
|
09-Jan-2012 |
Devang Patel <dpatel@apple.com> |
Split AsmParser into two components - AsmParser and AsmParserVariant
AsmParser holds info specific to target parser.
AsmParserVariant holds info specific to asm variants supported by the target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147787 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| e3376ecd504300ae529c902135f51baffbdc2824 |
|
20-Dec-2011 |
Dan Gohman <gohman@apple.com> |
Add basic generic CodeGen support for half.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146927 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 7c2a4a30e0e16762c75adacebd05ec9fcbccf16b |
|
06-Dec-2011 |
Evan Cheng <evan.cheng@apple.com> |
First chunk of MachineInstr bundle support.
1. Added opcode BUNDLE
2. Taught MachineInstr class to deal with bundled MIs
3. Changed MachineBasicBlock iterator to skip over bundled MIs; added an iterator to walk all the MIs
4. Taught MachineBasicBlock methods about bundled MIs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145975 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 99aa14ff64c92eab347d23696e358361d3bd90ea |
|
16-Nov-2011 |
Owen Anderson <resistor@mac.com> |
Rename MVT::untyped to MVT::Untyped to match similar nomenclature.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144747 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 7c788888872233748da10a8177a9a1eb176c1bc8 |
|
01-Oct-2011 |
Peter Collingbourne <peter@pcc.me.uk> |
Move TableGen's parser and entry point into a library
This is the first step towards splitting LLVM and Clang's tblgen executables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140951 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 29f018cee616e4082e5005bc9adee4dc777e621c |
|
30-Sep-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Switch to ArrayRef<CodeGenRegisterClass*>.
This makes it possible to allocate CodeGenRegisterClass instances
dynamically and reorder them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140816 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 05bce0beee87512e52428d4b80f5a8e79a949576 |
|
30-Jul-2011 |
David Greene <greened@obbligato.org> |
Unconstify Inits
Remove const qualifiers from Init references, per Chris' request.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136531 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| f37dd02f7743ebd2424480361f5a7db510495c4f |
|
29-Jul-2011 |
David Greene <greened@obbligato.org> |
[AVX] Constify Inits
Make references to Inits const everywhere. This is the final step
before making them unique.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136485 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| d568b3f55294917d1cc701da14a8a7daeb6563e6 |
|
12-Jul-2011 |
Eric Christopher <echristo@apple.com> |
Revert r134921, 134917, 134908 and 134907. They're causing failures
in multiple buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134936 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| d4a9066c93da9a5aab47ca228d82e796fdec70c0 |
|
11-Jul-2011 |
David Greene <greened@obbligato.org> |
[AVX] Make Inits Foldable
Manage Inits in a FoldingSet. This provides several benefits:
- Memory for Inits is properly managed
- Duplicate Inits are folded into Flyweights, saving memory
- It enforces const-correctness, protecting against certain classes
of bugs
The above benefits allow Inits to be used in more contexts, which in
turn provides more dynamism to TableGen. This enhanced capability
will be used by the AVX code generator to a fold common patterns
together.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134907 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| bea6f615eefae279e53bbb63a31d2c3c67274c45 |
|
27-Jun-2011 |
Owen Anderson <resistor@mac.com> |
Add support for alternative register names, useful for instructions whose operands are logically equivalent to existing registers, but happen to be printed specially. For example, an instruciton that prints d0[0] instead of s0.
Patch by Jim Grosbach.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133940 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| abdbc84b4ed4276ed3def50f554e3ba156325717 |
|
18-Jun-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Store CodeGenRegisters as pointers so they won't be reallocated.
Reuse the CodeGenRegBank DenseMap in a few places that would build their
own or use linear search.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133333 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 23b0766b47464030d6a406eabeb5f27ae491b682 |
|
16-Jun-2011 |
Owen Anderson <resistor@mac.com> |
Fix formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133164 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 77b4b13c2a525faf646a6784b24692cf0459b75e |
|
16-Jun-2011 |
Owen Anderson <resistor@mac.com> |
Add a new MVT::untyped. This will be used in future work for modelling ISA features like register pairs and lists with "interesting" constraints (such as ARM NEON contiguous register lists or even-odd paired registers). We need to be able to generate these instructions (often from intrinsics), but don't want to have to assign a legal type to them. Instead, we'll use an "untyped" edge to bypass the type-checking and simply ensure that the register classes match.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133106 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| ae1920b1efa72c1789d562df4746110d0c2e10bd |
|
15-Jun-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Give CodeGenRegisterClass a real sorted member set.
Make the Elements vector private and expose an ArrayRef through
getOrder() instead. getOrder will eventually provide multiple
user-specified allocation orders.
Use the sorted member set for member and subclass tests. Clean up a lot
of ad hoc searches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133040 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 7b9cafde5e3faec22bbfbbc90cca0876968abad9 |
|
15-Jun-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Move the list of register classes into CodeGenRegBank as well.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133029 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| b5923db192d2aa938ff3c12aaac87d80ab649625 |
|
11-Jun-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Move the list of registers into CodeGenRegBank.
Also move the sub-register index computations from RegisterInfoEmitter
into CodeGenRegBank.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132865 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| dc29c447136aabf05f48a7119e48065c3b4cee9b |
|
10-Jun-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Move some sub-register index calculations to CodeGenRegisters.cpp
Create a new CodeGenRegBank class that will eventually hold all the code
that computes the register structure from Records.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132849 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| f1e2b23dfabb74249c2f1828dc902bd4bda52aa8 |
|
09-Jun-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Move TableGen's register bank classes to their own source file.
I'll be moving some more code there to gather all of the
register-specific stuff in one place. Currently it is shared between
CodeGenTarget and RegisterInfoEmitter.
The plan is that CodeGenRegisters can compute the full register bank
structure while RegisterInfoEmitter only will handle the printing part.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132788 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| f462e3fac7ac67503657d63dc35330d0b19359b3 |
|
03-Jun-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Make it possible to have unallocatable register classes.
Some register classes are only used for instruction operand constraints.
They should never be used for virtual registers. Previously, those
register classes were given an empty allocation order, but now you can
say 'let isAllocatable=0' in the register class definition.
TableGen calculates if a register is part of any allocatable register
class, and makes that information available in TargetRegisterDesc::inAllocatableClass.
The goal here is to eliminate use cases for overriding allocation_order_*
methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132508 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| bd0fa4c00d7870b1da36eac7b2181700381f2f96 |
|
28-May-2011 |
John McCall <rjmccall@apple.com> |
Change how tblgen generates attributes for intrinsics to use a single
switch. With this newfound organization, teach tblgen how not to give
all intrinsics the 'nounwind' attribute. Introduce a new intrinsic,
llvm.eh.resume, which does not have this attribute. Documentation and uses
to follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132252 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 123cab9480812e51f6d4cb118fe685691130f625 |
|
07-May-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Teach TableGen to automatically generate missing SubRegIndex instances.
The RegisterInfo.td file should only specify the indexes that sources need to
refer to. The rest is inferred.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131058 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 69ba413057fe5d73d95e7b51ddfe16a8b0def23c |
|
21-Apr-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Don't allow per-register spill size and alignment.
These values were not used for anything. Spill size and alignment is a property
of the register class, not the register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129906 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 6bfba2e5af163442a1c6b11fe14aa9df9101cfd7 |
|
20-Apr-2011 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Prefer cheap registers for busy live ranges.
On the x86-64 and thumb2 targets, some registers are more expensive to encode
than others in the same register class.
Add a CostPerUse field to the TableGen register description, and make it
available from TRI->getCostPerUse. This represents the cost of a REX prefix or a
32-bit instruction encoding required by choosing a high register.
Teach the greedy register allocator to prefer cheap registers for busy live
ranges (as indicated by spill weight).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129864 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 17fad045cccf34822d3163ada9e70a8f4528746e |
|
11-Mar-2011 |
Jim Grosbach <grosbach@apple.com> |
Make the register enum value part of the CodeGenRegister struct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127448 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 510207cb1e7427df711ac85002cab622f67bdf7c |
|
11-Mar-2011 |
Jim Grosbach <grosbach@apple.com> |
Trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127447 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 036609bd7d42ed1f57865969e059eb7d1eb6c392 |
|
23-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
Flag -> Glue, the ongoing saga
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122513 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| f1b4eafbfec976f939ec0ea3e8acf91cef5363e3 |
|
21-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for
something that just glues two nodes together, even if it is
sometimes used for flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122310 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 9c6b60eb28d2717008f8d6ff52f7666ebc81113d |
|
15-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
various cleanups to tblgen, patch by Garrison Venn!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121837 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 67db883487fca3472fdde51e931657e22d4d0495 |
|
13-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
eliminate the Records global variable, patch by Garrison Venn!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121659 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| ec6f096c36f4144ff9b3b24c2939720cdcbb7bcc |
|
02-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
a bunch of random cleanup, move a helper to CGT where it belongs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118031 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| f78081145695baa5d0b004e674c4561245b13b52 |
|
01-Nov-2010 |
Chris Lattner <sabre@nondot.org> |
eliminate the old InstFormatName which is always "AsmString",
simplify CodeGenInstruction. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117891 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 52a261b3c1391c5fec399ddeb3fc6ee9541e8790 |
|
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
fix a long standing wart: all the ComplexPattern's were being
passed the root of the match, even though only a few patterns
actually needed this (one in X86, several in ARM [which should
be refactored anyway], and some in CellSPU that I don't feel
like detangling). Instead of requiring all ComplexPatterns to
take the dead root, have targets opt into getting the root by
putting SDNPWantRoot on the ComplexPattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114471 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| d8dd5757e0e31c55bb15498aa1d75fad08850c5a |
|
07-Sep-2010 |
Bill Wendling <isanbard@gmail.com> |
Add an MVT::x86mmx type. It will take the place of all current MMX vector types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113261 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 72d1027d873ab42ccd93719b6e0248807422f959 |
|
07-Sep-2010 |
Bill Wendling <isanbard@gmail.com> |
Fix whitespace, because I'm OCD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113250 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 7365c091f92db5e68c98d7faedc6c34e1bbbc898 |
|
06-Aug-2010 |
Dan Gohman <gohman@apple.com> |
Remove IntrWriteMem, as it's the default. Rename IntrWriteArgMem
to IntrReadWriteArgMem, as it's for reading as well as writing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110395 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 7431beaba2a01c3fe299c861b2ec85cbf1dc81c4 |
|
17-Jul-2010 |
Bill Wendling <isanbard@gmail.com> |
Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission and
thus is a much more meaningful name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108563 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| a4e1ba53ddedd08669886b2849926bb33facc198 |
|
03-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add a new target independent COPY instruction and code to lower it.
The COPY instruction is intended to replace the target specific copy
instructions for virtual registers as well as the EXTRACT_SUBREG and
INSERT_SUBREG instructions in MachineFunctions. It won't we used in a selection
DAG.
COPY is lowered to native register copies by LowerSubregs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107529 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 65766ce7df779ac0e7f6ee0171562b56769ae1dd |
|
02-Jul-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Clean up TargetOpcodes.h a bit, and limit the number of places where the full
list of predefined instructions appear. Add some consistency checks.
Ideally, TargetOpcodes.h should be produced by TableGen from Target.td, but it
is hardly worth the effort.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107520 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 160a3bf74d1a2b048f65e2162d038ed96eddde01 |
|
26-May-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add StringRef::compare_numeric and use it to sort TableGen register records.
This means that our Registers are now ordered R7, R8, R9, R10, R12, ...
Not R1, R10, R11, R12, R2, R3, ...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104745 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 09bc0298650c76db1a06e20ca84c1dcb34071600 |
|
24-May-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Replace the tablegen RegisterClass field SubRegClassList with an alist-like data
structure that represents a mapping without any dependencies on SubRegIndex
numbering.
This brings us closer to being able to remove the explicit SubRegIndex
numbering, and it is now possible to specify any mapping without inventing
*_INVALID register classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104563 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| dbf67fefeaccfeb53fb9d6098180ba1f29e682d5 |
|
14-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103746 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| b55c8bed9d0f3eaa454a657746d8ec11aae9dea3 |
|
01-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Add a pseudo instruction REG_SEQUENCE that takes a list of registers and
sub-register indices and outputs a single super register which is formed from
a consecutive sequence of registers.
This is used as register allocation / coalescing aid and it is useful to
represent instructions that output register pairs / quads. For example,
v1024, v1025 = vload <address>
where v1024 and v1025 forms a register pair.
This really should be modelled as
v1024<3>, v1025<4> = vload <address>
but it would violate SSA property before register allocation is done.
Currently we use insert_subreg to form the super register:
v1026 = implicit_def
v1027 - insert_subreg v1026, v1024, 3
v1028 = insert_subreg v1027, v1025, 4
...
= use v1024
= use v1028
But this adds pseudo live interval overlap between v1024 and v1025.
We can now modeled it as
v1024, v1025 = vload <address>
v1026 = REG_SEQUENCE v1024, 3, v1025, 4
...
= use v1024
= use v1026
After coalescing, it will be
v1026<3>, v1025<4> = vload <address>
...
= use v1026<3>
= use v1026
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102815 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 0d7952ed5ac10b6159d0e8e2449f0f471d117e0f |
|
27-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
fix CodeGenTarget::getRegisterVTs to not return the
same vt multiple times for a register. For example,
ECX is in 5 different i32 reg classes, just return
1 i32 instead of 5.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99727 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 9972aff7da15e5019b7cf6d0cc6dde0cd6192360 |
|
24-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
reject void in intrinsic type lists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99347 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 93dc92e412fd06250e46951bffb6040eca9baebd |
|
22-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Change intrinsic result type for void to store it as an empty list
instead of as a single element list with VoidTy. Now with a fix
for the verifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99206 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| d7de54068ca6db50f4b54fb150af7b7c62573449 |
|
20-Mar-2010 |
Eric Christopher <echristo@apple.com> |
Revert r99009 temporarily it seems to be breaking the bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99011 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 26e763753be5f3422a892f6c268721eae7792eac |
|
19-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Change intrinsic result type for void to store it as an empty list
instead of as a single element list with VoidTy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99009 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| e8cabf3c2eb835f9189a39c810654d9bd302f7ee |
|
19-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
add a new SDNPVariadic SDNP node flag, and use it in
dag isel gen instead of instruction properties. This
allows the oh-so-useful behavior of matching a variadic
non-root node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98934 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| e14d2e210dc7fe28009f44818a057622a73322e4 |
|
19-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Finally change the instruction looking map to be a densemap from
record* -> instrinfo instead of std::string -> instrinfo.
This speeds up tblgen on cellcpu from 7.28 -> 5.98s with a debug
build (20%).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98916 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 6a91b18e5777f39e52e93221453abfa4553b6f93 |
|
19-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
make inst_begin/inst_end iterate over InstructionsByEnumValue.
Use CodeGenTarget::getInstNamespace in one place and fix it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98915 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 01dcecc214918b29cf3712420457fef309eeaad6 |
|
19-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
revert 98912
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98914 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| a28bc686fa4f2375237aeab58530126462ae9b41 |
|
19-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
make inst_begin/inst_end iterate over InstructionsByEnumValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98912 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| f65027842e82027dd6e8020586a299aaa548e355 |
|
19-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
change Target.getInstructionsByEnumValue to return a reference
to a vector that CGT stores instead of synthesizing it on every
call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98910 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| e4e8bb154196a2b53ce8696d9a591c3d5a4ec99a |
|
19-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
factor copy and paste code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98908 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| f30187a36324fb75042d9ffd20c3fb70aff7763d |
|
19-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
look up instructions by record, not by name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98904 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 2cacec55f947c716b058a39038889550d7e39b3c |
|
15-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Completely rewrite tblgen's type inference mechanism,
changing the primary datastructure from being a
"std::vector<unsigned char>" to being a new TypeSet class
that actually has (gasp) invariants!
This changes more things than I remember, but one major
innovation here is that it enforces that named input
values agree in type with their output values.
This also eliminates code that transparently assumes (in
some cases) that SDNodeXForm input/output types are the
same, because this is wrong in many case.
This also eliminates a bug which caused a lot of ambiguous
patterns to go undetected, where a register class would
sometimes pick the first possible type, causing an
ambiguous pattern to get arbitrary results.
With all the recent target changes, this causes no
functionality change!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98534 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 518bb53485df640d7b7e3f6b0544099020c42aa7 |
|
09-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
move target-independent opcodes out of TargetInstrInfo
into TargetOpcodes.h. #include the new TargetOpcodes.h
into MachineInstr. Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the
codebase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95687 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 243a32f96b364811e2f9feadecfefb21b640321f |
|
15-Jan-2010 |
Dale Johannesen <dalej@apple.com> |
Remove DEBUG_DECLARE, looks like we don't need it.
Also, DEBUG_VALUE has side effects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93498 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| d2035203a0359eedbc1cf4ae77d43176e8455cd4 |
|
09-Jan-2010 |
Dale Johannesen <dalej@apple.com> |
Add DEBUG_DECLARE. Not used yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93040 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 87563b39370d7adfd42b0f531409ff9bc2bfcc56 |
|
09-Jan-2010 |
Dale Johannesen <dalej@apple.com> |
Add DEBUG_VALUE. Not used yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93030 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 537ab90d8de19b9f9cd758188947bde2edfd0358 |
|
04-Jan-2010 |
Dan Gohman <gohman@apple.com> |
Remove the CPAttrParentAsRoot code, which is unused, and inconvenient
for a refactoring I'm working on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92503 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 26207e5bf1123a793bd9b38bcda2f569a6b45ef2 |
|
28-Sep-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Introduce the TargetInstrInfo::KILL machine instruction and get rid of the
unused DECLARE instruction.
KILL is not yet used anywhere, it will replace TargetInstrInfo::IMPLICIT_DEF
in the places where IMPLICIT_DEF is just used to alter liveness of physical
registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83006 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 825b72b0571821bf2d378749f69d6c4cfb52d2f9 |
|
11-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Split EVT into MVT and EVT, the former representing _just_ a primitive type, while
the latter is capable of representing either a primitive or an extended type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78713 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 9b6a53a0cee762ca3e454eadceaa128f000e6474 |
|
11-Aug-2009 |
Bob Wilson <bob.wilson@apple.com> |
Fix a few more places in TableGen that need to handle EVT::vAny types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78643 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 61fc4cf7aa0b87ceab62082cee8ef5ce3f574ffc |
|
11-Aug-2009 |
Bob Wilson <bob.wilson@apple.com> |
Add a new overloaded EVT::vAny type for use in TableGen to allow intrinsic
arguments that are vectors of any size and element type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78631 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| e50ed30282bb5b4a9ed952580523f2dda16215ac |
|
11-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78610 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 0e2771f4c4a6e1ffc664eb23487087f824340255 |
|
29-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Match X86 register names to number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77404 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| a4b048668418f74dfb2399421dc54db1d999c9cd |
|
15-Jul-2009 |
Duncan Sands <baldrick@free.fr> |
Remove the v3i32 and v3f32 value types: they are not
native for any supported targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75785 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| ab5a5a6a769ee9d77e32f9cc7e87b609caeb9016 |
|
14-Jul-2009 |
Bob Wilson <bob.wilson@apple.com> |
Revert 75308.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75565 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 28eff96ee6a22c67baccc36ebd369b7e3aa0cd41 |
|
11-Jul-2009 |
Bob Wilson <bob.wilson@apple.com> |
Add new vector types for 192-bit, 348-bit and 512-bit sizes.
These are needed to represent ARM Neon struct datatypes containing 2, 3 or 4
separate vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75308 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| bbf1caa46bc9726989f287f6c345ef8542a43237 |
|
11-Jul-2009 |
Bob Wilson <bob.wilson@apple.com> |
Refactor TableGen's llvm::getName to share code with llvm::getEnumName,
since names are the same for almost all the types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75302 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| bee9e35ba25c0f1c4fba7e4b01fef29dbfd859f3 |
|
07-Jul-2009 |
Devang Patel <dpatel@apple.com> |
Add new ValueType for metadata.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74882 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 1a55180238dbcf11113f610aea010447e51f595b |
|
03-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Replace std::iostreams with raw_ostream in TableGen.
- Sorry, I can't help myself.
- No intended functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74742 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 9b9838dbd4593e988b0614bb170427f153b14931 |
|
29-Jun-2009 |
David Greene <greened@obbligato.org> |
Add more vector ValueTypes for AVX and other extended vector instruction
sets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74427 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 874ae251c317788391f9c3f113957802d390a063 |
|
02-Jun-2009 |
Dale Johannesen <dalej@apple.com> |
Revert 72707 and 72709, for the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72712 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 4150d83abe90a5da4ddf86433b7bf4329acfa57c |
|
02-Jun-2009 |
Dale Johannesen <dalej@apple.com> |
Make the implicit inputs and outputs of target-independent
ADDC/ADDE use MVT::i1 (later, whatever it gets legalized to)
instead of MVT::Flag. Remove CARRY_FALSE in favor of 0; adjust
all target-independent code to use this format.
Most targets will still produce a Flag-setting target-dependent
version when selection is done. X86 is converted to use i32
instead, which means TableGen needs to produce different code
in xxxGenDAGISel.inc. This keys off the new supportsHasI1 bit
in xxxInstrInfo, currently set only for X86; in principle this
is temporary and should go away when all other targets have
been converted. All relevant X86 instruction patterns are
modified to represent setting and using EFLAGS explicitly. The
same can be done on other targets.
The immediate behavior change is that an ADC/ADD pair are no
longer tightly coupled in the X86 scheduler; they can be
separated by instructions that don't clobber the flags (MOV).
I will soon add some peephole optimizations based on using
other instructions that set the flags to feed into ADC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72707 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| d305e707a65fa18cbe828cae2338499661c9229e |
|
16-Apr-2009 |
Bob Wilson <bob.wilson@apple.com> |
Fix PR3994: LLVMMatchType arguments do not refer to absolute return value
and argument positions but only to the overloaded intrinsic parameters.
Keep a separate list of these overloaded parameters in CodeGenTarget.cpp
so they can be resolved easily. Remove assertions from IntrinsicEmitter.cpp:
they were harmless but confusing, and the assertions elsewhere in TableGen
will catch any incorrect values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69316 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 88c7af096b09ad26cbcebfdf40151e04094b7460 |
|
13-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalize
it accordingly. Thanks to Jakob Stoklund Olesen for pointing
out how this might be useful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68986 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| f8c7394781f7cf27ac52ca087e289436d36844da |
|
13-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Add a new TargetInstrInfo MachineInstr opcode, COPY_TO_SUBCLASS.
This will be used to replace things like X86's MOV32to32_.
Enhance ScheduleDAGSDNodesEmit to be more flexible and robust
in the presense of subregister superclasses and subclasses. It
can now cope with the definition of a virtual register being in
a subclass of a use.
Re-introduce the code for recording register superreg classes and
subreg classes. This is needed because when subreg extracts and
inserts get coalesced away, the virtual registers are left in
the correct subclass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68961 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 49de98214b82fefeb8f16efbf8cdd8813a85469b |
|
05-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Reapply 63765. Patches for clang and llvm-gcc to follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63812 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 4d452de1506344bf1d28bb4a8c4ddb78c51a28c8 |
|
04-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Reverting 63765. This broke the build of both clang
and llvm-gcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63786 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| d24479730a8790d82c4859dc477bc2416d7a6bda |
|
04-Feb-2009 |
Nate Begeman <natebegeman@mac.com> |
New feature: add support for target intrinsics being defined in the
target directories themselves. This also means that VMCore no longer
needs to know about every target's list of intrinsics. Future work
will include converting the PowerPC target to this interface as an
example implementation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63765 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| a62c302ddd79c525d6fac050974911d36662ebfe |
|
12-Jan-2009 |
Chris Lattner <sabre@nondot.org> |
add nocapture attribute to llvm.mem* intrinsics and have tblgen
parse them. tblgen doesn't yet do anything with this info though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62065 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| bc03979536a1ecb220f1330719f3e3973a81ab0b |
|
07-Jan-2009 |
Bob Wilson <bob.wilson@apple.com> |
Improve support for type-generic vector intrinsics by teaching TableGen how
to handle LLVMMatchType intrinsic parameters, and by adding new subclasses
of LLVMMatchType to match vector types with integral elements that are
either twice as wide or half as wide as the elements of the matched type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61834 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 87c8a8f304d1ee72829086ce2c41a8fa3813ba6a |
|
18-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Added support for vector widening.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61209 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| cdcc3e6e12b8b4e224bd62c96768c5f5e325aace |
|
13-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Modify the intrinsics pattern to separate out the "return" types from the
"parameter" types. An intrinsic can now return a multiple return values like
this:
def add_with_overflow : Intrinsic<[llvm_i32_ty, llvm_i1_ty],
[LLVMMatchType<0>, LLVMMatchType<0>]>;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59237 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 1e0ee4bc38e9cdc7e7ac49968527e2c05f927904 |
|
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Factor the code for determining the target-specific instruction
namespace out of the isel emitters and into common code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55079 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| ba6783ec8c0a5512a6c9abc6d7158471feeaaa7c |
|
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Fix the string for MVT::isVoid.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55034 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| e3b3a7241c01f26613694e53b26b01abf764ddfc |
|
30-Jul-2008 |
Mon P Wang <wangmp@apple.com> |
Added support for overloading intrinsics (atomics) based on pointers
to different address spaces. This alters the naming scheme for those
intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54195 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 4406604047423576e36657c7ede266ca42e79642 |
|
01-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating
the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.
Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.
This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52943 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 28873106309db515d58889a4c4fa3e0a92d1b60e |
|
25-Jun-2008 |
Mon P Wang <wangmp@apple.com> |
Added MemOperands to Atomic operations since Atomics touches memory.
Added abstract class MemSDNode for any Node that have an associated MemOperand
Changed atomic.lcs => atomic.cmp.swap, atomic.las => atomic.load.add, and
atomic.lss => atomic.load.sub
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52706 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 6bd9567a6a1ba62118cdd258ddc52ea8f82ff511 |
|
16-Jun-2008 |
Evan Cheng <evan.cheng@apple.com> |
- Add "Commutative" property to intrinsics. This allows tblgen to generate the commuted variants for dagisel matching code.
- Mark lots of X86 intrinsics as "Commutative" to allow load folding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52353 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 83ec4b6711980242ef3c55a4fa36b2d7a39c1bfb |
|
06-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Wrap MVT::ValueType in a struct to get type safety
and better control the abstraction. Rename the type
to MVT. To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits(). Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52044 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| ee4fa1977dd3a495a8857eef924ee5961db765c6 |
|
03-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Move instruction flag inference out of InstrInfoEmitter and into
CodeGenDAGPatterns, where it can be used in other tablegen backends.
This allows the inference to be done for DAGISelEmitter so that it
gets accurate mayLoad/mayStore/isSimpleLoad flags.
This brings MemOperand functionality back to where it was before
48329. However, it doesn't solve the problem of anonymous patterns
which expand to code that does loads or stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49123 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| c9298235251b014e86a7368d92b589d093acb64a |
|
16-Mar-2008 |
Christopher Lamb <christopher.lamb@gmail.com> |
Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48412 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| da47e6e0d003c873da960361549e57ee4617c301 |
|
15-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48380 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| a844bdeab31ef04221e7ef59a8467893584cc14d |
|
02-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc.
Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes.
For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46659 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 8535624739e55ab7424eadf792e1a3b4123421c7 |
|
31-Jan-2008 |
Christopher Lamb <christopher.lamb@gmail.com> |
Allow ComplexExpressions in InstrInfo.td files to be slightly more... complex! ComplexExpressions can now have attributes which affect how TableGen interprets
the pattern when generating matchin code.
The first (and currently, only) attribute causes the immediate parent node of the ComplexPattern operand to be passed into the matching code rather than the node at the root of the entire DAG containing the pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46606 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| ba7e756c22446a17a72632b8d4ac66cbdaab33f7 |
|
10-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Start inferring side effect information more aggressively, and fix many bugs in the
x86 backend where instructions were not marked maystore/mayload, and perf issues where
instructions were not marked neverHasSideEffects. It would be really nice if we could
write patterns for copy instructions.
I have audited all the x86 instructions down to MOVDQAmr. The flags on others and on
other targets are probably not right in all cases, but no clients currently use this
info that are enabled by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45829 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 6cc654b27a9d392ac7660afcb23e3c8136e9ab28 |
|
06-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Split the impl of CodeGenInstruction out to its own .cpp file, add a getName() accessor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45645 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 6cefb77a7073057fecd721ae141140d75ce76512 |
|
05-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
change getQualifiedName to be a global function.
Split the pattern parsing code out from the dag isel emitter into it's own file.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45632 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 3060910e290949a9ac5eda8726d030790c4d60ff |
|
29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
remove attributions from utils.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45419 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 6b1da9c39f0731d15cb743441bea6d4089efd9f8 |
|
14-Dec-2007 |
Bill Wendling <isanbard@gmail.com> |
Add flags to indicate that there are "never" side effects or that there "may be"
side effects for machine instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45022 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 3dd298fb62e74b1e7a05547c0d403dac980d128f |
|
13-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
Oops. Forgot these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44969 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 20ab29068d8a8ec31f26f022634f1e0bc4b1da56 |
|
12-Nov-2007 |
Owen Anderson <resistor@mac.com> |
Add a flag for indirect branch instructions.
Target maintainers: please check that the instructions for your target are correctly marked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44012 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 317096ab3710fda0960be58804e9f80c800340f6 |
|
28-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Add sqrt and powi intrinsics for long double.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42423 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| a3ca3149f2b59c512c50aab330b5a0d8efddeffa |
|
19-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Add CopyCost to TargetRegisterClass. This specifies the cost of copying a value
between two registers in the specific class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42123 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 0fee3ff93ea0bf1ce6466fec1d8496514d76e289 |
|
16-Aug-2007 |
Dan Gohman <gohman@apple.com> |
Add MVT::fAny for overloading intrinsics on floating-point types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41128 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 6994040a952e5fb27605eb3cf29ed86c4e59cf62 |
|
04-Aug-2007 |
Chandler Carruth <chandlerc@gmail.com> |
This is the patch to provide clean intrinsic function overloading support in LLVM. It cleans up the intrinsic definitions and generally smooths the process for more complicated intrinsic writing. It will be used by the upcoming atomic intrinsics as well as vector and float intrinsics in the future.
This also changes the syntax for llvm.bswap, llvm.part.set, llvm.part.select, and llvm.ct* intrinsics. They are automatically upgraded by both the LLVM ASM reader and the bitcode reader. The test cases have been updated, with special tests added to ensure the automatic upgrading is supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40807 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 08d52071bae2f8cc2e9aa6a451118b83d043813b |
|
26-Jul-2007 |
Christopher Lamb <christopher.lamb@gmail.com> |
Add target independent MachineInstr's to represent subreg insert/extract in MBB's. PR1350
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40518 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 8245510ae084c3b75314d5d921967aaa48e0d18d |
|
26-Jul-2007 |
Christopher Lamb <christopher.lamb@gmail.com> |
Teach TableGen about the new vector types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40513 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 102dc195b6b370abc62a80f887cd0761bb55cf8e |
|
20-Jul-2007 |
Evan Cheng <evan.cheng@apple.com> |
No need for noResults anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40075 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 64d80e3387f328d21cd9cc06464b5de7861e3f27 |
|
19-Jul-2007 |
Evan Cheng <evan.cheng@apple.com> |
Change instruction description to split OperandList into OutOperandList and
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40033 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 3bf6e183d5f116adc8adbf6853da5f479f22139c |
|
13-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Eliminate an unused parameter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39828 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 88cc092ca5bd79480205ee7b01aa39c13f3e35d7 |
|
10-Jul-2007 |
Evan Cheng <evan.cheng@apple.com> |
Try committing again. Add OptionalDefOperand. Remove clobbersPred.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38498 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| c419bd3396cc035942b219efae30dd2890ae430f |
|
07-Jul-2007 |
Evan Cheng <evan.cheng@apple.com> |
ImmutablePredicateOperand is no more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37963 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 8012b077dd4d1c88e0221448c67147324c4e00cf |
|
05-Jul-2007 |
Evan Cheng <evan.cheng@apple.com> |
Instructions with ImmutablePredicateOperand aren't really predicable since their predicates are fixed at isel time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37899 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| d45eddd214061bf12ad1e6b86497a41725e61d75 |
|
26-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Revert the earlier change that removed the M_REMATERIALIZABLE machine
instruction flag, and use the flag along with a virtual member function
hook for targets to override if there are instructions that are only
trivially rematerializable with specific operands (i.e. constant pool
loads).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37728 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 82a87a01723c095176c6940bcc63d3a7c8007b4b |
|
19-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad
with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37644 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| eaa91b0a1fc68984aae51f3c4b0cf29b38f89dac |
|
19-Jun-2007 |
Evan Cheng <evan.cheng@apple.com> |
Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37643 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| a321125e8b7e50d427d86b8053de2e6793b5df5b |
|
14-Jun-2007 |
Christopher Lamb <christopher.lamb@gmail.com> |
Add support to tablegen for specifying subregister classes on a per register class basis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37572 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| b5c1c9c8e30d8498cdb2d0ee215f05ca8dc3e4e2 |
|
06-Jun-2007 |
Evan Cheng <evan.cheng@apple.com> |
Add clobbersPred - instruction that clobbers condition code / register which are used to predicate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37465 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| b9daee9ece898ff5bf8cf354fe2286ad44a357e8 |
|
04-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Remove the operator<< for MVT::ValueType in preparation for MVT::ValueType
being changed from an enum to an integer type, which can't have a custom
operator<< overload.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37412 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 5127ce09a4e4379f971280fab461a5f03befddbc |
|
16-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Rename M_PREDICATED to M_PREDICABLE; opcode can be specified isPredicable without having a PredicateOperand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37116 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| c4de3dec62c3f60ae7297f93c19c799c403c2e9f |
|
01-Apr-2007 |
Reid Spencer <rspencer@reidspencer.com> |
For PR1297:
Implement code generation for overloaded intrinsic functions. The basic
difference is that "actual" argument types must be provided when
constructing intrinsic names and types. Also, for recognition, only the
prefix is examined. If it matches, the suffix is assumed to match. The
suffix is checked by the Verifier, however.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35539 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| eebc8a1bc505ebb5c702e63c248a8956d88fda77 |
|
26-Mar-2007 |
Bill Wendling <isanbard@gmail.com> |
Add support for the v1i64 type. This makes better code for this:
#include <mmintrin.h>
extern __m64 C;
void baz(__v2si *A, __v2si *B)
{
*A = C;
_mm_empty();
}
We get this:
_baz:
call "L1$pb"
"L1$pb":
popl %eax
movl L_C$non_lazy_ptr-"L1$pb"(%eax), %eax
movq (%eax), %mm0
movl 4(%esp), %eax
movq %mm0, (%eax)
emms
ret
GCC gives us this:
_baz:
pushl %ebx
call L3
"L00000000001$pb":
L3:
popl %ebx
subl $8, %esp
movl L_C$non_lazy_ptr-"L00000000001$pb"(%ebx), %eax
movl (%eax), %edx
movl 4(%eax), %ecx
movl 16(%esp), %eax
movl %edx, (%eax)
movl %ecx, 4(%eax)
emms
addl $8, %esp
popl %ebx
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35351 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 04677a3b49b2dfb151c4f77345702da489293627 |
|
19-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Recognize target instruction flag 'isReMaterializable'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35159 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 50d456539dea5e61d7a1592a78f1861fb35b0063 |
|
27-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
reapply
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34697 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 53c9b3f68c74c6ea4d739bb268e5fc5b495adff3 |
|
27-Feb-2007 |
Evan Cheng <evan.cheng@apple.com> |
Backing out
CodeGenTarget.cpp updated: 1.82 -> 1.83
Record.cpp updated: 1.55 -> 1.56
Record.h updated: 1.59 -> 1.60
TableGen.cpp updated: 1.47 -> 1.48
It's missing CallingConvEmitter.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34693 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 798dc7adb4f473c196c0000728fbaab0eb4fd8f2 |
|
27-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
initial support for calling convention generation, still unfinished.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34682 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| a683f9ba1356e92a5e7243d9f80fe8a8b6f737c8 |
|
26-Jan-2007 |
Jim Laskey <jlaskey@mac.com> |
Files missing from LABEL check in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33539 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| f5da13367f88f06e3b585dc2263ab6e9ca6c4bf8 |
|
07-Dec-2006 |
Bill Wendling <isanbard@gmail.com> |
What should be the last unnecessary <iostream>s in the library.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32333 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 05551224128c038aef13fc5b37de62e0fa581888 |
|
01-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
Match TargetInstrInfo changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32107 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| f64f9a4b75d07819866bfcf918b922a76d3e1600 |
|
16-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
Remove the isTwoAddress property from the CodeGenInstruction class. It should
not be used for anything other than backwards compat constraint handling.
Add support for a new DisableEncoding property which contains a list of
registers that should not be encoded by the generated code emitter. Convert
the codeemitter generator to use this, fixing some PPC JIT regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31769 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 0bb75004ff6c0ad26de7610cb873f81ea26fd6ca |
|
15-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
ADd support for adding constraints to suboperands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31748 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| f19683956275a85bc0cfa0ac08760fdcc790f510 |
|
10-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
allow ptr_rc to explicitly appear in an instructions operand list, it doesn't
have to be a subpart of a complex operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31618 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 29434364dd7d66f335d868b7daadc1b5dcf290fb |
|
07-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
emit TIED_TO correctly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31484 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| a0cca4ae267bc28143e8f4737e119349d95e4825 |
|
07-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
simplify the way operand flags and constraints are handled, making it easier
to extend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31481 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| a818e92f8b7ac805c0c7a9747d427186048b1440 |
|
06-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
recognize ppc's blr instruction as predicated
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31480 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| c51737f46ff3bd4379b576630c1b83ce163738c5 |
|
04-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Clean up some code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31451 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| d438b53e7642e63526e884368ef65bc913608acd |
|
04-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
eliminate need for the NumMIOperands field in Operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31432 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 4c2b7a380830d783e7df4c2c3418b8921ed0684f |
|
02-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Tied-to constraint must be op_with_larger_idx = op_with_smaller_idx or else throw an exception.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31361 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| e2ba8975883874633a1035c245af3b948b940b25 |
|
01-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Add operand constraints to TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31333 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 94b3040fef9475c74b877fb32cb45200cea273bb |
|
11-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added properties such as SDNPHasChain to ComplexPattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30890 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| d7c2c86239dd543906c363e45e18766223d14c6e |
|
15-Jun-2006 |
Evan Cheng <evan.cheng@apple.com> |
Allow more use of iPTR in patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28790 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 764811f1452808ff8a6d84f4ec2637355356e22e |
|
18-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Don't generate getCalleeSaveReg and getCalleeSaveRegClasses anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28376 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 6b12516f1a7c21e62f776d3b8b3ddcd16bda5496 |
|
17-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28366 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 2618d07765e94ca12c68c9db31e7843cc69d7178 |
|
17-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Remove PointerType from target definition. Use abstract type MVT::iPTR to
represent pointer type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28363 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 44a65fa552ed61cf9dba8f68f59b05e5137e6b01 |
|
16-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Allow patterns to refer to physical registers that belong to multiple
register classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28323 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 4b2362e2476316bf66b20699c62b9bb7fd9c1477 |
|
11-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a typo: Instr* -> Intr*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27568 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 6a160fba223a472f8ce4d0adef044660f69b4417 |
|
28-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Only compute intrinsic valuetypes when in a target .td file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27197 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 76f8c7c4cc4abbd6d71748762ebfe2fa1cd0fb43 |
|
28-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
revert this, it breaks things.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27196 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 8850a1bcef0c2a785f918395fe0a05054914b349 |
|
28-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Add support for decoding iPTR to the right pointer type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27188 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 2ca956f8dede03c23f6b497395cd3b99ebd1eb8a |
|
24-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Make sure to initialize the TheDef field!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27078 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 43fbbc36dc64243a1a57b072d37bccf6dad4d3cb |
|
24-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Move CodeGenIntrinsic implementation to CodeGenTarget.cpp with the rest of
the CodeGen* implementations.
Parse the MVT::ValueType for each operand of the intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27075 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| dcfccac13b30ea02cebe35c41571d252b2b1523d |
|
19-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
getEnumName() missed v8i8, v4i16, and v2i32 types
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26869 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 9073dea7c0490f8c20599e6e513c527954cc33d3 |
|
01-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
New vector type v2f32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26437 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| aea20f50e53a16374d514bc70e30b4ff234c015a |
|
20-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bit
packed word integer (v8i16), and 64-bit packed doubleword integer (v2i32).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26294 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| aa77d77a431ec5d2946df2bee33fe2023ca508d6 |
|
27-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
PHI and INLINEASM are now builtin instructions provided by Target.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25673 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 51fecc80f77e1ed048c69b8905742b3ca495d757 |
|
09-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
* Remove instruction fields hasInFlag / hasOutFlag and added SNDPInFlag and
SNDPOutFlag to DAG nodes. These properties do not belong to target specific
instructions.
* Added DAG node property SNDPOptInFlag. It's same as SNDPInFlag except it's
optional. Used by ret / call, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25154 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 2b4ea795a23ff9d900b9e1f26c92975ef78db1b6 |
|
26-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Added field noResults to Instruction.
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25017 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 7b05bd58149f7984257d7881aaa2bd9407628754 |
|
23-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
* Support for hasInFlag and hasOutFlag (on instructions). Remove nameless FLAG
support which is fragile.
* Fixed a number of bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24996 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| bcecf33dc23c513d0919af22f5f856da36039feb |
|
17-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Support for read / write from explicit registers with FlagVT type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24753 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 3aa39f439a0971a2502b2c728a8006becaf96601 |
|
08-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
* Added an explicit type field to ComplexPattern.
* Renamed MatchingNodes to RootNodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24636 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 0fc71988900e600f3ef5b13d9682e2bbab92811d |
|
08-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Added support for ComplexPattern. These are patterns that require C++ pattern
matching code that is not currently auto-generated by tblgen, e.g. X86
addressing mode. Selection routines for complex patterns can return multiple operands, e.g. X86 addressing mode returns 4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24634 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 1c3d19eb15b7109f75727bac84c65fcfecb65e51 |
|
04-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
* Commit the fix (by Chris) for a tblgen type inferencing bug.
* Enhanced tblgen to handle instructions which have chain operand and writes a
chain result.
* Enhanced tblgen to handle instructions which produces no results. Part of
the change is a temporary hack which relies on instruction property (e.g.
isReturn, isBranch). The proper fix would be to change the .td syntax to
separate results dag from ops dag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24587 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 6510b22cec7de4f0acc9965ec24c3668a6a8a87e |
|
01-Dec-2005 |
Nate Begeman <natebegeman@mac.com> |
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
work. This change has no effect on generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24563 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 86193d1190b30a537415fc1c384f4e51039fab74 |
|
01-Dec-2005 |
Nate Begeman <natebegeman@mac.com> |
Nuke CodeGenInstruction's ValueType member, it is no longer used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24556 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 02fc8ff80091c38760670c2b91e0f487dcc6b8a3 |
|
29-Nov-2005 |
Nate Begeman <natebegeman@mac.com> |
Add the new vector types to tablegen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24514 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 3367079b0bc5fcb12bc155577457469cded5c528 |
|
19-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Initialize this variable on all paths, fixing a crasher in windows. Thanks
to JeffC for pointing this out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24426 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 65303d6bd777b76735ef179870678a1d14671c54 |
|
19-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Teach tblgen about instruction operands that have multiple MachineInstr
operands, digging into them to find register values (used on X86). Patch
by Evan Cheng!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24424 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| b0e103d46bf8799ac5523157a6ed4a78d1751a89 |
|
29-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Rename Record::getValueAsListDef to getValueAsListOfDefs, to more accurately
reflect what it is.
Convert some more code over to use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24072 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 75ee2eb4e20f74a14ebb78aad03b15555c53043d |
|
14-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Do not let getLegalValueTypes return a list with duplicates in it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23723 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| c4a8b73ab3aa97d03a919a642469b81e334b6903 |
|
14-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
force all instruction operands to be named.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23358 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 5d7d3dba9cf4477ad96b21bd0fa7c7d6b27155cd |
|
14-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Check that operands have unique names. REJECT instructions with broken operand
lists: only don't parse them if they are entirely missing (sparcv9).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23355 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 8f493130bb51dea34c49e08aeab161e6a32dfdc6 |
|
13-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Add a new Record::getValueAsCode method to mirror the other getValueAs*
methods. Use it to simplify some code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23336 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| e9f4ba8dd47de9da2a98db3bbe25b54d5a9607f1 |
|
08-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Compute the value types that are natively supported by a target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23282 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| e3cbf823f071a4b05593ba371e54bf7c0f2d6641 |
|
26-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
spell this right
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23099 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 5f89bf0f9df54687f4474fe13f5d1a8635d85d5a |
|
26-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
spell this variable right
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23095 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 8b50f9b8dcd6da00ddc961ecda967719eb745dee |
|
26-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Expose a new flag to TargetInstrInfo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23094 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| ac46893e246748876d1155bb0c9e8892e52acab7 |
|
19-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Split register class "Methods" into MethodProtos and MethodBodies
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22928 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| c67c18fd2378fd2394c42f12b67897e7eba02d5c |
|
19-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Read the namespace field from register classes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22918 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| bfd4f55202743e0d7008840a28aff4179fa7993f |
|
19-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a problem jeffc noticed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22903 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| cfbf96aa9c3bd317548f72e022ba28a40353f95a |
|
19-Aug-2005 |
Chris Lattner <sabre@nondot.org> |
Figure out how many operands each instruction has, keep track of whether
or not it's variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22885 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 3da94aec4d429b2ba0f65fa040c33650cade196b |
|
22-Apr-2005 |
Misha Brukman <brukman+llvm@gmail.com> |
Remove trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21428 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| d6488671736d0a5aaee1218748b94d8c68f33716 |
|
22-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Refactor code for numbering instructions into CodeGenTarget.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19758 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| aad75aa1a235ec1ab121ec2a9c745577493ed323 |
|
02-Jan-2005 |
Chris Lattner <sabre@nondot.org> |
Expose isConvertibleToThreeAddress and isCommutable bits to the code generator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19243 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 35e83cc970e2ed99c8087e0c6b99f8a3618c279b |
|
14-Oct-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
* Add option to read isLittleEndianEncoding for InstrInfo classes
* Doxygen-ify some function comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16974 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 560a79f1ea4d1a04bd1da7fd0ca57cfe80620c5a |
|
03-Oct-2004 |
Chris Lattner <sabre@nondot.org> |
Add initial support for variants. This just parses the new format, no
functionality is added
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16636 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| cdd66b524f62ef6acd6bfa4e586edf8a406c4928 |
|
28-Sep-2004 |
Nate Begeman <natebegeman@mac.com> |
Add support for the isLoad and isStore flags, needed by the instruction scheduler
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16554 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 5b71d3af35f941585acb50de4909cff20f68680d |
|
28-Sep-2004 |
Chris Lattner <sabre@nondot.org> |
Turn the hasDelaySlot flag into the M_DELAY_SLOT_FLAG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16553 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 037d732e09e23369c7fe89eb5a325e8d1fb61e91 |
|
21-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
Alignment is now in bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15976 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 98df506e712d51bf74ae526e2b6304bef9025a7e |
|
21-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
Make alignment be in bits, just like size is
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15969 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 57677755055be6c95289fbe7a2a1edd88ac39818 |
|
21-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
Support "Methods" in register classes in CodgeGenRegisterClass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15965 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 056afeface2ac98664ed8fa4799b46178a4a6fe3 |
|
21-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
Start parsing register classes into a more structured form
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15961 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 7a680c60646fb3b06085f1fe6a7a1917c35010c6 |
|
21-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
Read in declared reg sizes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15960 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 26693113201f4c9d441678e50d96f38d3288798e |
|
16-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
Use CodeGenRegister class to make reading in of register information more
systematic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15805 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 175580c0f36b026daf9de0adabdb7ddcf7619db6 |
|
15-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
Make the AsmWriter a first-class tblgen object. Allow targets to specify
name of the generated asmwriter class, and the name of the format string.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15747 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| cf03da0ce913267c4971534e8792297e06535a4e |
|
11-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
Start parsing more information from the Operand information
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15644 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 552a8428fa67d921d94fde534270811378a1b977 |
|
11-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
Remove special case hacks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15643 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 87c5905e0b6f551e21c9a96f1b6418920d908210 |
|
01-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
Parse the operand list of the instruction. We currently support register and immediate operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15390 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 2e1f51b8a583649d74cb666ca5e4cf680cc1ced9 |
|
01-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
Initial cut at an asm writer emitter. So far, this only handles emission of
instructions, and only instructions that take no operands at that!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15386 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| ec3524064c57fbc2c5976ca301bbaadc94006d07 |
|
01-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
Add, and start using, the CodeGenInstruction class. This class represents
an instance of the Instruction tablegen class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15385 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 803a5f6ecb1823280f80e3c4459aa58627d0484c |
|
01-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
Rename CodeGenWrappers.(cpp|h) -> CodeGenTarget.(cpp|h)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15382 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 2082ebe8b3a5db302748828ab4f79a36d239c1d9 |
|
01-Aug-2004 |
Chris Lattner <sabre@nondot.org> |
Finegrainify namespacification
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15381 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| bebdb204d225dffbb98129348224a21bbe72a033 |
|
04-Jun-2004 |
Misha Brukman <brukman+llvm@gmail.com> |
Emit a more sensible error message if no subclasses of Target are defined.
Patch contributed by Vladimir Prus.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14010 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| d0fde30ce850b78371fd1386338350591f9ff494 |
|
11-Nov-2003 |
Brian Gaeke <gaeke@uiuc.edu> |
Put all LLVM code into the llvm namespace, as per bug 109.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9903 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 01d45827a1e512f3b19ba857772bf02baa3c0c4e |
|
20-Oct-2003 |
John Criswell <criswell@uiuc.edu> |
Added LLVM copyright header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9305 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| be7f4afe47ef87f2f6b054ea472d03719c5eb22e |
|
10-Oct-2003 |
Brian Gaeke <gaeke@uiuc.edu> |
This seems to work around some unobvious bug in gcc on sparc which was
causing the build of lib/Target/X86 to fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9042 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| b72fb7ef75862269879ecaaf8e31c5d9a6bb56e5 |
|
10-Aug-2003 |
Chris Lattner <sabre@nondot.org> |
Add new function
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7706 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| d3464c19a8b6acecd8a9618489ec7612505fd4bd |
|
08-Aug-2003 |
Chris Lattner <sabre@nondot.org> |
Add new method to get a value type as a string
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7698 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|
| 45872079672a4fb500fdcb9c77b23e3e550c8f97 |
|
07-Aug-2003 |
Chris Lattner <sabre@nondot.org> |
Initial checkin of useful wrappers around the Target classes, for now, only ValueType and
Target are wrapped
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7665 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenTarget.cpp
|