6f36fa981a59461466e12e5056ba209d289b81b1 |
|
11-Jun-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Write llvm-tblgen backends as functions instead of sub-classes. The TableGenBackend base class doesn't do much, and will be removed completely soon. Patch by Sean Silva! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158311 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
7c788888872233748da10a8177a9a1eb176c1bc8 |
|
01-Oct-2011 |
Peter Collingbourne <peter@pcc.me.uk> |
Move TableGen's parser and entry point into a library This is the first step towards splitting LLVM and Clang's tblgen executables. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140951 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
4a6d735105ffac5f58499ef5a5de8713b458b233 |
|
11-Mar-2011 |
Jim Grosbach <grosbach@apple.com> |
Teach TableGen to pre-calculate register enum values when creating the CodeGenRegister entries. Use this information to more intelligently build the literal register entires in the DAGISel matcher table. Specifically, use a single-byte OPC_EmitRegister entry for registers with a value of less than 256 and OPC_EmitRegister2 entry for registers with a larger value. rdar://9066491 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127456 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
9d40193d79052fb4ddd0f667f0fe47f07922c72a |
|
01-Mar-2011 |
Jim Grosbach <grosbach@apple.com> |
trailing whitespace. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126733 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
2d76c84514216f51526f2be123315f585995d860 |
|
01-Mar-2011 |
Jim Grosbach <grosbach@apple.com> |
Generalize the register matching code in DAGISel a bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126731 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
ecf93e4ab3b8ac5972ee3747a3a90a12e6cbadd6 |
|
03-Sep-2010 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Stop emitting predicate functions. They are no longer used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112924 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
283d1ceb576849f332df800b7bb1c609786e92b6 |
|
29-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Switch pattern sorting predicate from stable sort -> sort, it doesn't need to be stable because the patterns are fully ordered. Add a first level sort predicate that orders patterns in this order: 1) scalar integer operations 2) scalar floating point 3) vector int 4) vector float. This is a trivial sort on their top level pattern type so it is nice and transitive. The benefit of doing this is that simple integer operations are much more common than insane vector things and isel was trying to match the big complex vector patterns before the simple ones because the complexity of the vector operations was much higher. Since they can't both match, it is best (for compile time) to try the simple integer ones first. This cuts down the # failed match attempts on real code by quite a bit, for example, this reduces backtracks on crafty (as a random example) from 228285 -> 188369. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99797 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
4810736134ee157036a67ed91855f737bc62dae2 |
|
29-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
revert 99795, as mentioned, it is disabled anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99796 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
a0401249e8fed831b61d7f93e5a546a1b7eda681 |
|
29-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Check in a (disabled) failed attempt to improve the ordering of patterns within the generated matcher. This works great except that the sort fails because the relation defined isn't transitive. I have a much simpler solution coming next, but want to archive the code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99795 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
48e86dbe29e331357b0df11075b7974009c65f34 |
|
29-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
print the complexity of the pattern being matched in the comment in the generated table. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99794 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
d7349194650386d97a1d779369cb46f20ba9f252 |
|
19-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
major surgery on tblgen: generalize TreePatternNode to maintain a list of types (one for each result of the node) instead of a single type. There are liberal hacks added to emulate the old behavior in various situations, but they can start disolving now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98999 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
f30187a36324fb75042d9ffd20c3fb70aff7763d |
|
19-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
look up instructions by record, not by name. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98904 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
2cacec55f947c716b058a39038889550d7e39b3c |
|
15-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Completely rewrite tblgen's type inference mechanism, changing the primary datastructure from being a "std::vector<unsigned char>" to being a new TypeSet class that actually has (gasp) invariants! This changes more things than I remember, but one major innovation here is that it enforces that named input values agree in type with their output values. This also eliminates code that transparently assumes (in some cases) that SDNodeXForm input/output types are the same, because this is wrong in many case. This also eliminates a bug which caused a lot of ambiguous patterns to go undetected, where a register class would sometimes pick the first possible type, causing an ambiguous pattern to get arbitrary results. With all the recent target changes, this causes no functionality change! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98534 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
d272fee39888253591586c56a3e2728067475e3f |
|
02-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
the sorting predicate should work for comparing an element to itself, even though this isn't wildly useful. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97574 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
4a3ac62332b3a65c0fd5cba83d46d7d498d7eac5 |
|
02-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
eliminate CodeGen/DAGISelHeader.h, it is empty now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97556 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
405f1252b9f3937b9c30edf683375cf261967c79 |
|
01-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
resolve a fixme by having the .td file parser reject thigns like (set GPR, somecomplexpattern) if somecomplexpattern doesn't declare what it can match. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97513 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
117ccb7e518f05e4bf3df058fc402262f897ff0b |
|
01-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Fix PR2590 by making PatternSortingPredicate actually be ordered correctly. Previously it would get in trouble when two patterns were too similar and give them nondet ordering. We force this by using the record ID order as a fallback. The testsuite diff is due to alpha patterns being ordered slightly differently, the change is a semantic noop afaict: < lda $0,-100($16) --- > subq $16,100,$0 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97509 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
adc5347b54fa71368b7b93f003993ad90da99135 |
|
01-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
optimize tblgen compile time by eliminating the old isel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97504 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
459eeedbe02d329b38cf57a0504341ab1c653957 |
|
01-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
don't emit the old sdnodexform stuff for the new isel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97486 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
8a01c8d00d43c52ac4a421851c19126226f2fae3 |
|
01-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
Turn on the new isel by default. Here are some fun numbers with a release-asserts build on x86-64-darwin10: LLC Size: Old: 15,426,852 New: 12,759,140 (down 2.7M) LLI Size: Old: 9,926,876 New: 8,864,292 (down 1.1M) X86ISelDAGToDAG.o size: Old: 1,401,232 New: 162,868 (down 1.3M) Time to build X86ISelDAGToDAG.o: Old: 67.147u 2.060s 1:09.78 New: 4.234u 0.387s 0:04.77 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97475 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
fa342faef9d1c89de356ed83a6c6529ed3e87610 |
|
01-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
eliminate the CheckMultiOpcodeMatcher code and have each ComplexPattern at the root be generated multiple times, once for each opcode they are part of. This encourages factoring because the opcode checks get treated just like everything else in the matcher. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97439 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
4d0c931ba7758a98864dc7e968a10df7fed7ab70 |
|
01-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
inline the node transforms and node predicates into the generated dispatcher method. This eliminates the dependence of the new isel's generated code on the old isel's predicates, however some random hand written isel code still uses them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97431 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
c78f2a39945339752a163949a2d7c27f28635d99 |
|
28-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
enhance the new isel to use SelectNodeTo for most patterns, even some the old isel didn't. There are several parts of this that make me feel dirty, but it's no worse than the old isel. I'll clean up the parts I can do without ripping out the old one next. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97415 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
d6c84720df0b63e34081e0c7890f3074d8b110b9 |
|
25-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
change the scope node to include a list of children to be checked instead of to have a chained series of scope nodes. This makes the generated table smaller, improves the efficiency of the interpreter, and make the factoring optimization much more reasonable to implement. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97160 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
b21ba71045420b4c0dc5f30e85b9b01c9165eb57 |
|
25-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
rename fooMatcherNode to fooMatcher. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97096 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
60df53e30a7e39c884f4ca4eb03346bea5825109 |
|
25-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
rename PushMatcherNode -> ScopeMatcherNode to more accurately reflect what it does. Switch the sense of the Next and the Check arms to be more logical. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97093 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
a86509d4362edf7061bfd38dc08143c07980c838 |
|
24-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
lets not break the old isel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97034 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
c84edb7bdd345db280c908583d55bdf4e670a225 |
|
24-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
Since the new instruction selector now works, I don't need to keep the old one around for comparative purposes: have the ENABLE_NEW_ISEL #define (which is not enabled on mainline) stop emitting the old isel at all, yay for build time win. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97033 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
19b5a7590b784f19875b9880ea8838c393431656 |
|
24-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
implement a simple proof-of-concept optimization for the new isel: fold movechild+record+moveparent into a single recordchild N node. This shrinks the X86 table from 125443 to 117502 bytes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97031 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
91c6a822baaba3cb2def94224115e57b84805347 |
|
24-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
The new isel passes all tests, time to start making it go fast. Also add an easy macro at the top of DAGISelEmitter.cpp to enable it. Lets see if I can avoid accidentally turning it on :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97029 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
99ce6e8affcfd494853aa39adfbd6792ad280329 |
|
21-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
Sort the patterns before adding them to the FA so that we get the least cost matches. This gets us from 195 -> 208 passes on the ppc codegen tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96747 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
0ab1c5f8f848f0fb142b730b45b8af9d8a6866e3 |
|
21-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
oops don't turn this on for everyone yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96725 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
77f2e2724dc488bbf032e87f8f25f333730a0fb5 |
|
21-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
implement the last known missing feature: updating uses of results of the matched pattern to use the newly created node results. Onto the "making it actually work" phase! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96724 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
8e946bea146c15333ce5f9f1b7a9efe5e75fd892 |
|
21-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
Lots of improvements to the new dagisel emitter. This gets it to the point where it is to the 95% feature complete mark, it just needs result updating to be done (then testing, optimization etc). More specificallly, this adds support for chain and flag handling on the result nodes, support for sdnodexforms, support for variadic nodes, memrefs, pinned physreg inputs, and probably lots of other stuff. In the old DAGISelEmitter, this deletes the dead code related to OperatorMap, cleans up a variety of dead stuff handling "implicit remapping" from things like globaladdr -> targetglobaladdr (which is no longer used because globaladdr always needs to be legalized), and some minor formatting fixes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96716 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
b49985a8499e18675db7e9baf920d6ef4e2b65cf |
|
18-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
start sketching out the structure of code for result emission generation. Nothing real here yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96575 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
dcdcef2cb38e79d72e03b18d966788e67ca20a81 |
|
18-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
fit in 80 cols git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96541 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
03ddb20bfd9c01e0cc93596cd2a6a0609631c3c0 |
|
17-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
redisable this to save people a small amount of build time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96497 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
0a3f39985b3827a02a7ce1ca5e310b68820fd26d |
|
17-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
move isOnlyReachableByFallthrough out of MachineBasicBlock into AsmPrinter, and add a sparc implementation that knows about delay slots. Patch by Nathan Keynes! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96492 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
409ac586e83525a760692cf0affb01f1c9efa594 |
|
17-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
sink special case "cannotyetselect" for intrinsics out of the tblgen splatted code into the implementation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96460 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
d9c1a344a0526dd6b82a8bfc1885fcaeb289be29 |
|
17-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
simplify IsChainCompatible codegen, add comments. no functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96453 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
e609a513f3c072bba28412c681465332a2822d9a |
|
17-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
make the new isel generator plop out a CheckComplexPattern function for evaluating complex patterns. Some cleanup has to happen before this can be used though. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96419 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
05446e7d47294a91c0af4b9220c64fb355e8d7e8 |
|
17-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
clean up some code, eliminate NodeIsComplexPattern, which does the same thing as getComplexPatternInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96411 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
5b08f77096bdc041de1b54ff0a983b9b719d42e4 |
|
16-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
fix indentation git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96409 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
92d3ada814f33e3e1d10f0e5e3a15333b0cca849 |
|
16-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
fix rdar://7653908, a crash on a case where we would fold a load into a roundss intrinsic, producing a cyclic dag. The root cause of this is badness handling ComplexPattern nodes in the old dagisel that I noticed through inspection. Eliminate a copy of the of the code that handled ComplexPatterns by making EmitChildMatchCode call into EmitMatchCode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96408 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
29c6270328cf1dad1dee063990015a4c9b583e1f |
|
16-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
change dag isel emitter to only call 'IsProfitableToFold' on nodes with chains. On interior nodes that lead up to them, we just directly check that there is a single use. This generates slightly more efficient code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96366 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
ccba15f914b6e6cc101be9bac1fdeca3ccfbfdae |
|
16-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
mark all the generated node predicates 'const'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96337 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
e2de49d9a1f26a16963739eab94aeba894df16a7 |
|
16-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
remove now dead code and fixme. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96333 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
6e6975d419d6b1aa35a56576aa3527a8e4dc87ab |
|
16-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
remove dead code. This is never generated for any targets in mainline. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96332 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
e39650a805425ffdbd79692c7d1bad80f7332dae |
|
16-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
add support for the new isel matcher to generate (isprofitable|islegal)tofold checks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96331 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
014bf215c3457bb34fee348265e8f63a70b4d503 |
|
15-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Split SelectionDAGISel::IsLegalAndProfitableToFold to IsLegalToFold and IsProfitableToFold. The generic version of the later simply checks whether the folding candidate has a single use. This allows the target isel routines more flexibility in deciding whether folding makes sense. The specific case we are interested in is folding constant pool loads with multiple uses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96255 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
da272d1a704bd564272e88cbdbcf14712e3abbdc |
|
15-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
Check in the first big step of rewriting DAGISelEmitter to produce a table based matcher instead of gobs of C++ Code. Though it's not done yet, the shrinkage seems promising, the table for the X86 ISel is 75K and still has a lot of optimization to come (compare to the ~1.5M of .o generated the old way, much of which will go away). The code is currently disabled by default (the #if 0 in DAGISelEmitter.cpp). When enabled it generates a dead SelectCode2 function in the DAGISel Header which will eventually replace SelectCode. There is still a lot of stuff left to do, which are documented with a trail of FIXMEs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96215 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
47661320363a8bf0bb1401a8c1893755fb77c8f6 |
|
14-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
clean up a bunch of code, move some random predicates on TreePatternNode to be methods on TreePatternNode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96197 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
c87bf389dc48935a0347f117fc1df739d0eb8430 |
|
14-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
remove the DisablePatternForFastISel predicate, which is a check that predated -fast-isel which attempted to speed up the dag pattern matchers at -O0. Since fast-isel is around, this is basically obsolete and removing it shrinks the generated dag isels. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96188 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
a0cdf17f3708cb4ef4c90c9e759794a7efe628b0 |
|
13-Feb-2010 |
Chris Lattner <sabre@nondot.org> |
pull a bunch of huge inline methods in the PatternCodeEmitter class out of line. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96113 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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eeb3a00b84b7767d236ec8cf0619b9217fc247b9 |
|
05-Jan-2010 |
Dan Gohman <gohman@apple.com> |
Change SelectCode's argument from SDValue to SDNode *, to make it more clear what information these functions are actually using. This is also a micro-optimization, as passing a SDNode * around is simpler than passing a { SDNode *, int } by value or reference. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92564 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
ba7a662f5416057a16a40cdeb2dc4db56f207106 |
|
04-Jan-2010 |
Dan Gohman <gohman@apple.com> |
Replace some special-case code which probably was buggy with an assertion verifying that the special case does not occur. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92504 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
537ab90d8de19b9f9cd758188947bde2edfd0358 |
|
04-Jan-2010 |
Dan Gohman <gohman@apple.com> |
Remove the CPAttrParentAsRoot code, which is unused, and inconvenient for a refactoring I'm working on. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92503 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
2929e1143acdadec2bd197dc15ab6c77cb1857da |
|
19-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Fix a comment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91741 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
735afe14eea8049bf69210ce8a3512e391fc643f |
|
24-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Remove ISD::DEBUG_LOC and ISD::DBG_LABEL, which are no longer used. Note that "hasDotLocAndDotFile"-style debug info was already broken; people wanting this functionality should implement it in the AsmPrinter/DwarfWriter code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89711 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
f2a39bd24fe72481fa8fa612f3494efd41a8e001 |
|
14-Nov-2009 |
Benjamin Kramer <benny.kra@googlemail.com> |
Implement DISABLE_INLINE for MSVC. This required changing the position in all forward declaration and patching tblgen to emit it right. Patch by Amine Khaldi! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88798 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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c2fd919ea27eebc9630716cd3d66b4cb1241d26a |
|
08-Nov-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
It is invalid to infer the value type from the result #0 of the node since the instruction might use the other result of different type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86462 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
8c2b52552c90f39e4b2fed43e309e599e742b6ac |
|
30-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Initial target-independent CodeGen support for BlockAddresses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85556 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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e1f188fe27050ec812e5b64cc996e6bb93300392 |
|
29-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Move some code from being emitted as boilerplate duplicated in every *ISelDAGToDAG.cpp to being regular code in SelectionDAGISel.cpp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85530 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
533297b58da8c74bec65551e1aface9801fc2259 |
|
29-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a bunch of associated comments, because it doesn't have anything to do with DAGs or scheduling. This is another step in decoupling MachineInstr emitting from scheduling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85517 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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11ee508d7bd37f2b007da735fbd2c1497ed51848 |
|
15-Oct-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Report errors correctly for unselected target intrinsics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84193 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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c76909abfec876c6b751d693ebd3df07df686aa0 |
|
25-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Improve MachineMemOperand handling. - Allocate MachineMemOperands and MachineMemOperand lists in MachineFunctions. This eliminates MachineInstr's std::list member and allows the data to be created by isel and live for the remainder of codegen, avoiding a lot of copying and unnecessary translation. This also shrinks MemSDNode. - Delete MemOperandSDNode. Introduce MachineSDNode which has dedicated fields for MachineMemOperands. - Change MemSDNode to have a MachineMemOperand member instead of its own fields with the same information. This introduces some redundancy, but it's more consistent with what MachineInstr will eventually want. - Ignore alignment when searching for redundant loads for CSE, but remember the greatest alignment. Target-specific code which previously used MemOperandSDNodes with generic SDNodes now use MemIntrinsicSDNodes, with opcodes in a designated range so that the SelectionDAG framework knows that MachineMemOperand information is available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82794 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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602b0c8c17f458d2c80f2deb3c8e554d516ee316 |
|
25-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Rename getTargetNode to getMachineNode, for consistency with the naming scheme used in SelectionDAG, where there are multiple kinds of "target" nodes, but "machine" nodes are nodes which represent a MachineInstr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82790 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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69110c90bf74e29ca0c5173597a4813bd65475c4 |
|
11-Sep-2009 |
Owen Anderson <resistor@mac.com> |
Eliminate some unnecessary implicit constructors in generated DAG ISel code. Partial fix for PR4946. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81518 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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45cfe545ec8177262dabc70580ce05feaa1c3880 |
|
23-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
Change Pass::print to take a raw ostream instead of std::ostream, update all code that this affects. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79830 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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569f121f4ecc53f8ab505c4ccb6e1e77c78e188d |
|
23-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
remove some DOUTs git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79821 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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24f20e083280d979e8fa1bc88959ae9e8339ee99 |
|
22-Aug-2009 |
Devang Patel <dpatel@apple.com> |
Record variable debug info at ISel time directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79742 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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825b72b0571821bf2d378749f69d6c4cfb52d2f9 |
|
11-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Split EVT into MVT and EVT, the former representing _just_ a primitive type, while the latter is capable of representing either a primitive or an extended type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78713 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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e50ed30282bb5b4a9ed952580523f2dda16215ac |
|
11-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78610 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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3d4ad297c1a094ad1c7ea97f7b312f10946c998b |
|
08-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
strength reduce anonymous namespace to static. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78417 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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bd17a295c1fe7ac5669af033086209254a0887a3 |
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30-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Remove itohexstr, which only had one user. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77613 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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a938ac6223c5fd315ab745086d843df5e0604e09 |
|
29-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
make ptr_rc derive from a new PointerLikeRegClass tblgen class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77503 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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804e0fea4033e3b91dbc8198cef30de30f141bb5 |
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08-Jul-2009 |
Torok Edwin <edwintorok@gmail.com> |
Convert more abort() calls to llvm_report_error(). Also remove trailing semicolon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75027 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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1a55180238dbcf11113f610aea010447e51f595b |
|
03-Jul-2009 |
Daniel Dunbar <daniel@zuster.org> |
Replace std::iostreams with raw_ostream in TableGen. - Sorry, I can't help myself. - No intended functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74742 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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874ae251c317788391f9c3f113957802d390a063 |
|
02-Jun-2009 |
Dale Johannesen <dalej@apple.com> |
Revert 72707 and 72709, for the moment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72712 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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4150d83abe90a5da4ddf86433b7bf4329acfa57c |
|
02-Jun-2009 |
Dale Johannesen <dalej@apple.com> |
Make the implicit inputs and outputs of target-independent ADDC/ADDE use MVT::i1 (later, whatever it gets legalized to) instead of MVT::Flag. Remove CARRY_FALSE in favor of 0; adjust all target-independent code to use this format. Most targets will still produce a Flag-setting target-dependent version when selection is done. X86 is converted to use i32 instead, which means TableGen needs to produce different code in xxxGenDAGISel.inc. This keys off the new supportsHasI1 bit in xxxInstrInfo, currently set only for X86; in principle this is temporary and should go away when all other targets have been converted. All relevant X86 instruction patterns are modified to represent setting and using EFLAGS explicitly. The same can be done on other targets. The immediate behavior change is that an ADC/ADD pair are no longer tightly coupled in the X86 scheduler; they can be separated by instructions that don't clobber the flags (MOV). I will soon add some peephole optimizations based on using other instructions that set the flags to feed into ADC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72707 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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3b895cfac99babcf0e4fe80af1c70e11760abb77 |
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13-May-2009 |
Dale Johannesen <dalej@apple.com> |
Slightly improve generated code in a degenerate case. Should remove a warning from MSVC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71603 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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fe095f39e7009c51d1c86769792ccbcad8cdd2ec |
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04-May-2009 |
Mike Stump <mrs@apple.com> |
Restore minor deletion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70892 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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98a366d547772010e94609e4584489b3e5ce0043 |
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30-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
Instead of passing in an unsigned value for the optimization level, use an enum, which better identifies what the optimization is doing. And is more flexible for future uses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70440 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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be8cc2a3dedeb7685f07e68cdc4b9502eb97eb2b |
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29-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
Second attempt: Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to use the old behavior, the flag is -O0. This change allows for finer-grained control over which optimizations are run at different -O levels. Most of this work was pretty mechanical. The majority of the fixes came from verifying that a "fast" variable wasn't used anymore. The JIT still uses a "Fast" flag. I'll change the JIT with a follow-up patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70343 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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c69d56f1154342a57c9bdd4c17a10333e3520127 |
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28-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
r70270 isn't ready yet. Back this out. Sorry for the noise. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70275 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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2e9d5f912a9841d3685ba0241abe1131943fed29 |
|
28-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to use the old behavior, the flag is -O0. This change allows for finer-grained control over which optimizations are run at different -O levels. Most of this work was pretty mechanical. The majority of the fixes came from verifying that a "fast" variable wasn't used anymore. The JIT still uses a "Fast" flag. I'm not 100% sure if it's necessary to change it there... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70270 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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f8c7394781f7cf27ac52ca087e289436d36844da |
|
13-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Add a new TargetInstrInfo MachineInstr opcode, COPY_TO_SUBCLASS. This will be used to replace things like X86's MOV32to32_. Enhance ScheduleDAGSDNodesEmit to be more flexible and robust in the presense of subregister superclasses and subclasses. It can now cope with the definition of a virtual register being in a subclass of a use. Re-introduce the code for recording register superreg classes and subreg classes. This is needed because when subreg extracts and inserts get coalesced away, the virtual registers are left in the correct subclass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68961 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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8f9643f0f768d5dcff0ffea1de6191dba1b5b083 |
|
03-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Delete ISD::INSERT_SUBREG and ISD::EXTRACT_SUBREG, which are unused. Note that these are distinct from TargetInstrInfo::INSERT_SUBREG and TargetInstrInfo::EXTRACT_SUBREG, which are used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68355 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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da4231f134989af7dc6bd3408821ba573def27b2 |
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26-Mar-2009 |
Jim Grosbach <grosbach@apple.com> |
fix a few spelling errors and typos git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67758 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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866cc6005a2abfacc6568b4ea1cdfd141a639469 |
|
26-Mar-2009 |
Jim Grosbach <grosbach@apple.com> |
Use 'bool' for FoundRC git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67750 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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54f302272c6bf98638d224949be8bd23a120ba48 |
|
26-Mar-2009 |
Jim Grosbach <grosbach@apple.com> |
Modify getRegisterValueType() to allow for a register being in mutliple register classes. Before, MVT::Other would be returned anytime a reg was in multiple register classes. Now, MVT::Other is only returned if the types for those register classes differ. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67714 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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ed2eee63a6858312ed17582d8cb85a6856d8eb34 |
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06-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Get rid of one more non-DebugLoc getNode and its corresponding getTargetNode. Lots of caller changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63904 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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3484c09e0da3c05c8a78946e090c7610208d937b |
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05-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove a non-DebugLoc version of getNode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63889 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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a05dca4f9e051fad19fe9b5f6cce2715c1e5d505 |
|
05-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove non-DebugLoc forms of CopyToReg and CopyFromReg. Adjust callers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63789 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
ca6418308ca768dd2c83cea2d6e5e4063c8ef4c7 |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Explain why this is here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63342 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
6e1bb38fb8dd64ece28ea5779a8bbf9b5ff7fb96 |
|
29-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
- Add DebugLoc to getTargetNode(). - Modify TableGen to add the DebugLoc when calling getTargetNode. (The light-weight wrappers are only temporary. The non-DebugLoc version will be removed once the whole debug info stuff is finished with.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63273 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
63e3e6350b14d04917268be07ca1c29e158fdfd7 |
|
29-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Move the code that starts printing the Select_* functions after the code that sorts the patterns. This doesn't affect the output, but it makes the code a little easier to follow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63265 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
febf71db2db61b8c7bac2ddffba8f1d5d1a95cb9 |
|
16-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Avoid triggering an assertion failure when an instruction pattern is a leaf node. Patch by Brandner! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62361 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
05aae18165a41e2bb0e7de0eba2656cc5537b162 |
|
16-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Add support for instructions with multiple ComplexPatterns, by adding more information to the temporary variables names so that they don't conflict. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62296 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
1eb49a0a5e628c8ed3f37ef14a7c9917ee17b0fa |
|
05-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Delete an unused variable and simplify the code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61732 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
0b53d98c298b2846d36a4bfaf7a1a77d819430a6 |
|
19-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Use dyn_cast intead of isa + cast in the generated DAGISel code. This reduces the amount of code slightly when assertions are enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61249 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
41474baac839da410302950305722cb0e026a094 |
|
03-Dec-2008 |
Dan Gohman <gohman@apple.com> |
Add a sanity-check to tablegen to catch the case where isSimpleLoad is set but mayLoad is not set. Fix all the problems this turned up. Change code to not use isSimpleLoad instead of mayLoad unless it really wants isSimpleLoad. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60459 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
884c70c912b699a4d14d05dcac1ac4f2d47c0f9a |
|
27-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
On x86 favors folding short immediate into some arithmetic operations (e.g. add, and, xor, etc.) because materializing an immediate in a register is expensive in turns of code size. e.g. movl 4(%esp), %eax addl $4, %eax is 2 bytes shorter than movl $4, %eax addl 4(%esp), %eax git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60139 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
28c04dab38fa7205fedbc8954f08e2250e84c273 |
|
05-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Use an assert to check that SelectCode isn't called on nodes that are already selected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58763 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
8be6bbe5bfd50945ac6c5542e0f54a0924a5db8d |
|
05-Nov-2008 |
Dan Gohman <gohman@apple.com> |
Eliminate the ISel priority queue, which used the topological order for a priority function. Instead, just iterate over the AllNodes list, which is already in topological order. This eliminates a fair amount of bookkeeping, and speeds up the isel phase by about 15% on many testcases. The impact on most targets is that AddToISelQueue calls can be simply removed. In the x86 target, there are two additional notable changes. The rule-bending AND+SHIFT optimization in MatchAddress that creates new pre-isel nodes during isel is now a little more verbose, but more robust. Instead of either creating an invalid DAG or creating an invalid topological sort, as it has historically done, it can now just insert the new nodes into the node list at a position where they will be consistent with the topological ordering. Also, the address-matching code has logic that checked to see if a node was "already selected". However, when a node is selected, it has all its uses taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any further visits from MatchAddress. This code is now removed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58748 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
8ad4c00c00233acb8a3395098e2b575cc34de46b |
|
27-Oct-2008 |
David Greene <greened@obbligato.org> |
Have TableGen emit setSubgraphColor calls under control of a -gen-debug flag. Then in a debugger developers can set breakpoints at these calls to see waht is about to be selected and what the resulting subgraph looks like. This really helps when debugging instruction selection. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58278 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
b2a14325079f64debd7df6d5a8ed2037b3128154 |
|
17-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Use INT64_C to emit constant values, to avoid problems with constants that don't fit in an int. This fixes "this decimal constant is unsigned only in ISO C90" warnings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57668 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
63f97201dc9dcebbe84d1b73113166c64212b4b8 |
|
17-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Fun x86 encoding tricks: when adding an immediate value of 128, use a SUB instruction instead of an ADD, because -128 can be encoded in an 8-bit signed immediate field, while +128 can't be. This avoids the need for a 32-bit immediate field in this case. A similar optimization applies to 64-bit adds with 0x80000000, with the 32-bit signed immediate field. To support this, teach tablegen how to handle 64-bit constants. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57663 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
0540e17788f0d09d784fb9bd9b354e02f1c5e4a4 |
|
15-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Add support for having multiple predicates on a TreePatternNode. This will allow predicates to be composed, which will allow the predicate definitions to become less redundant, and eventually will allow DAGISelEmitter.cpp to emit less redundant code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57562 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
31bd42bc63ea4fc5f2898905d6da46d165872b05 |
|
28-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Move the code that handles DAGISel error conditions into helper functions instead of duplicating it inline each time it is needed. This eliminates a few hundred or so copies of this code in each target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56759 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
7810bfed5570c192e0714a8fd0e5130a0c38dd2e |
|
26-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Rename ConstantSDNode's getSignExtended to getSExtValue, for consistancy with ConstantInt, and re-implement it in terms of ConstantInt's getSExtValue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56700 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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056292fd738924f3f7703725d8f630983794b5a5 |
|
16-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Reverting r56249. On further investigation, this functionality isn't needed. Apologies for the thrashing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56251 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
9468a9b6beed640eca64274c8dcc5aed3b94450b |
|
16-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
- Change "ExternalSymbolSDNode" to "SymbolSDNode". - Add linkage to SymbolSDNode (default to external). - Change ISD::ExternalSymbol to ISD::Symbol. - Change ISD::TargetExternalSymbol to ISD::TargetSymbol These changes pave the way to allowing SymbolSDNodes with non-external linkage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56249 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
4fbd796a1251a27e6590765a0a34876f436a0af9 |
|
12-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Change ConstantSDNode and ConstantFPSDNode to use ConstantInt* and ConstantFP* instead of APInt and APFloat directly. This reduces the amount of time to create ConstantSDNode and ConstantFPSDNode nodes when ConstantInt* and ConstantFP* respectively are already available, as is the case in SelectionDAGBuild.cpp. Also, it reduces the amount of time to legalize constants into constant pools, and the amount of time to add ConstantFP operands to MachineInstrs, due to eliminating ConstantInt::get and ConstantFP::get calls. It increases the amount of work needed to create new constants in cases where the client doesn't already have a ConstantInt* or ConstantFP*, such as legalize expanding 64-bit integer constants to 32-bit constants. And it adds a layer of indirection for the accessor methods. But these appear to be outweight by the benefits in most cases. It will also make it easier to make ConstantSDNode and ConstantFPNode more consistent with ConstantInt and ConstantFP. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56162 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
f5aeb1a8e4cf272c7348376d185ef8d8267653e0 |
|
12-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Rename ConstantSDNode::getValue to getZExtValue, for consistency with ConstantInt. This led to fixing a bug in TargetLowering.cpp using getValue instead of getAPIntValue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56159 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
ba36cb5242eb02b12b277f82b9efe497f7da4d7f |
|
28-Aug-2008 |
Gabor Greif <ggreif@gmail.com> |
erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55504 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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99a6cb92d173c142073416c81efe6d3daeb80b49 |
|
27-Aug-2008 |
Gabor Greif <ggreif@gmail.com> |
disallow direct access to SDValue::ResNo, provide a getter instead git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55394 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
9783d624228bc787aa839ac1e7741cb0303c15a6 |
|
26-Aug-2008 |
Chris Lattner <sabre@nondot.org> |
code simplification, no functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55363 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
f350b277f32d7d47f86c0e54f4aec4d470500618 |
|
23-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Move the point at which FastISel taps into the SelectionDAGISel process up to a higher level. This allows FastISel to leverage more of SelectionDAGISel's infastructure, such as updating Machine PHI nodes. Also, implement transitioning from SDISel back to FastISel in the middle of a block, so it's now possible to go back and forth. This allows FastISel to hand individual CallInsts and other complicated things off to SDISel to handle, while handling the rest of the block itself. To help support this, reorganize the SelectionDAG class so that it is allocated once and reused throughout a function, instead of being completely reallocated for each block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55219 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
22bb31103de3337f0bb74c7bee16d1817d4dca14 |
|
22-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Factor out the predicate check code from DAGISelEmitter.cpp and use it in FastISelEmitter.cpp, and make FastISel subtarget aware. Among other things, this lets it work properly on x86 targets that don't have SSE, where it successfully selects x87 instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55156 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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1e0ee4bc38e9cdc7e7ac49968527e2c05f927904 |
|
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Factor the code for determining the target-specific instruction namespace out of the isel emitters and into common code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55079 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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ea9587bf41ab9b3de3846ab7de797a5d9bbdeec7 |
|
13-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Oops, check in these files too, for the FastISel -> Fast rename. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54750 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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e3b3a7241c01f26613694e53b26b01abf764ddfc |
|
30-Jul-2008 |
Mon P Wang <wangmp@apple.com> |
Added support for overloading intrinsics (atomics) based on pointers to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54195 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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475871a144eb604ddaf37503397ba0941442e5fb |
|
27-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Rename SDOperand to SDValue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54128 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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e8be6c63915e0389f1eef6b53c64300d13b2ce99 |
|
17-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Add a new function, ReplaceAllUsesOfValuesWith, which handles bulk replacement of multiple values. This is slightly more efficient than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically could be optimized even further. However, an important property of this new function is that it handles the case where the source value set and destination value set overlap. This makes it feasible for isel to use SelectNodeTo in many very common cases, which is advantageous because SelectNodeTo avoids a temporary node and it doesn't require CSEMap updates for users of values that don't change position. Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to handle operand lists more efficiently, and to correctly handle a number of corner cases to which its new wider use exposes it. This commit also includes a change to the encoding of post-isel opcodes in SDNodes; now instead of being sandwiched between the target-independent pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel opcodes are now represented as negative values. This makes it possible to test if an opcode is pre-isel or post-isel without having to know the size of the current target's post-isel instruction set. These changes speed up llc overall by 3% and reduce memory usage by 10% on the InstructionCombining.cpp testcase with -fast and -regalloc=local. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53728 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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95d110920e4ce9ded59934a432327a5343b1069d |
|
07-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Refactor the tablegen DAGISelEmitter code for outputing calls to getTargetNode and SelectNodeTo to reduce duplication, and to make some of the getTargetNode code available to SelectNodeTo. Use SelectNodeTo instead of getTargetNode in several new interesting cases, as it mutates nodes in place instead of creating new ones. This triggers some scheduling behavior differences due to nodes being presented to the scheduler in a different order. Some of the arbitrary scheduling decisions it makes are now arbitrarily made differently. This is visible in CodeGen/PowerPC/LargeAbsoluteAddr.ll, where a trivial scheduling difference led to a trivial register allocation difference. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53203 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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f9d0318950c60aa723ff650701f0365f0aafebd6 |
|
03-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
isel load folding is disabled at -fast. Now hoist the check up to the top level to save some time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53096 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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cd920d9ecfcefff13c3619a32b58399cac2e3630 |
|
03-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Replace a few uses of SelectionDAG::getTargetNode with SelectionDAG::SelectNodeTo in the instruction selector. This updates existing nodes in place instead of creating new ones. Go back to selecting ISD::DBG_LABEL nodes into TargetInstrInfo::DBG_LABEL nodes instead of leaving them unselected, now that SelectNodeTo allows us to update them in place. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53057 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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4406604047423576e36657c7ede266ca42e79642 |
|
01-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating the need for a flavor operand, and add a new SDNode subclass, LabelSDNode, for use with them to eliminate the need for a label id operand. Change instruction selection to let these label nodes through unmodified instead of creating copies of them. Teach the MachineInstr emitter how to emit a MachineInstr directly from an ISD label node. This avoids the need for allocating SDNodes for the label id and flavor value, as well as SDNodes for each of the post-isel label, label id, and label flavor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52943 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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28873106309db515d58889a4c4fa3e0a92d1b60e |
|
25-Jun-2008 |
Mon P Wang <wangmp@apple.com> |
Added MemOperands to Atomic operations since Atomics touches memory. Added abstract class MemSDNode for any Node that have an associated MemOperand Changed atomic.lcs => atomic.cmp.swap, atomic.las => atomic.load.add, and atomic.lss => atomic.load.sub git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52706 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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83ec4b6711980242ef3c55a4fa36b2d7a39c1bfb |
|
06-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Wrap MVT::ValueType in a struct to get type safety and better control the abstraction. Rename the type to MVT. To update out-of-tree patches, the main thing to do is to rename MVT::ValueType to MVT, and rewrite expressions like MVT::getSizeInBits(VT) in the form VT.getSizeInBits(). Use VT.getSimpleVT() to extract a MVT::SimpleValueType for use in switch statements (you will get an assert failure if VT is an extended value type - these shouldn't exist after type legalization). This results in a small speedup of codegen and no new testsuite failures (x86-64 linux). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52044 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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37cdad3e59d05b82a9322dcd86886788b6387019 |
|
02-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Fix the position of MemOperands in nodes that use variadic_ops in DAGISelEmitter output. This bug was recently uncovered by the addition of patterns for CALL32m and CALL64m, which are nodes that now have both MemOperands and variadic_ops. This bug was especially visible with PIC in various configurations, because the new patterns are matching the indirect call code used in many PIC configurations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51877 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
e4c67cdab4a2ad2ff53183ad32e77e8608c9262d |
|
31-May-2008 |
Dan Gohman <gohman@apple.com> |
Teach the DAGISelEmitter to not compute the variable_ops operand index for the input pattern in terms of the output pattern. Instead keep track of how many fixed operands the input pattern actually has, and have the input matching code pass the output-emitting function that index value. This simplifies the code, disentangles variables_ops from the support for predication operations, and makes variable_ops more robust. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51808 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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b4106170dde7db16af602e87bdd15ddc47e34321 |
|
29-May-2008 |
Dan Gohman <gohman@apple.com> |
Add patterns for CALL32m and CALL64m. They aren't matched in most cases due to an isel deficiency already noted in lib/Target/X86/README.txt, but they can be matched in this fold-call.ll testcase, for example. This is interesting mainly because it exposes a tricky tblgen bug; tblgen was incorrectly computing the starting index for variable_ops in the case of a complex pattern. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51706 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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d35121ad00667d93ea779a722dbee7d022410815 |
|
29-May-2008 |
Dan Gohman <gohman@apple.com> |
Fix a tblgen problem handling variable_ops in tblgen instruction definitions. This adds a new construct, "discard", for indicating that a named node in the input matching pattern is to be discarded, instead of corresponding to a node in the output pattern. This allows tblgen to know where the arguments for the varaible_ops are supposed to begin. This fixes "rdar://5791600", whatever that is ;-). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51699 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
6422e8aa1ca15e85302e601397d5d1fae7410ed4 |
|
14-May-2008 |
Roman Levenstein <romix.llvm@googlemail.com> |
Do not generate by TableGen the hard-coded standard, target-independent part of DAG instruction selectors. Introudce a dedicated header file for this part: include/llvm/CodeGen/DAGISelHeader.h TableGen now only generates the include preprocessor directive to include this new header. This is a preparation for supporting multiple implementations of instruction selectors in the future. Reviewed and approved by Evan and Dan. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51102 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
950a4c40b823cd4f09dc71be635229246dfd6cac |
|
25-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Add explicit keywords. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48801 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
da47e6e0d003c873da960361549e57ee4617c301 |
|
15-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48380 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
6634e26aa11b0e2eabde8b3b463bb943364f8d9d |
|
13-Mar-2008 |
Christopher Lamb <christopher.lamb@gmail.com> |
Get rid of a pseudo instruction and replace it with subreg based operation on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects. Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48329 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
27926af8285b194df04db2b9a1e38ec1e570c9ac |
|
26-Feb-2008 |
Bill Wendling <isanbard@gmail.com> |
De-tabify. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47595 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
ae9f3a3b7c915f725aef5a7250e88eaeddda03c6 |
|
20-Feb-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Unbreak build with gcc 4.3: provide missed includes and silence most annoying warnings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47367 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
0123b7dcfa9be97588926407163deb8d603487ce |
|
16-Feb-2008 |
Scott Michel <scottm@aero.org> |
Make tblgen a little smarter about constants smaller than i32. Currently, tblgen will complain if a sign-extended constant does not fit into a data type smaller than i32, e.g., i16. This causes a problem when certain hex constants are used, such as 0xff for byte masks or immediate xor values. tblgen will try the sign-extended value first and, if the sign extended value would overflow, it tries to see if the unsigned value will fit. Consequently, a software developer can now safely incant: (XORHIr16 R16C:$rA, 0xffff) which is somewhat clearer and more informative than incanting: (XORHIr16 R16C:$rA, (i16 -1)) even if the two are bitwise equivalent. Tblgen also outputs the 64-bit unsigned constant in the generated ISel code when getTargetConstant() is invoked. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47188 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
e179584f9b740cf3a36bde70f8cab40de59b8081 |
|
14-Feb-2008 |
Nate Begeman <natebegeman@mac.com> |
Change how FP immediates are handled. 1) ConstantFP is now expand by default 2) ConstantFP is not turned into TargetConstantFP during Legalize if it is legal. This allows ConstantFP to be handled like Constant, allowing for targets that can encode FP immediates as MachineOperands. As a bonus, fix up Itanium FP constants, which now correctly match, and match more constants! Hooray. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47121 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
69de1932b350d7cdfc0ed1f4198d6f78c7822a02 |
|
06-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Re-apply the memory operand changes, with a fix for the static initializer problem, a minor tweak to the way the DAGISelEmitter finds load/store nodes, and a renaming of the new PseudoSourceValue objects. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46827 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
a58891ff1e6b5cc61cbb3cfe46be7f2eeddbfe98 |
|
05-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix PR1975: dag isel emitter produces patterns that isel wrong flag result. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46776 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
4e3f5a4e9c13f216856515e6f000881f2c850736 |
|
05-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
Dwarf requires variable entries to be in the source order. Right now, since we are recording variable information at isel time this means parameters would appear in the reverse order. The short term fix is to issue recordVariable() at asm printing time instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46724 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
f8dc0617baceeba8ccd67c8881eb88eb1be2902c |
|
03-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Change the 'global modification' APIs in SelectionDAG to take a new DAGUpdateListener object pointer instead of just returning a vector of deleted nodes. This makes the interfaces more efficient (no more allocating a vector [at least a malloc], filling it in, then walking it) and more clean. This also allows the client to be notified of nodes that are *changed* but not deleted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46677 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
a844bdeab31ef04221e7ef59a8467893584cc14d |
|
02-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc. Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes. For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46659 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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334dc1f58d617dcff969a2e107febaae42bbc883 |
|
31-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
Revert 46556 and 46585. Dan please fix the PseudoSourceValue problem and re-commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46623 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
bb81d97feb396a8bb21d074db1c57e9f66525f40 |
|
31-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
Add an extra operand to LABEL nodes which distinguishes between debug, EH, or misc labels. This fixes the EH breakage. However I am not convinced this is *the* solution. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46609 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
8535624739e55ab7424eadf792e1a3b4123421c7 |
|
31-Jan-2008 |
Christopher Lamb <christopher.lamb@gmail.com> |
Allow ComplexExpressions in InstrInfo.td files to be slightly more... complex! ComplexExpressions can now have attributes which affect how TableGen interprets the pattern when generating matchin code. The first (and currently, only) attribute causes the immediate parent node of the ComplexPattern operand to be passed into the matching code rather than the node at the root of the entire DAG containing the pattern. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46606 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
c6c391daddbafa722d9ca87d18f204e9a6e617a3 |
|
31-Jan-2008 |
Dan Gohman <gohman@apple.com> |
Create a new class, MemOperand, for describing memory references in the backend. Introduce a new SDNode type, MemOperandSDNode, for holding a MemOperand in the SelectionDAG IR, and add a MemOperand list to MachineInstr, and code to manage them. Remove the offset field from SrcValueSDNode; uses of SrcValueSDNode that were using it are all all using MemOperandSDNode now. Also, begin updating some getLoad and getStore calls to use the PseudoSourceValue objects. Most of this was written by Florian Brander, some reorganization and updating to TOT by me. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46585 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
6be48d49cf0d48045463b74f4b35c5215edd3e57 |
|
29-Jan-2008 |
Scott Michel <scottm@aero.org> |
Fix to bug 1951: tblgen gratuitously renames variables when no temporary was generated. This feature would only show up in fairly complex patterns, such as this one in CellSPU: def : Pat<(add (SPUhi tconstpool:$in, 0), (SPUlo tconstpool:$in, 0)), (IOHLlo (ILHUhi tconstpool:$in), tconstpool:$in)>; which generated the following emit code: SDNode *Emit_0(const SDOperand &N, unsigned Opc0, unsigned Opc1, MVT::ValueType VT0, MVT::ValueType VT1) DISABLE_INLINE { SDOperand N0 = N.getOperand(0); SDOperand N00 = N0.getOperand(0); SDOperand N01 = N0.getOperand(1); SDOperand N1 = N.getOperand(1); SDOperand N10 = N1.getOperand(0); SDOperand N11 = N1.getOperand(1); SDOperand Tmp3(CurDAG->getTargetNode(Opc0, VT0, N00), 0); return CurDAG->SelectNodeTo(N.Val, Opc1, VT1, Tmp3, Tmp2); /* Tmp2 s/b N00 */ } Tested against the test suites without incident. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46487 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
8f707e15fbd09ca948b86419bcb0c92470827ac9 |
|
07-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
rename hasVariableOperands() -> isVariadic(). Add some comments. Evan, please review the comments I added to getNumDefs to make sure that they are accurate, thx. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45687 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
f1ab4f18aad3950d0b9ff1273a276bb8d195d2d6 |
|
06-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
improve const correctness. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45646 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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fe71893183f504feff290e343bf740bd32432129 |
|
06-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
rename CodegenDAGPatterns -> CodeGenDAGPatterns git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45641 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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200c57e8ea6456d5688307cfce3f4cbd8bf6ada7 |
|
05-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
now that computing CodegenDAGPatterns doesn't implicitly print stuff out, DAGISelEmitter can compute it in its ctor, which simplifies some code. Now we can use CodegenDAGPatterns in other parts of tblgen that want access to dag pattern info, woo! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45636 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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443e3f9dd61b8d0974bb13d484195ce1a9b7536c |
|
05-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
move Node Transformation printing from CodeGenDAGPatterns -> DAGISelEmitter. The only difference in output is that we now print them in alphabetical order instead of reverse alphabetical order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45635 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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dc32f9802adc139e3d7ee5e25fe656b1d3999bc2 |
|
05-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
move predicate printing code from CodeGenDAGPatterns -> DAGISelEmitter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45634 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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60d8139d1b1db8b23c066623d65302dd3dcc4572 |
|
05-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
fix a fixme by improving const correctness. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45633 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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6cefb77a7073057fecd721ae141140d75ce76512 |
|
05-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
change getQualifiedName to be a global function. Split the pattern parsing code out from the dag isel emitter into it's own file. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45632 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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3060910e290949a9ac5eda8726d030790c4d60ff |
|
29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
remove attributions from utils. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45419 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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44f147604884107f22a70a8af697264a85f157df |
|
24-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
switch some calls to SelectionDAG::getTargetNode to use the one that takes an operand list instead of explicit operands. There is one left though, the more interesting one :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43290 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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01d029b82cb08367d81aa10cdc94d05360466649 |
|
15-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
One mundane change: Change ReplaceAllUsesOfValueWith to *optionally* take a deleted nodes vector, instead of requiring it. One more significant change: Implement the start of a legalizer that just works on types. This legalizer is designed to run before the operation legalizer and ensure just that the input dag is transformed into an output dag whose operand and result types are all legal, even if the operations on those types are not. This design/impl has the following advantages: 1. When finished, this will *significantly* reduce the amount of code in LegalizeDAG.cpp. It will remove all the code related to promotion and expansion as well as splitting and scalarizing vectors. 2. The new code is very simple, idiomatic, and modular: unlike LegalizeDAG.cpp, it has no 3000 line long functions. :) 3. The implementation is completely iterative instead of recursive, good for hacking on large dags without blowing out your stack. 4. The implementation updates nodes in place when possible instead of deallocating and reallocating the entire graph that points to some mutated node. 5. The code nicely separates out handling of operations with invalid results from operations with invalid operands, making some cases simpler and easier to understand. 6. The new -debug-only=legalize-types option is very very handy :), allowing you to easily understand what legalize types is doing. This is not yet done. Until the ifdef added to SelectionDAGISel.cpp is enabled, this does nothing. However, this code is sufficient to legalize all of the code in 186.crafty, olden and freebench on an x86 machine. The biggest issues are: 1. Vectors aren't implemented at all yet 2. SoftFP is a mess, I need to talk to Evan about it. 3. No lowering to libcalls is implemented yet. 4. Various operations are missing etc. 5. There are FIXME's for stuff I hax0r'd out, like softfp. Hey, at least it is a step in the right direction :). If you'd like to help, just enable the #ifdef in SelectionDAGISel.cpp and compile code with it. If this explodes it will tell you what needs to be implemented. Help is certainly appreciated. Once this goes in, we can do three things: 1. Add a new pass of dag combine between the "type legalizer" and "operation legalizer" passes. This will let us catch some long-standing isel issues that we miss because operation legalization often obfuscates the dag with target-specific nodes. 2. We can rip out all of the type legalization code from LegalizeDAG.cpp, making it much smaller and simpler. When that happens we can then reimplement the core functionality left in it in a much more efficient and non-recursive way. 3. Once the whole legalizer is non-recursive, we can implement whole-function selectiondags maybe... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42981 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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3393f892c76b4d6af77b2f1e92056a6e1488231a |
|
12-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Fix typos. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42896 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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d23aa5a053329910e3ca934a358bf08d1543f1c9 |
|
25-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Rename keyword "modify" -> "implicit". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42282 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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30729b48d40e76d23191ad8449741860a7c841c8 |
|
18-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Bug fix and minor clean up of generated code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42069 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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85dbe1a1d287864ca0d9482e3f4530929bf81511 |
|
13-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Initial support for multi-result patterns: 1. [(set GR32:$dst, (add GR32:$src1, GR32:$src2)), (modify EFLAGS)] This indicates the source pattern expects the instruction would produce 2 values. The first is the result of the addition. The second is an implicit definition in register EFLAGS. 2. def : Pat<(parallel (addc GR32:$src1, GR32:$src2), (modify EFLAGS)), ()> Similar to #1 except this is used for def : Pat patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41897 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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aeb7d4d7603c5587b1aceb2dd854c7d56b5b9b2a |
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11-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Allow set operators with multiple destinations, i.e. (set x, y, (op a, b)). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41861 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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ef61ed350737c860ddff4107a7a32ade82d5bfb8 |
|
08-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
TableGen no longer emit CopyFromReg nodes for implicit results in physical registers. The scheduler is now responsible for emitting them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41781 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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425e8c7eaee57e3c9dab6701bf2ae6872beab628 |
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04-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Always check the type of node. This prevents situations such as selecting 32-bit rotate target instruction for a 64-bit node when 64-bit pattern is missing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41710 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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08d52071bae2f8cc2e9aa6a451118b83d043813b |
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26-Jul-2007 |
Christopher Lamb <christopher.lamb@gmail.com> |
Add target independent MachineInstr's to represent subreg insert/extract in MBB's. PR1350 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40518 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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a6a1ab3d2877d2d677d460843344c3b864171ccb |
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25-Jul-2007 |
Dan Gohman <gohman@apple.com> |
A minor simplication in the generated code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40479 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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102dc195b6b370abc62a80f887cd0761bb55cf8e |
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20-Jul-2007 |
Evan Cheng <evan.cheng@apple.com> |
No need for noResults anymore. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40075 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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64d80e3387f328d21cd9cc06464b5de7861e3f27 |
|
19-Jul-2007 |
Evan Cheng <evan.cheng@apple.com> |
Change instruction description to split OperandList into OutOperandList and InOperandList. This gives one piece of important information: # of results produced by an instruction. An example of the change: def ADD32rr : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2), "add{l} {$src2, $dst|$dst, $src2}", [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>; => def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), "add{l} {$src2, $dst|$dst, $src2}", [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>; git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40033 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
a955939ca2e9c9d5934e884e8c676603e0a81705 |
|
06-Jul-2007 |
Evan Cheng <evan.cheng@apple.com> |
Refactor code to add initial support for OptionalDefOperand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37933 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
7774be4a74be15305a4852efb9981847a7f1dad7 |
|
05-Jul-2007 |
Evan Cheng <evan.cheng@apple.com> |
Teach DAGISelEmitter about zero_reg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37900 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
20c2b35c2f2cfeda290ae3e4c08a80cd85a4785b |
|
19-Jun-2007 |
Chris Lattner <sabre@nondot.org> |
silence warning when assertions are disabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37654 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
4ef9b11100836abd2e9e51aa1b03312dbd39898d |
|
15-May-2007 |
Chris Lattner <sabre@nondot.org> |
Fix CodeGen/PowerPC/2007-05-14-InlineAsmSelectCrash.ll, the other recent patches are also needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37070 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
39376d08436dc7bc04daa0da84b0648f0cf48751 |
|
15-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
PredicateOperand related bug fix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37060 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
59039632e120de996f36db707e4718b469c7228b |
|
08-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
If a PredicateOperand has an empty ExecuteAlways field, treat it as if a normal operand for isel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36946 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
195c6c298a7cad8b8e1fa3cae2b06dac01482cd2 |
|
26-Apr-2007 |
Lauro Ramos Venancio <lauro.venancio@gmail.com> |
bugfix: remember that ResNode was declared. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36477 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
b3a0417cad8b625acc3033bd5e24afb9ffd0b084 |
|
20-Apr-2007 |
Lauro Ramos Venancio <lauro.venancio@gmail.com> |
Implement "general dynamic", "initial exec" and "local exec" TLS models for X86 32 bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36283 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
844b892246379e09096274c5ac2e254cd85066ce |
|
27-Jan-2007 |
Jim Laskey <jlaskey@mac.com> |
Make the constant honest. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33557 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
a683f9ba1356e92a5e7243d9f80fe8a8b6f737c8 |
|
26-Jan-2007 |
Jim Laskey <jlaskey@mac.com> |
Files missing from LABEL check in. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33539 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
d8a1728b5a9506deb45a62b7b7d8cc93578eac53 |
|
17-Jan-2007 |
Chris Lattner <sabre@nondot.org> |
Make tblgen error more useful. Patch by B. Scott Michel git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33295 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
f5da13367f88f06e3b585dc2263ab6e9ca6c4bf8 |
|
07-Dec-2006 |
Bill Wendling <isanbard@gmail.com> |
What should be the last unnecessary <iostream>s in the library. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32333 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
f7560ed6b1d5049799e5fc8ffb07aee83a80e5a8 |
|
20-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
Fix PR1001, patch by Nikhil Patil! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31880 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
33a400477b6c5122ea2f28fa152698b10cffe9c6 |
|
14-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
restore some 'magic' code that I removed: it is needed. Add comments explaining why. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31743 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
717a611f79b47932bb2de9643e02ed25edaec4a5 |
|
14-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
minimal hack to get patterns whose result type is iPTR to be selected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31742 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
0d1bb1322cf60f4775c0b04cde6f2126d4d104a9 |
|
14-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
remove some dead code git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31740 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
ab51ddd7c0a35c6d5e4f6614a9c5a8a87ecfe55b |
|
14-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
Add support for nodes that return iPTR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31739 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
646085dde967b61aa705479915f2dd1fa9fc1186 |
|
14-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
changes to get ptr_rc to be accepted in patterns. This is needed for ppc preinc stores. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31738 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
7c3a96b81a66eadffe54366b1b0952f11f7876f6 |
|
14-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a bug handling nodes with variable arguments. The code was fixed to assume that there were two input operands before the variable operand portion. This *happened* to be true for all call instructions, which took a chain and a destination, but was not true for the PPC BCTRL instruction, whose destination is implicit. Making this code more general allows elimination of the custom selection logic for BCTRL. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31732 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
892aaf8d74fecfca06dad1b9df373033aca37d82 |
|
09-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Divide select methods into groups by SelectionDAG node opcodes (ISD::ADD, X86ISD::CMP, etc.) instead of SDNode names (add, x86cmp, etc). We now allow multiple SDNodes to map to the same SelectionDAG node (e.g. store, indexed store). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31575 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
811731e340c54f761a199a6b2d35af7f03b42664 |
|
08-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Always pass the root node to ComplexPattern isel matching function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31570 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
efe9f4a3b69eb2a31f006476996c8ef722345193 |
|
04-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
Parse PredicateOperand's. When an instruction takes one, have the generated isel fill in the instruction operands with the 'execute always' value automatically. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31448 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
dfdaeb276e50baea18abbe30a85f1c206bb3d154 |
|
04-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
First steps to getting PredicateOperand's to work. This handles instruction and pat pattern definitions. Codegen is not right for them yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31444 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
9c5d4de8375f5111765519ac762427b2b8255df6 |
|
03-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
silence warnings git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31392 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
63fd6ad77b6d5e62d90c416231e994245225d731 |
|
02-Nov-2006 |
Reid Spencer <rspencer@reidspencer.com> |
Revert last patch which causes tblgen to segfault (why, I'm not sure). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31383 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
9ec4849ff6cd771f53a1340aa6383702b7a6bb98 |
|
02-Nov-2006 |
Reid Spencer <rspencer@reidspencer.com> |
For PR786: Remove unused variables. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31381 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
0db427bb2d06950750faac4dc0440493dca5ff78 |
|
01-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Not meant to be checked in. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31334 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
e2ba8975883874633a1035c245af3b948b940b25 |
|
01-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Add operand constraints to TargetInstrInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31333 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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13e9e9c235a1cfce470f5ed5415c494403b5aa52 |
|
16-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Passing isel root and use operands to ComplexPattern functions, these should do the usual load folding checks as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30972 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
ce1381afd9e77c323b973989d8bb257dc33e7dda |
|
14-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
When checking if a load can be folded, we check if there is any non-direct way to reach the load via any nodes that would be folded. Start from the root of the matched sub-tree. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30956 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
4f77616c28767cf9b7b16ebabdf189423e37c691 |
|
13-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Really remove dead nodes from isel queue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30923 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
1fae00f1ad97f3aa128f9622e152fdb383a07347 |
|
12-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Use RemoveDeadNode to kill dead node. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30917 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
4326ef582bceb8841f36623d98a98ee879642f2f |
|
12-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Prior load folding check on chain operand was too strict. It requires the chain operand to point to the load being folded. Now we relax this, traversing up the chain, if it doesn't reach the load, then it's ok. We will create a TokenFactor (of all the chain operands and the load's chain) to capture all the control flow dependencies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30897 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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94b3040fef9475c74b877fb32cb45200cea273bb |
|
11-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added properties such as SDNPHasChain to ComplexPattern. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30890 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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39e73f7c8318ab2791884d1c4e78ff849ddbaa16 |
|
11-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Special case tblgen generated code for patterns like (and X, 255) or (or X, 42). The dag/inst combiners often 'simplify' the masked value based on whether or not the bits are live or known zero/one. This is good and dandy, but often causes special case patterns to fail, such as alpha's CMPBGE pattern, which looks like "(set GPRC:$RC, (setuge (and GPRC:$RA, 255), (and GPRC:$RB, 255)))". Here the pattern for (and X, 255) should match actual dags like (and X, 254) if the dag combiner proved that the missing bits are already zero (one for 'or'). For CodeGen/Alpha/cmpbge.ll:test2 for example, this results in: sll $16,1,$0 cmpbge $0,$17,$0 ret $31,($26),1 instead of: sll $16,1,$0 and $0,254,$0 and $17,255,$1 cmpule $1,$0,$0 ret $31,($26),1 ... and requires no target-specific code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30871 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
be8e72120d991d2b0c6b06db29f9d1d9fe1c7acd |
|
11-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Split some code out into a new method. The generated code is exactly identical, this is just a refactoring. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30868 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
d3eea90a9b650a03330c361914c0deb0a0410431 |
|
09-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Predicate function on the node should be matched before its childrean' matching code. This is especially important now matching ISD::LOAD also requires a Predicate_Load call. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30845 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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ce6e84ca6caeb5d2fc903a897d7225f098f1f750 |
|
21-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
don't allow 'imm' or specific imms, like '1' on the LHS of a binop. This shrinks X86GenDAGISel by ~330 lines. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30574 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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649069728f49f041df68c54ead70687ecb946e89 |
|
21-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Fit to 80 columns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30572 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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d46bd604ed0613debf35a36d9f7f0418079b0b89 |
|
19-Sep-2006 |
Evan Cheng <evan.cheng@apple.com> |
Allow PatFrag to be a leaf node. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30498 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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cf6d791e08ad0a3c147b7c338429e2f8ed8d226a |
|
19-Sep-2006 |
Evan Cheng <evan.cheng@apple.com> |
Add result of a Xform to isel queue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30497 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
bc7fa5277ffedc6f5874463101eed3d510c772f3 |
|
19-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
If multiple predicates are listed, they must all pass git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30476 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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47a7e2681e9472bb2763dc1db89b64b8bf6bf316 |
|
19-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
There! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30473 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
a4503de431e47c041eec5152810e843f76f56d58 |
|
19-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Fix Regression/TableGen/2006-09-18-LargeInt.td git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30472 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
7905c55b12bd5bff95304e3e7152d7a41ec8a78c |
|
15-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Relax this check. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30381 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
966fd37ba574930658c83710952df5d00a8fed92 |
|
11-Sep-2006 |
Evan Cheng <evan.cheng@apple.com> |
1) With X86 lowering change, the following can no longer happen since the branch's chain is also produced by cmp. [ch, r : ld] ^ ^ | | [XX]--/ \- [flag : cmp] ^ ^ | | \---[br flag]- Remove an isel check which prevents loads from being folded into cmp / test instructions. 2) Whenever possible, delete a selected node to allow more load folding opportunities. Note not all nodes can be deleted after it has been selected. Some may have simply morphed; some have not changed at all (e.g. EntryToken). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30242 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
6cec34e094b0c14c15adcc3f9cbbbf6af7cb6c44 |
|
08-Sep-2006 |
Evan Cheng <evan.cheng@apple.com> |
Generated isel should favors explicit constant operand (+2) over an operand with a predicate (+1). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30180 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
8dc728e4408fdfb02505d6a6862daae801e486ce |
|
27-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
Use compiler.h instead of hand rolling our own macro git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29913 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
f037ca6245ed148941227736d7d9a0895a359fd7 |
|
27-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
Do not emit getTargetNode() and SelectNodeTo() which takes more than 3 SDOperand arguments. Use the variants which take an array and number instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29906 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
95514bae7309ffacfc0a79b267159dcfde2b7720 |
|
26-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
SelectNodeTo now returns a SDNode*. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29901 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
7a33db0b201cf0c93f85366ec0d98170f4492f4d |
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26-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
Minor getCopyToReg() call change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29900 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
9ade218533429146731213eacb7e12060e65ff58 |
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26-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
Select() no longer require Result operand by reference. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29898 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
2a318cfad5c1be3d28b48076e991baffa30aa9b5 |
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26-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
Remove dead code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29897 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
f549319b4ab4106a22dde49216b9b07fc54ab8ff |
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26-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
A bit more clean up. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29893 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
676d731c611156cfc515fda96cf97321c2bf4c04 |
|
26-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
- Clean up tablegen dag isel generator code. - Clean up the code generated by tablegen: * AddToISelQueue now takes one argument. * ComplexPattern matching condition can now be shared. * Eliminate passing unnecessary arguments to emit routines. * Eliminate some unneeded SDOperand declarations in select routines. * Other minor clean ups. - This reduces foot print slightly: X86ISelDAGToDAG.o is reduced from 971k to 823k. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29892 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
23329f5e0366af7cd9a96572ed8d6322696e5846 |
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16-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
SelectNodeTo() may return a SDOperand that is different from the input. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29726 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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dfb8607397cba373ad75c9491a7d35e130299e63 |
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16-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
The generated runloop shouldn't require Select to update 'Result'. In fact we'd like to remove result entirely. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29713 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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5298de51b81ac44992f3aa4357267c05ea916231 |
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16-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
allow Select to return the node being selected if RAU isn't needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29712 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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1e060f0242160f3fb44ff4f38e3a44d684e8a842 |
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11-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
Use SmallVector instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29619 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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06d6470c65ebc2661f0b257aaa07e6034db584d8 |
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11-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
- Prevent some functions from being inlined to eliminate the code size bloat introduced by previous commit. - SelectCode now returns a SDNode*. If it is not null, the selected node produces the same number of results as the input node. The seletion loop is responsible for calling ReplaceAllUsesWith() to replace the input node with the output target node. For other cases, e.g. when load is folded, the selection code is responsible for calling ReplaceAllUsesOfValueWith() and SelectCode returns NULL. - Other clean ups. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29602 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
706d2d360818d8f8bc3fc349d82c78f577f13ec4 |
|
09-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
Revert previous patch git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29585 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
8d4ccf0ad4bd111f88bb54f412a37b3e45f06953 |
|
09-Aug-2006 |
Tanya Lattner <tonic@nondot.org> |
Reverting back to original 1.8 version so I can manually merge in patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29584 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
bd564bfc63163e31f320c3da9749db70992dc35e |
|
08-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
Start eliminating temporary vectors used to create DAG nodes. Instead, pass in the start of an array and a count of operands where applicable. In many cases, the number of operands is known, so this static array can be allocated on the stack, avoiding the heap. In many other cases, a SmallVector can be used, which has the same benefit in the common cases. I updated a lot of code calling getNode that takes a vector, but ran out of time. The rest of the code should be updated, and these methods should be removed. We should also do the same thing to eliminate the methods that take a vector of MVT::ValueTypes. It would be extra nice to convert the dagiselemitter to avoid creating vectors for operands when calling getTargetNode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29566 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
9bdca0302a0492a6211aa06ba374679ddad63108 |
|
08-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
Making TableGen'd instruction selection code non-recursive. This fixes PR805. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29548 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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58d63567eac15dec2f57addb96e5bd92a86abc52 |
|
03-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
Remove some extraneous newlines. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29492 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
32501a0e33d6bebd821d2118502df255cf12cf70 |
|
03-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
Really add support for compilers without noinline git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29491 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
d3f8429f01150976d415e46aea999ec1938a6e50 |
|
01-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
Pass N by reference to select functions to prevent gcc from allocating more stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29423 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
6966c48767f988dec21598bdb0e551caad0dea7b |
|
31-Jul-2006 |
Evan Cheng <evan.cheng@apple.com> |
Remove an unneeded match condition: the type check for root node has been moved to outside the actual select routine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29415 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
b6ee7f73e58adbd5c5c8b923cce818b69d059a42 |
|
29-Jul-2006 |
Evan Cheng <evan.cheng@apple.com> |
Split each select function for a particular opcode into multiple ones. One per possible ValueType of the node. e.g. Select_add is split into Select_add_i8, Select_add_i16, etc. For opcodes which do not produce a non-chain result, it is split on the ValueType of its first non-chain operand. e.g. Select_store. On X86 / Mac OS X, Select_store used to be the largest function. It had a stack frame size of 8.5k. Now the largest one is Store_i32 with a frame size of 3.1k. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29404 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
dc7a66a0819e65fa5164c9bdc35e02f47b878b47 |
|
28-Jul-2006 |
Evan Cheng <evan.cheng@apple.com> |
Clean up. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29378 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
f2dfafcbc1026b22442acbcddebf4039e4354918 |
|
28-Jul-2006 |
Evan Cheng <evan.cheng@apple.com> |
Rename IsFoldableBy to CanBeFoldedleBy git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29376 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
2641cad180e94c0d26630d4ed455352f19be3d3e |
|
28-Jul-2006 |
Evan Cheng <evan.cheng@apple.com> |
Remove InFlightSet hack. No longer needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29373 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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3aac4d58e415b9efa5d214cb5d9a25bc616fa4d7 |
|
27-Jul-2006 |
Evan Cheng <evan.cheng@apple.com> |
Remove dead code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29359 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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b2c121ac14707db27d73169dab6c5d8592709843 |
|
27-Jul-2006 |
Evan Cheng <evan.cheng@apple.com> |
Let each target specific isel provide routine to check if a chain producing node is foldable by another. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29335 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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233baf1c4b7b170c62d31a3a432e06b637589630 |
|
27-Jul-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fix for bug 840. Only use noinline attribute if gcc version >= 3.4 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29311 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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e6389935a9ab497b9e5f4b369fa433fbdc04c915 |
|
22-Jul-2006 |
Evan Cheng <evan.cheng@apple.com> |
Removed a hack intended to allow (store (op (load))) folding. Will handle this with preprocessing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29258 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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eb1f40d3afe8aa5c9af0cad7e26cd3981dbc95cc |
|
21-Jul-2006 |
Evan Cheng <evan.cheng@apple.com> |
Also checks for noResults field. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29235 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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e6f32034dbacf1a71e78b69391fb0dc4aeba9902 |
|
19-Jul-2006 |
Evan Cheng <evan.cheng@apple.com> |
Add code size to target instruction use it as the 3rd isel sorting tie-breaker. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29193 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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fb878a37ba2162df65519735ccd288a3a721446e |
|
16-Jul-2006 |
Evan Cheng <evan.cheng@apple.com> |
Use __attribute__((noinline)) only if compiled by gcc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29161 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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f872940dfc8994865bac20fb0654ddfbec935331 |
|
16-Jul-2006 |
Evan Cheng <evan.cheng@apple.com> |
Parameterize target node ValueType to allow more sharing of emit functions. Also reduce the number of arguments passed to emit functions and removed a hack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29160 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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fceb57a917bf4037a6653ca00441584f190a14e1 |
|
15-Jul-2006 |
Evan Cheng <evan.cheng@apple.com> |
Reduce instruction selection code size and stack frame size by factoring code that emit target specific nodes into emit functions that are uniquified and shared among selection routines. e.g. This reduces X86ISelDAGToDAG.o (release) from ~2M to ~1.5M. Stack frame size of Select_store from ~13k down to ~8k. This is the first step. Further work to enable more sharing will follow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29158 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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16d42c6ac65e19aedfb4853724416cefda27134e |
|
11-Jul-2006 |
Jim Laskey <jlaskey@mac.com> |
It was pointed out that DEBUG() is only available with -debug. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29106 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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e37fe9b3a1cadceb42ac27fa0718f5a10ea2f0e6 |
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11-Jul-2006 |
Jim Laskey <jlaskey@mac.com> |
Ensure that dump calls that are associated with asserts are removed from non-debug build. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29105 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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322812e603705e1c2037313633e72f689524b163 |
|
30-Jun-2006 |
Evan Cheng <evan.cheng@apple.com> |
Ugly hack! Add helper functions InsertInFlightSetEntry and RemoveInFlightSetEntry. They are used in place of direct set operators to reduce instruction selection function stack size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28987 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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02cdb377eca9fedd28180fa396222e78c8e7134a |
|
20-Jun-2006 |
Chris Lattner <sabre@nondot.org> |
Fix an error message regression. Print: LI8: (LI8:i64 (imm:i64):$imm) instead of: LI8: (LI8:MVT::i64 (imm:MVT::i64):$imm) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28868 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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186fb7d131d598c3596204886bd754a47bb268a2 |
|
20-Jun-2006 |
Chris Lattner <sabre@nondot.org> |
Don't require src/dst patterns to be able to fully resolve their types, because information about one can help refine the other. This allows us to write: def : Pat<(i32 (extload xaddr:$src, i8)), (LBZX xaddr:$src)>; as: def : Pat<(extload xaddr:$src, i8), (LBZX xaddr:$src)>; because tblgen knows LBZX returns i32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28865 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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a354849c27ef5a4bc55d03a15ce6f89f22a1ca5c |
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20-Jun-2006 |
Chris Lattner <sabre@nondot.org> |
Make sure to use the result of the pattern to infer the result type of the instruction, and the result type of the instruction to refine the pattern. This allows us to write things like this: def : Pat<(v2i64 (bitconvert (v16i8 VR128:$src))), (v2i64 VR128:$src)>; as: def : Pat<(v2i64 (bitconvert (v16i8 VR128:$src))), (VR128:$src)> and fixes a ppc64 issue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28863 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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8f60d54fb13191942e6fea832a2aed8338a86fc8 |
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16-Jun-2006 |
Chris Lattner <sabre@nondot.org> |
Improve a comment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28833 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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d7c2c86239dd543906c363e45e18766223d14c6e |
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15-Jun-2006 |
Evan Cheng <evan.cheng@apple.com> |
Allow more use of iPTR in patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28790 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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e945f4d3d46ca45681dc18923337b5e4c5d4fc0f |
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15-Jun-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added support for variable_ops. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28788 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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bc6b86a89e762b6c45898df287ff492db87d214a |
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14-Jun-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fix support for optional input flag. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28784 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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50c997e26aef7a8532c64064003eaf649d237cc9 |
|
13-Jun-2006 |
Evan Cheng <evan.cheng@apple.com> |
getOperandNum(): error if specified operand number is out of range. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28775 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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11bcd28dfff6868a37dc49fc6f322094874e3967 |
|
10-Jun-2006 |
Chris Lattner <sabre@nondot.org> |
Wrap to 80 cols git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28743 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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553ef1be94dffdedbc6e1fce9de91f77e5f12b95 |
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25-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Can't trust NodeDepth when checking for possibility of load folding creating a cycle. This increase the search space and will increase compile time (in practice it appears to be small, e.g. 176.gcc goes from 62 sec to 65 sec) that will be addressed later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28476 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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b0793f9741f7219c764e23cb99d4bda018e4f56c |
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25-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fixed a really ugly bug. The TableGen'd isel is not freeing the "inflight set" correctly. That is causing non-deterministic behavior (and possibly preventing some load folding from happening). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28458 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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d15531b43024a1cbe5bb3d7318d72f54d93cda52 |
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19-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Now that iPTR is a fully resolved type. We end up losing the type check for patterns that look like this: def : Pat<(i32 (X86Wrapper tconstpool :$dst)), (MOV32ri tconstpool :$dst)>; InsertOneTypeCheck should copy the type from the resolved pattern to the unresolved one as long as there types are different. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28389 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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2618d07765e94ca12c68c9db31e7843cc69d7178 |
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17-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Remove PointerType from target definition. Use abstract type MVT::iPTR to represent pointer type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28363 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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44a65fa552ed61cf9dba8f68f59b05e5137e6b01 |
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16-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Allow patterns to refer to physical registers that belong to multiple register classes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28323 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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d9d4518a86eecf6cf86b1ef45cab428db2042366 |
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12-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Unused instruction git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28240 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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3eff89bf8967d35176fc1d3e80c1a5faf74fb9d8 |
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10-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Watch out for the following case: 1. Use expects a chain output. 2. Node is expanded into multiple target ops. 3. One of the inner node produces a chain, the outer most one doesn't. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28209 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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045953c37a1251bf646c06fe791365191ab15dec |
|
10-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fix a load folding bug. It is exposed by a multi- resulting instructions def : Pat<> pattern. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28208 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
55d0fa1bfaec665c949b1069225bbc23ca7782bc |
|
28-Apr-2006 |
Evan Cheng <evan.cheng@apple.com> |
Remove the temporary option: -no-isel-fold-inflight git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28012 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
61a0209a8ac7b55a40f291f30679f16b3eb1d83c |
|
28-Apr-2006 |
Evan Cheng <evan.cheng@apple.com> |
When isel'ing a node, mark its operands "InFlight" before selecting them. These nodes should not be folded into other nodes. This fixes the miscompilation of PR 749. Temporarily under flag control. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28002 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
37efe6764568a3829fee26aba532283131d1a104 |
|
22-Apr-2006 |
Nate Begeman <natebegeman@mac.com> |
JumpTable support! What this represents is working asm and jit support for x86 and ppc for 100% dense switch statements when relocations are non-PIC. This support will be extended and enhanced in the coming days to support PIC, and less dense forms of jump tables. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27947 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
c81d2a041de34645859b3d4d2e85edeb3963733d |
|
19-Apr-2006 |
Evan Cheng <evan.cheng@apple.com> |
Rename AddedCost to AddedComplexity. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27841 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
5941320c0d89711571b87c486b5c50a7c70a8130 |
|
19-Apr-2006 |
Evan Cheng <evan.cheng@apple.com> |
Allow "let AddedCost = n in" to increase pattern complexity. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27834 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
91ded082246312ede09d25ac4e055803f7983d77 |
|
06-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Infer element types for shuffle masks git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27456 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
52793e2c41b2c073e1175b9292aba48d0c23019e |
|
06-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
rename a method, to avoid confusion with llvm intrinsics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27455 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
ffa4fdcd17779d6262f66633ecfb35050344fce9 |
|
31-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Allow bits init values to be used in patterns, turn them into ints. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27286 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
8c06318821e4febb3a7f1afbab72dae362f1bf5f |
|
31-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Implement Regression/TableGen/DagDefSubst.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27263 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
b026e70462d3e59f4a7b8029669d804d3e0387ed |
|
28-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum value. Split them into separate enums. Also, don't emit dynamic checks when we can compute them statically git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27202 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
2c4e65d460470d9ea19a46446af8ff41f343a3bd |
|
28-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Print error messages like this: tblgen: In STVEBX: Intrinsic 'llvm.ppc.altivec.stvebx' expects 3 operands, not 2 operands! instead of like this: tblgen: In STVEBX: Intrinsic 'intrinsic_void expects 3 operands, not 2 operands! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27185 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
5c4c774c75926402b746b14ba73f01572e464ebb |
|
25-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Add a missing check which cause an invalid .td file to crash tblgen git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27126 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
9bf2d3e6d6768809144eb72c1a6f8e03d2b328f3 |
|
25-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
When failing selection for an intrinsic, print this: Cannot yet select: intrinsic %llvm.ppc.altivec.lvx instead of this: Cannot yet select: 0x9b047e0: v4i32,ch = INTRINSIC 0x9b04540:1, 0x9b04710, 0x9b04790, 0x9b04540 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27110 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
5a1df389a675c8f9bb73afc95132751508e24762 |
|
25-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Change approach so that we get codegen for free for intrinsics. With this, intrinsics that don't take pointer arguments now work. For example, we can compile this: int test3( __m128d *A) { return _mm_movemask_pd(*A); } int test4( __m128 *A) { return _mm_movemask_ps(*A); } to this: _test3: movl 4(%esp), %eax movapd (%eax), %xmm0 movmskpd %xmm0, %eax ret _test4: movl 4(%esp), %eax movaps (%eax), %xmm0 movmskps %xmm0, %eax ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27090 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
947604b0e28ddec8e35b1199c7e718537312a5a8 |
|
24-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
fix 80 column violations git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27084 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
550525e3cf3a6ae60ccc7c6a6d82f83ab3ee0b84 |
|
24-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Parse intrinsics correctly and perform type propagation. This doesn't currently emit the code to select intrinsics, but that is next :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27082 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
83e1a6ab9587cffcbeae527ab003e321f3da4775 |
|
23-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Allow result node to be a simple leaf node. This enable bitconvert patterns like this: def : Pat<(v4i32 (bitconvert (v4f32 VR128:$src))), (v4i32 VR128:$src)>; git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26968 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
3a7a14b0ae08ae318ace037807577fc273a91639 |
|
21-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Don't forget to promote xform function to an explicit node for def : Pat<> patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26929 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
4e2f54d99e551832355e5e7c28111c7664b11de5 |
|
21-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
minor code simplification git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26918 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
863bf5afb04a77d43e4f77f450dbb2452860eeb9 |
|
20-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
The node wrapped in PatLeaf<> should be treated as a leaf even if it isn't one, i.e. don't select it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26909 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
f26ba697258755b0b7b9642822f3c4c18a5004aa |
|
20-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
It should be ok for a xform output type to be different from input type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26899 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
420132e1eb1ee1002d79c9605ddbe21d9f686f6b |
|
20-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Copy matching pattern's output type info to instruction result pattern. The instruction patterns do not contain enough information to resolve the exact type of the destination if it of a generic vector type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26892 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
697f88456ce41ca425eaf7f882cc910bbac3100b |
|
20-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Add a new SDTCisIntVectorOfSameSize type constraint git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26890 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
ed66e855ecc2ffca317a9dbca2a32b97ec9d3d7a |
|
09-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Temporary hack to enable more (store (op (load ...))) folding. This makes it possible when a TokenFactor is between the load and store. But is still missing some cases due to ordering issue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26638 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
6f8aaf2cb0f2e4d01680e67d365137cf731ad809 |
|
07-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Don't generate silly matching code like this: if (N1.getOpcode() == ISD::ADD && ...) if (... && (N1.getNumOperands() == 1 || !isNonImmUse(N1.Val, N10.Val))) && ...) TableGen knows N1 must have more than one operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26592 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
fd105d464a8a61a6dd7e6e11b7da87417e713c39 |
|
24-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Select inline asm memory operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26349 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
fbad70808cc17b56703777598d276723608d717d |
|
18-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Bump up pattern cost if the resulting instruction is marked usesCustomDAGSchedInserter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26282 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
67212a05e6897b46ad92ca19cb278b92ec409342 |
|
09-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Call InsertISelMapEntry rather than map insertion operator to prevent overly aggrssive inlining. This reduces Select_store frame size from 24k to 10k. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26095 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
d7805a741d1fd0a6ed14aa0cea4a949eccf390ad |
|
09-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Match getTargetNode() changes (now returns SDNode* instead of SDOperand). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26084 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
34167215a8da717b21e44f1b834dc34d15279bf1 |
|
09-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Change Select() from SDOperand Select(SDOperand N); to void Select(SDOperand &Result, SDOperand N); git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26067 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
21ad392ee69191f414fd027ed52360282b0bacbf |
|
07-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Hoist all SDOperand declarations within a Select_{opcode}() to the top level to reduce stack memory usage. This is intended to work around the gcc bug. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26026 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
7cd19d038f63330bbafcaa004b41fec272d1220e |
|
06-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
At the end of isel, select a replacement node for each handle that does not have one. This can happen if a load's real uses are dead (i.e. they do not have uses themselves). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26014 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
024524fe9b08dbfa81ea5a8a46905ceda970392b |
|
06-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Name change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26013 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
0a83ed506c42b9f90d95b5c216aa75af7f8fd8c9 |
|
05-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Handle HANDLENODE: just return itself. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26011 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
e41bf82107eb89b7f97233ee2625f107c056cedf |
|
05-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Allow more loads to be folded which were previously prevented from happening due to ordering issue. i.e. they were selected for chain use first. Now at load select time, check if it is being selected for a chain use and if it has only a single real use. If so, return a HANDLENODE (with the load as its operand) in its place and record it. When it is folded or the load is selected for a real use, the isel records it as the replacement for the HANDLENODE. The replacement is done when all nodes are selected. This scheme exposed a couple of problems where cycles can happen. (See comments in EmitMatchCode() for descriptions of the problems and their workaround / solutions.) These problems have been resolved with a small compile time penality. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25995 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
2216d8ad2f728885ef8581fd6e76c029e9ae5243 |
|
05-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Re-committing the last bit of change. It shouldn't break PPC this time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25982 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
9ed44818c5ee0385db3d19b59d9c6a020fbdf084 |
|
04-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Temporarily revert the last change, which breaks PPC and other targets that DO select things. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25970 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
9c4815a0362575bcd207619188156b5fad73c2bc |
|
04-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
Complex pattern's custom matcher should not call Select() on any operands. Select them afterwards if it returns true. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25968 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
3e1798086b2cb4b1f96fcbb1b8a084c8af092363 |
|
03-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
node predicates add to the complexity of a pattern. This ensures that the X86 backend attempts to match small-immediate versions of instructions before the full size immediate versions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25937 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
e4a8a6e645b82e8fb5863ae78717cf99cd295f89 |
|
03-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
(store (op (load ...))) folding problem. In the generated matching code, Chain is initially set to the chain operand of store node, when it reaches load, if it matches the load then Chain is set to the chain operand of the load. However, if the matching code that follows this fails, isel moves on to the next pattern but it does not restore Chain to the chain operand of the store. So when it tries to match the next store / op / load pattern it would fail on the Chain == load.getOperand(0) test. The solution is for each chain operand to get a unique name. e.g. Chain10. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25931 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
657416cfba9f0b2823cf885391441971edcf4190 |
|
01-Feb-2006 |
Evan Cheng <evan.cheng@apple.com> |
If a pattern's root node is a constant, its size should be 3 rather than 2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25870 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
7859313bae07a5c46cbec7e5012483425fcda7c0 |
|
29-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
simplify some code git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25791 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
8e51773bb7876a917fa1b6ee222f84b172000950 |
|
29-Jan-2006 |
Andrew Lenharth <andrewl@lenharth.org> |
it is nice not to chop off bits for those blessed with lots of bits git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25766 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
2cba57cb09e4324201555e10aa28cdbcee07cb2c |
|
29-Jan-2006 |
Andrew Lenharth <andrewl@lenharth.org> |
make the casts actually cast to the variable type git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25765 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
5c6bdf71d4c78c4bada45650fc7c1f0c038b62a4 |
|
29-Jan-2006 |
Andrew Lenharth <andrewl@lenharth.org> |
start of the 64bit safety cleanup git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25764 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
24e00a4ac1781d86c0647de7dbfa03b5a5f50373 |
|
29-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Emit series of conditionals with &&, emitting stuff like this: if (N1.getOpcode() == ISD::LOAD && N1.hasOneUse() && !CodeGenMap.count(N1.getValue(0)) && !CodeGenMap.count(N1.getValue(1))) { instead of this: if (N1.getOpcode() == ISD::LOAD) { if (N1.hasOneUse()) { if (!CodeGenMap.count(N1.getValue(0))) { if (!CodeGenMap.count(N1.getValue(1))) { git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25763 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
8bc7472a0cce53ea3047da4fc4859eb6b34f8565 |
|
29-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Factor matching code that is common between patterns. This works around GCC not jump-threading across this common code, and produces far nicer output. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25762 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
2bd4dd76681fc8b507d4b99af5ab83e11a558ad0 |
|
29-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Split out code generation from analysis from emission git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25759 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
355408bcb73f781c72f85de9a3296e025e9e9edf |
|
29-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
move some code around, no change in the generated code git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25758 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
67a202bc4212f3a53db7ce83bf8d59885d148f3e |
|
28-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
now that we have control over emission of the code, emit the code using nested "if" statements (indenting it appropriately, of course) instead of using goto's. This inverts the logic for all of the if statements, which makes things simpler to understand in addition to making the generated code easier to read. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25757 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
8a0604b5235ac4f7cdb229b6a7987ff1ec708bf5 |
|
28-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Change PatternCodeEmitter to emit code into a buffer instead of emitting it directly to the output file. This makes things simple because the code doesn't have to worry about indentation or the case when there is no goto. It also allows us to indent the code better without touching everything :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25756 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
488580c1ed06ea156e3b0c9709f528ecc8bd2dc2 |
|
28-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Fit to 80 columns, no functionality change git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25752 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
9b0ffca47844c10b778d37cf5641a108e5218dd6 |
|
27-Jan-2006 |
Jeff Cohen <jeffc@jolt-lang.org> |
Teach tablegen to generate code that is VC++ warning-free. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25709 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
c15d18c5015a01336b00e3ba3638fd6a35f68201 |
|
27-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
(store (op (load ...)), ...) If store's chain operand is load, then use load's chain operand instead. If it isn't (likely a TokenFactor), then do not allow the folding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25708 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
fabcb7abc57253c0e8ba1de1952a6b332ea9cd7b |
|
27-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Teach the dag selectors to select InlineAsm nodes. Aren't we happy the pattern selectors are almost all gone? git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25666 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
1feeeecf4cb28e34c7577719087aa41ec6610b28 |
|
26-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Another folding problem: if a node r/w chain or flag, don't fold it if it has already been selected. The number of use check is not strong enough since a node can be replaced with newly created target node. e.g. If the original node has two uses, when it is selected for one of the uses it is replaced with another. Each node now has a single use but isel still should not fold it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25651 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
8eab3608de260527929d327a5e63b547c0d267cf |
|
26-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Add a FIXME comment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25635 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
545977371af05c3c9a449928158709daa834c802 |
|
26-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Incoming (and optional) flag bugs. They may be embedded inside a inner node of a pattern. Also, nodes which take incoming flag should not be folded if it has more than one use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25627 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
9789aaad632f5a75fc8b8e70fd27aaa92199f3bb |
|
24-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fix an optional in flag bug. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25590 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
18667c45458352e4d7d5f7f0147232a9ca4a7928 |
|
24-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Optional InFlag was not being included in node. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25588 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
76356d95944ac2f560c0193c5ca314da7998a366 |
|
20-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Prevent folding of a node with multiple uses if the node already folds a load! Here is an example where the load ended up being done twice: %A = global uint 0 uint %test(uint %B, ubyte %C) { %tmp = load uint *%A; %X = shl uint %tmp, ubyte %C %Cv = sub ubyte 32, %C %Y = shr uint %B, ubyte %Cv %Z = or uint %Y, %X store uint %Z, uint* %A ret uint %Z } ==> subl $4, %esp movl %ebx, (%esp) movl 8(%esp), %edx movl A, %eax movb 12(%esp), %bl movb %bl, %cl shldl %cl, %edx, %eax movb %bl, %cl shldl %cl, %edx, A movl (%esp), %ebx addl $4, %esp ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25471 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
823b752d75dd395c69d297ee17f1cda9e4b3cd43 |
|
19-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Bug fix. Flag operand number may be calculated incorrectly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25465 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
7419de89fbafeaf5afda6cf93bba3520d75e1762 |
|
19-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Use pattern information to determine whether the use expects this instruction to produce a result. e.g MUL8m, the instruction does not produce a explicit result. However it produces an implicit result in AL which would be copied to a temp. The root operator of the matching pattern is a mul so the use would expect it to produce a result. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25458 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
b4ad33c4aedc124f956ff6866fc73db14be534ee |
|
19-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Prevent unnecessary CopyToReg when the same HW register appears in two spots in the pattern. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25437 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
57c517d30c18295f67287bc8e8577833737da828 |
|
17-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Emit a type matching check for ComplexPatterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25392 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
37e9005db3efcd2a635ed0f84e8aee6b421fe007 |
|
15-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Type inferencing bug git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25337 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
f805c2ed7f8e13c18913a90542f3084a30222e84 |
|
12-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Allow transformation from GlobalAddress to TargetGlobalAddress and ExternalSymbol to TargetExternalSymbol. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25252 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
bb48e33bcdc98fbed7c37aaa7f76ddb7b04b254f |
|
12-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
GlobalAddress -> TargetGlobalAddress; ExternalSymbol -> TargetExternalSymbol git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25245 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
b2c6d4957a5594311952477473fc6a9bdf3476d0 |
|
11-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Some minor fixes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25227 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
8020a5233cbdc20f5262467831256b97803f8e57 |
|
11-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Always select target registers to themselves git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25218 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
7893f13ad69d56142e848f1091d131dc8a394937 |
|
11-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Emit an error instead of an assertion if trying to do bogus things in result patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25194 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
51fecc80f77e1ed048c69b8905742b3ca495d757 |
|
09-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
* Remove instruction fields hasInFlag / hasOutFlag and added SNDPInFlag and SNDPOutFlag to DAG nodes. These properties do not belong to target specific instructions. * Added DAG node property SNDPOptInFlag. It's same as SNDPInFlag except it's optional. Used by ret / call, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25154 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
4a7c284b3564079b89cab1bea827f0ea78e74ffa |
|
06-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Pattern complexity calculation fix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25133 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
e1050d616bafa1f52485b669b34163f1d00ff104 |
|
06-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Tweak pattern complexity calc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25122 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
1cf6db2d3b9637dcd359ed9e2f46d03d3226632e |
|
06-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Bug fix wrt chain operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25115 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
60e9187a90c93a7660946789af52d9b40f652a0c |
|
04-Jan-2006 |
Jeff Cohen <jeffc@jolt-lang.org> |
Replace fix with one less disruptive to the original code. Also note that GCC 4.1 also correctly flags the syntax error. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25076 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
f356d70ec3a231ee760529fa1ca966f3e0b5161c |
|
04-Jan-2006 |
Jeff Cohen <jeffc@jolt-lang.org> |
Tblgen was generating syntactically illegal C++ code like: SDOperand Tmp0,Tmp1,Tmp2,Tmp3,; GCC has a bug (24907) in which is fails to catch this, but VC++ correctly notes its illegality, so tblgen must be taught to only generate legal C++. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25075 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
11966a0179c9721819a5032b6a70d8603f65872e |
|
04-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Remove obsolete comment, make things look a bit nicer git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25070 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
602f69246154203ea564b7010cd46b3b59e4b3d4 |
|
04-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
reduce stack usage of the recursive SelectCode function by out-lining each case of the switch statement into its own method. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25069 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
4e3c8e516f5c6707c536f5a5deb5ce74bfba40dd |
|
03-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Remove my previous ugly hack that tries to reduce the stack space usage of SelectCode to make way for a better solution. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25068 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
d47ae09dabed46402d81631f4ade395df852996b |
|
30-Dec-2005 |
Duraid Madina <duraid@octopus.com.au> |
HP-UX DVDs are crunchy and good to eat git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25052 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
b73628b5abee86ef76e1ed8c7f9eaed85bea61a8 |
|
30-Dec-2005 |
Nate Begeman <natebegeman@mac.com> |
Add support for generating v4i32 altivec code git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25046 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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2b4ea795a23ff9d900b9e1f26c92975ef78db1b6 |
|
26-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Added field noResults to Instruction. Currently tblgen cannot tell which operands in the operand list are results so it assumes the first one is a result. This is bad. Ideally we would fix this by separating results from inputs, e.g. (res R32:$dst), (ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding 'let noResults = 1' is the workaround to tell tblgen that the instruction does not produces a result. It works for now since tblgen does not support instructions which produce multiple results. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25017 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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330851a8f6cc7cf8ccf54ade63b5d58614c0218e |
|
25-Dec-2005 |
Andrew Lenharth <andrewl@lenharth.org> |
support targetexternalsym git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25005 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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7b05bd58149f7984257d7881aaa2bd9407628754 |
|
23-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
* Support for hasInFlag and hasOutFlag (on instructions). Remove nameless FLAG support which is fragile. * Fixed a number of bugs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24996 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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7a8054f5f2027bc419d3af2e15c504f2d5fd1dba |
|
22-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
silence some bogus gcc warnings git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24962 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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3a217f3e53a6d3f942583f843df5bade961cdfb1 |
|
22-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Attempt to fix a crash on WIN32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24936 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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9793888be8615c8363f6408fbd16f240ecdfbd80 |
|
22-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
* Added support for FLAG - a special nameless flag register. Can be used as either an operand or a result. * Fixed some more flag / chain bugs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24933 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
87bddeb2afeaa8cebe43a216430375afec8c16d3 |
|
21-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Allows instructions which no explicit operands. e.g. X86 RET which has but an implicit flag operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24916 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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4e6a1d2433d498ae187791d3b8c925bce97922e6 |
|
21-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Eliminate some GCC warnings from the generated code git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24897 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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5fb5e10cdce4680c84ab35c2176d2c685129de24 |
|
20-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Fix the semantic of Requires<[cond]> to mean if (!cond) goto PXXFail; git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24883 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
2f0f9a69733fc587ff77ed4866db6bc32964a70a |
|
20-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
This ugly patch works around a GCC bug where it is compiling SelectCode to use too much stack space, overflowing the stack for large functions. Instead of emitting new SDOperands in each match block, we emit some common ones at the top of SelectCode then reuse them when possible. This reduces the stack size of SelectCode from 28K to 21K. Note that GCC compiles it to 512 bytes :-/ I've filed GCC PR 25505 to track this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24882 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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4fba28116cefb160cbe11e54777bb8cde89f5d73 |
|
20-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Now support instructions with implicit write to non-flag registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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e08705134f133bd9c9f0c3976174b692a912f69e |
|
20-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Lefted out a fix in the previous check in. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24873 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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f9fc25db32de9fe16134f0d631acc3c84487259c |
|
19-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Fix another bug related to chain / flag. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24868 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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1b80f4d2c6e02e0784a7fee89df6d840ec4e690e |
|
19-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Fixes for a number of bugs: save flag results in CodeGenMap, folded chains may not all have ResNo == 0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24858 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
5216c698de4cd1d06827bd3703eda0a2cb15c395 |
|
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Handle basic block nodes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24833 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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dc464de9b0c9c873d32c882cef49e469b7814988 |
|
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
More fixes for Selection of copyto/fromreg with a flag git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24829 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
755dd09815a5f33b68bf3c88b0c7bc6a9672238e |
|
18-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Select copytoreg and copyfromreg nodes that have flag operands correctly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24827 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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bcecf33dc23c513d0919af22f5f856da36039feb |
|
17-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Support for read / write from explicit registers with FlagVT type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24753 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
58e84a69f5d24ca7804bbbd5ee9c29df8584acb6 |
|
14-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Added support to specify predicates. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24715 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
01f318bfcacb979724abb2fac908f29a1ab71074 |
|
14-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Skip over srcvalue nodes when generating ISEL code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24704 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
0e65b27e2801de1484cfce1c4a6db370494cfb31 |
|
13-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Bug fix: CodeGenMap[N] = ... -> CodeGenMap[N.getValue(0)] = ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24680 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
481c8e05014561d365003cbd1cdb1109d4b5ee1d |
|
13-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
At top of generated isel SelectCode() is this: if (!N.Val->hasOneUse()) { std::map<SDOperand, SDOperand>::iterator CGMI = CodeGenMap.find(N); if (CGMI != CodeGenMap.end()) return CGMI->second; } Suppose a DAG like this: X ^ ^ / \ USE1 USE2 Suppose USE1 is being selected first and during which X is selected and returned a new node. After this, USE1 is no longer an use of X. During USE2 selection, X will be selected again since it has only one use! The fix is to always query CodeGenMap. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24679 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
8621789fccec5a89eab3c94c0a7e3e048964dfe0 |
|
12-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Bug fix: finding the correct incoming chain for pattern with nested src operand. And a minor change to make output code slightly more readible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24669 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
28a6b02626c29b1fe9bb16c14c193549fab4cab8 |
|
10-Dec-2005 |
Nate Begeman <natebegeman@mac.com> |
Add support for TargetConstantPool nodes to the dag isel emitter, and use them in the PPC backend, to simplify some logic out of Select and SelectAddr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24657 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
ba7fa0b5d484f5ba926eca8432ae1d667693d657 |
|
10-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Stop emitting a redudant type check for complex pattern node. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24655 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
1129e87ff45324af19241e2106299f0a724c9f1a |
|
10-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
For instructions which produce no result, e.g. store, chain's Resno == 0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24652 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
5b21be76e1542276983d376c59ce542bcb6c921a |
|
09-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Add a new SDTCisPtrTy constraint, which indicates that an operand must have the same type as the pointer type for a target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24649 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
b915f3110d74823e7b56d2c9cc4b83439bbedebc |
|
09-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
* Do not allow nodes which produce chain results (e.g. loads) to be folded if it has more than one real use (non-chain uses). * Record folded chain producing node in CodeGenMap. * Do not fold a chain producing node if it has already been selected as an operand of a chain use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24647 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
cbc09c8eaa1813eb4ad424c9215809322c6b5dd7 |
|
09-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Prevent folding of instructions which produce chains that have more than 1 real use git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24643 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
c45146ace5368066e70ada7a35cc4ab851c955e7 |
|
09-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
* Make sure complex pattern operands are selected first since their select functions can return false and causing the instruction pattern match to fail. * Code clean up. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24642 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
3aa39f439a0971a2502b2c728a8006becaf96601 |
|
08-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
* Added an explicit type field to ComplexPattern. * Renamed MatchingNodes to RootNodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24636 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
0fc71988900e600f3ef5b13d9682e2bbab92811d |
|
08-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Added support for ComplexPattern. These are patterns that require C++ pattern matching code that is not currently auto-generated by tblgen, e.g. X86 addressing mode. Selection routines for complex patterns can return multiple operands, e.g. X86 addressing mode returns 4. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24634 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
dd304dd4bd1b0b25309cdd1b63f1c390748950a3 |
|
06-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
* Infer instruction property hasCtrlDep from pattern if it has one. * Fixed a bug related to hasCtrlDep property use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24610 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
22faeabb3abb83e283d898b35b0b3c96e0fb2835 |
|
05-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Implement PR673: for explicit register references, use type information if available git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24597 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
7292c5ee32b453b736e7908525f3219eea18e8bb |
|
05-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Generate code to silence bogus GCC warnings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24593 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
1c3d19eb15b7109f75727bac84c65fcfecb65e51 |
|
04-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
* Commit the fix (by Chris) for a tblgen type inferencing bug. * Enhanced tblgen to handle instructions which have chain operand and writes a chain result. * Enhanced tblgen to handle instructions which produces no results. Part of the change is a temporary hack which relies on instruction property (e.g. isReturn, isBranch). The proper fix would be to change the .td syntax to separate results dag from ops dag. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24587 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
6510b22cec7de4f0acc9965ec24c3668a6a8a87e |
|
01-Dec-2005 |
Nate Begeman <natebegeman@mac.com> |
Support multiple ValueTypes per RegisterClass, needed for upcoming vector work. This change has no effect on generated code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24563 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
66a48bbc3565b40ea0e6f2d58cf5e3a8e64802ef |
|
01-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Teach tblgen to accept register source operands in patterns, e.g. def SHL8rCL : I<0xD2, MRM4r, (ops R8 :$dst, R8 :$src), "shl{b} {%cl, $dst|$dst, %CL}", [(set R8:$dst, (shl R8:$src, CL))]>, Imp<[CL],[]>; This generates a CopyToReg operand and added its 2nd result to the shl as a flag operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24557 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
ddb395463c08b39090bbee4ed22433f5990a6331 |
|
01-Dec-2005 |
Nate Begeman <natebegeman@mac.com> |
Stop checking the ValueType of the CodeGenInstruction. Instead, use the ValueType from the RegisterClass or Operands. This step is necessary to allow RegisterClasses to have multiple ValueTypes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24555 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
5d28ffdfec99c7f69e62893eb4156ead03cefa54 |
|
01-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Make the code generated by tblgen return the result of SelectNodeTo, to permit future changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24553 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
76021f010b87fdb96ebd9b98b061fdef00a6f32b |
|
29-Nov-2005 |
Evan Cheng <evan.cheng@apple.com> |
Better error message when unrecognized opcode is seen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24519 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
09c033962bf26b2b35f18a2ead2d86748a030cef |
|
17-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Validate that the input to 'Pat' patterns is sane. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24393 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
b120a64e137b8e29d281793a4f119ba8ace03bf6 |
|
17-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
teach tblgen to be smart enough to handle tglobaladdr nodes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24391 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
12cf9090a495e5427ab8bbfa568e4db88951f65b |
|
17-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
fix a tblgen bug that Evan ran into, where we would lose the '$src' name on patterns like "(set R32:$dst, (i32 imm:$src))" git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24383 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
465c737467dd70221a48fc7b9631f39283574d4e |
|
03-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Reject integer literals that are out of range for their type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24162 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
0614b628cf8245541f0f6842b2f024c5ba9a7967 |
|
02-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for immediates directly in the pattern, this allows itanium to define: def : Pat<(i1 1), (CMPEQ r0, r0)>; git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24149 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
9d1a02345c2fa4ff8e79ee02da38e897a6f5d1fd |
|
29-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Make negative immediates in patterns work correctly, silence some warnings building the itanium backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24095 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
b0e103d46bf8799ac5523157a6ed4a78d1751a89 |
|
29-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Rename Record::getValueAsListDef to getValueAsListOfDefs, to more accurately reflect what it is. Convert some more code over to use it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24072 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
6bc0d742c284d65514b63f3fa4a2bb3ab1fe040e |
|
29-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Use the new interface Jim added git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24071 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
a7ad198f896d29aac57f48220ecefb8a51163393 |
|
26-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Condcodes are in the ISD namespace git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24010 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
1531f2025c9054c02cfb84bd2485b04cc72591c6 |
|
26-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for CondCode's git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24008 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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f071bb5b874fcf369ba3586f9bdf4114b34caf6b |
|
25-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Emit some boilerplate for targets git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23983 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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edbd8711de98855af990868d34b77038957432a7 |
|
21-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Make tblgen emit: tblgen: In ZAPNOTi: Cannot use 'IZAPX' in an input pattern! for a bad pattern, instead of an ugly assertion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23854 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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2f041d49a9750b714a8ceebe28038c78c6c40a4e |
|
19-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
add support for literal immediates in patterns to match, allowing us to write things like this: def : Pat<(add GPRC:$in, 12), (ADD12 GPRC:$in)>; Andrew: if this isn't enough or doesn't work for you, please lemme know. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23819 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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5d5a056092b9ce52009b835f47f4304be810368f |
|
19-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Add basic support for integer constants in pattern results. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23817 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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4c59309f591064f2207df5a98f41ed2d504b52da |
|
19-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for patterns that have physical registers in them. Testcase: def : Pat<(trunc G8RC:$in), (OR8To4 G8RC:$in, X0)>; Even though this doesn't make any sense on PPC :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23815 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
ab1bf27be5a3045ef8174eebd74f7630a7c58d3b |
|
19-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Asserting here is to violent git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23814 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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0c0cfa741f3897cfb8ea5268a5425de0d57fb50a |
|
19-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Nate wants to define 'Pat's which turn into instructions that don't have patterns. Certainly a logical request. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23810 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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b277cbc0873bfeeaf8b4a14998da69413ad0678c |
|
18-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Duraid pointed out that it is impolite to emit PPC:: into the IA64 backend git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23780 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
5024d93c8b3bde57e906c0325573ed8d3b7061fd |
|
16-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Make the generated code significantly more memory efficient, by using SelectNodeTo instead of getTargetNode when possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23758 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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7e82f1322c2ddadf5e92b6439f97276d17cba166 |
|
15-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Implement the last major missing piece in the DAG isel generator: when emitting a pattern match, make sure to emit the (minimal number of) type checks that verify the pattern matches this specific instruction. This allows FMA32 patterns to not match double expressions for example. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23748 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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603d78c9de31b15deee3f01c59083cf759f00897 |
|
14-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Now that we have int/fp lattice values, implement the SDTCisOpSmallerThanOp type constraint. This lets tblgen realize that it doesn't need any dynamic type checks for fextend/fround on PPC (and many other targets), because there are only two fp types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23730 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
3c7e18d690c3da13fc2c6b5d72e926d2b19f8800 |
|
14-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Fairly serious rework of the typing code to add new int/fp lattice values. Overall, no functionality change yet though. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23729 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
e0583b1b925ed7bfe92807919168ff10c5542d8c |
|
14-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
simplify the code a bit git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23728 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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03ebd802c7916e126c718ff49b4ebbe449a28c0a |
|
14-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Add basic support for recognizing a new SDTCisOpSmallerThanOp type constraint git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23725 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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0ee7cff4fb9fceb88778f2f44876ce9716479d7f |
|
14-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Implement a couple of new (important) features. 1. If an operation has to be int or fp and the target only supports one int or fp type, relize that the op has to have that type. 2. If a target has operations on multiple types, do not emit matching code for patterns involving those operators, since we do not emit the code to check for them yet. This prevents PPC from generating FP ops currently. Also move some code around into more logical places. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23724 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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af302914d1f77e95910abbc5e6f61de6e69ea1ef |
|
30-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Teach tablegen to reassociate operators when possible. This allows it to find all of teh pattern matches for EQV from one definition git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23529 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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e46e17b7fb73abce6cdf77c2ced7e1ef877415b4 |
|
29-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Teach tblgen to build permutations of instructions, so that the target author doesn't have to specify them manually. It currently handles associativity, e.g. knowing that (X*Y)+Z also matches X+(Y*Z) and will be extended in the future. It is smart enough to not introduce duplicate patterns or patterns that can never match. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23526 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
7cf2fe6c48aa14cd2d323d3cc81a2b51bb548863 |
|
28-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
add support for an associative marker git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23502 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
e97603f1bd569c8f51e2e132a25d050ab71012db |
|
28-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Emit an error if instructions or patterns are defined but can never match. Currently we check that immediate values live on the RHS of commutative operators. Defining ORI like this, for example: def ORI : DForm_4<24, (ops GPRC:$dst, GPRC:$src1, u16imm:$src2), "ori $dst, $src1, $src2", [(set GPRC:$dst, (or immZExt16:$src2, GPRC:$src1))]>; results in: tblgen: In ORI: Instruction can never match: Immediate values must be on the RHS of commutative operators! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23501 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
a1a68ae0617610c816e590879ce121af058ba60c |
|
28-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
collect commutativity information git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23499 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
05814af29f67facfaf56168551ac9421bee04a1c |
|
28-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Prefer cheaper patterns to more expensive ones. Print the costs to the generated file git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23492 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
f6f941636355652c60349fdb33bf5c5aa01226fa |
|
28-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Select Constant nodes to TargetConstant nodes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23488 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
fab372880199de4a71b8e3ce8a6b8a53c85baa60 |
|
27-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
memoize the assert results git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23457 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
3748147aaf73cba847ffad30a55de7e7df214b13 |
|
26-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Emit the switch stmt cases in alphabetical order instead of pointer order, which is not stable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23456 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
6bc7e513d567002d0df10ca5cde8054d906f5d5c |
|
26-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
implement a fixme: only select values once, even if used multiple times. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23454 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
a48283baa314c076f270e4d3da9d283599255402 |
|
25-Sep-2005 |
Jeff Cohen <jeffc@jolt-lang.org> |
Fix VC++ build errors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23431 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
296dfe3b8a42568bab661d5c06ecc4c645385fc9 |
|
24-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
memoize translations git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23419 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
72fe91c4dddf0e40317bfd8ceeaf7af8622cc1ae |
|
24-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Teach the DAG isel generator to emit code that creates nodes. Fix a few corner cases parsing things like (i32 imm:$foo) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23417 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
8fc3568d98834c73528e57f365c658ea7084361e |
|
24-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Emit better code (no more copies for var references), and support DAG patterns (e.g. things like rotates). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23416 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
547394ca38d75d9784498afa6963efc0f9818f7d |
|
23-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a fixme by passing around SDOperand's instead of SDNode*'s git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23415 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
d1ff35a49d1a8bfbcbaaec259ea368848d599a03 |
|
23-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Emit code that matches the incoming DAG pattern and checks predicates. This does not check that types match yet, but PPC only has one integer type ;-). This also doesn't have the code to build the resultant dag. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23414 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
3f7e91477e8cd7b8cae8b3b3d2c5e01d4848cf2b |
|
23-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
emit information about the order patterns are to be matched. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23413 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
813033248c0128ac6d378eb8131885b7a651930e |
|
23-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
start filling in the switch stmt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23412 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
b9f01eb7bce0e049fb01e2feb3c9252458cc5b35 |
|
16-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a minor bug, add comments git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23370 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
a28aec1da7c0dccb80d9ccb484b968850dd4c7dc |
|
16-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
teach the type inference code how to infer types for instructions and node xforms. Run type inference on result patterns, so we always have fully typed results (and to catch errors in .td files). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23369 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
ae5b350b3b7d57f4b99cb2499ee893b297f7db2e |
|
15-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
put instructions into a map instead of a vector for quick lookup git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23368 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
ae6d828de82242512183f868f3f672d07571c04d |
|
15-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
when parsing instructions remember information about the types taken and returned. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23367 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
abbb605d806d177ac99292fe217fc80b84f06652 |
|
15-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Start parsing "Pattern" nodes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23365 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
b39e4be1e18e0df15a4d46d474cd523a9a4cb948 |
|
15-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
rename a couple of methods, add structure for pattern parsing git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23364 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
f1311843d542a863a1ae8a813c336b0de23492bb |
|
15-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Verify that xform functions only occur in logical places git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23363 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
2175c18c4f73823ad17b7514bd7f0d66b1e25f53 |
|
15-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Promote xform fns to be explicit nodes in result patterns, and clean off predicates since they will have already matched at this point. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23362 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
b0276200e688eec35e4fddafde4e110c28539301 |
|
15-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
start building the instruction dest pattern correctly. Change the xform functions to preserve the Record for the xform instead of making it into a function name. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23361 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
7da852fbabe913837820c8c3361e7229322e6975 |
|
15-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
catch unnamed inputs git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23360 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
0b59225fe1ab91a20b81430b34bc4157a7471591 |
|
14-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
check that there are no unexpected operands git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23359 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
c4a8b73ab3aa97d03a919a642469b81e334b6903 |
|
14-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
force all instruction operands to be named. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23358 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
3a7319d5edeef9b675ac1582cab1b2c9ed0f2b19 |
|
14-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
fix a broke range check git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23354 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
d8a3bde6fdae7b98a2ad3d92e094238d72b5c284 |
|
14-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Parse significantly more of the instruction pattern, now collecting and verifying information about the operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23353 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
39e8af9913f957119b1f61d45fa8d1c85832e7ee |
|
14-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Verify that set destinations occur first in the instruction operand list. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23351 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
71cdb7fc7a9c9bba4dbdf767c471317f9ea00fc1 |
|
14-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
remove some code that isn't ready for prime time git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23346 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
ec67643e8682402cfd1535ff88f5ce7af0812be0 |
|
14-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Switch to a slightly more structured representation for instructions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23345 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
5f8cb2a28a75acb85d8e96c6f5af157506ae08d6 |
|
14-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Add some more checking/verification code git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23344 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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1f39e2910b896dddaa649e72e2bdab1fa91be6c1 |
|
14-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
start parsing instructions into patterns, start doing many more checks of 'set's. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23343 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
f4f33ba518008a3907bba5d875435cde7f6be23d |
|
14-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
don't emit the namespace inside the class! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23341 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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1048b7a67e6f3e524db29cfe82da68093f6d683f |
|
14-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Emit code suitable for emission into the ISel class, allowing us to use/define methods. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23340 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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6de8b53230a44b3e09801e8bf100a110d03a2b64 |
|
13-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
continue xform function parsing git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23338 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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24eeeb8c3e80e22cb2fd311580ae22b5e3ae7b51 |
|
13-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Start parsing node transformation information git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23337 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
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ee9f0c3c2ea8d32218680488fe030bd19547e8b4 |
|
13-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
completely eliminate TreePattern::PatternType git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23335 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
3793709e89bba99c1c3d0aaaaa46a389cbf365af |
|
09-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
add an accessor to provide more checking git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23289 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
f2a17a70f4be4677450ec03abf6840dd97bcd672 |
|
09-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
use new accessors to simplify code. Add checking to make sure top-level instr definitions are void git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23288 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
95f6b768174543fd2cc9175aaf3a889e241147c6 |
|
09-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Fix incorrect comment git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23285 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
327076005d608361c9f3b036e9401f14c235a8e3 |
|
09-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Implement a complete type inference system for dag patterns, based on the constraints defined in the DAG node definitions in the .td files. This allows us to infer (and check!) the types for all nodes in the current ppc .td file. For example, instead of: Inst pattern EQV: (set GPRC:i32:$rT, (xor (xor GPRC:i32:$rA, GPRC:i32:$rB), (imm)<<Predicate_immAllOnes>>)) we now fully infer: Inst pattern EQV: (set:void GPRC:i32:$rT, (xor:i32 (xor:i32 GPRC:i32:$rA, GPRC:i32:$rB), (imm:i32)<<Predicate_immAllOnes>>)) from: (set GPRC:$rT, (not (xor GPRC:$rA, GPRC:$rB))) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23284 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
33c92e92961c9a1aaaac767edeeac62dd787111e |
|
08-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Parse information about type constraints on SDNodes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23281 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
6af14a629deba4a6577af11b567138e891c4f81c |
|
08-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
use node info in the one place we currently use it git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23280 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
ca559d0654d55355852b72eea812b6bb39df15a5 |
|
08-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
start parsing SDNode info records git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23279 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
fbf8e57639cacba2a4be13400f5768cd3a10fd17 |
|
08-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Keep names even when inlining. This allows us to realize that ADDI is: (set GPRC:i32:$rD, (add GPRC:i32:$rA, (imm)<<Predicate_immSExt16>>:$imm)) not: (set GPRC:i32:$rD, (add GPRC:i32:$rA, (imm)<<Predicate_immSExt16>>)) (we keep the ":$imm") git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23269 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|
54cb8fd814858d3def47ecfcbb91881ca0819a04 |
|
08-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Initial cut of the dag isel generator. This is still very much a work in progress. It correctly parses instructions and pattern fragments and glues together pattern fragments into instructions. The only code it generates currently is some boilerplate code for things like the EntryNode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23261 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/DAGISelEmitter.cpp
|