/external/webkit/Source/JavaScriptCore/tests/mozilla/ecma/Expressions/ |
H A D | 11.4.8.js | 136 function Mask( b, n ) { function
|
H A D | 11.7.1.js | 38 7. Mask out all but the least significant 5 bits of Result(6), that is, 143 function Mask( b, n ) { function 214 add = Mask( add, 5 );
|
H A D | 11.7.2.js | 38 7. Mask out all but the least significant 5 bits of Result(6), that is, 157 function Mask( b, n ) { function 226 a = Mask( a, 5 );
|
H A D | 11.7.3.js | 39 7. Mask out all but the least significant 5 bits of Result(6), that is, 148 function Mask( b, n ) { function 228 a = Mask( a, 5 );
|
H A D | 11.10-1.js | 145 function Mask( b, n ) { function
|
H A D | 11.10-2.js | 144 function Mask( b, n ) { function
|
H A D | 11.10-3.js | 144 function Mask( b, n ) { function
|
/external/clang/include/clang/AST/ |
H A D | DeclAccessPair.h | 33 enum { Mask = 0x3 }; enumerator in enum:clang::DeclAccessPair::__anon3400 43 return (NamedDecl*) (~Mask & (uintptr_t) Ptr); 46 return AccessSpecifier(Mask & (uintptr_t) Ptr);
|
/external/llvm/lib/Target/X86/ |
H A D | X86FloatingPoint.cpp | 90 unsigned Mask; member in struct:__anon9830::FPS::LiveBundle 100 LiveBundle() : Mask(0), FixCount(0) {} 103 bool isFixed() const { return !Mask || FixCount; } 115 unsigned Mask = 0; local 120 Mask |= 1 << Reg; 122 return Mask; 295 /// Adjust the live registers to be the set in Mask. 296 void adjustLiveRegs(unsigned Mask, MachineBasicBlock::iterator I); 396 const unsigned Mask = calcLiveInMask(MBB); 397 if (!Mask) [all...] |
/external/llvm/lib/Analysis/ |
H A D | CostModel.cpp | 84 static bool isReverseVectorMask(SmallVector<int, 16> &Mask) { argument 85 for (unsigned i = 0, MaskSize = Mask.size(); i < MaskSize; ++i) 86 if (Mask[i] > 0 && Mask[i] != (int)(MaskSize - 1 - i)) 186 SmallVector<int, 16> Mask = Shuffle->getShuffleMask(); local 188 if (NumVecElems == Mask.size() && isReverseVectorMask(Mask))
|
/external/llvm/lib/Target/ARM/ |
H A D | Thumb2InstrInfo.cpp | 80 unsigned Mask = MBBI->getOperand(1).getImm(); local 86 MBBI->getOperand(1).setImm((Mask & MaskOff) | MaskOn); 529 unsigned Mask = (1 << NumBits) - 1; 530 if ((unsigned)Offset <= Mask * Scale) { 546 ImmedOffset = ImmedOffset & Mask; 559 Offset &= ~(Mask*Scale);
|
H A D | Thumb1RegisterInfo.cpp | 384 unsigned Mask = (1 << NumBits) - 1; 385 if (((Offset / Scale) & ~Mask) == 0) { 418 AddDefaultPred(AddDefaultT1CC(MIB).addReg(FrameReg).addImm(Mask)); 421 MI.getOperand(FrameRegIdx+1).ChangeToImmediate(Mask); 423 Offset = (Offset - Mask * Scale); 453 unsigned Mask = (1 << NumBits) - 1; variable 455 if ((unsigned)Offset <= Mask * Scale) { 470 Mask = (1 << NumBits) - 1; 478 ImmedOffset = ImmedOffset & Mask; 480 Offset &= ~(Mask * Scal [all...] |
H A D | Thumb2ITBlockPass.cpp | 194 unsigned Mask = 0, Pos = 3; local 208 Mask |= (NCC & 1) << Pos; 229 Mask |= (1 << Pos); 231 Mask |= (CC & 1) << 4; 232 MIB.addImm(Mask);
|
/external/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsAsmBackend.cpp | 138 uint64_t Mask = ((uint64_t)(-1) >> local 140 CurVal |= Value & Mask;
|
/external/llvm/lib/Target/R600/ |
H A D | R600ExpandSpecialInstrs.cpp | 246 bool Mask = false; local 252 // Mask the write if the original instruction does not write to 254 Mask = (Chan != TRI.getHWRegChan(DstReg)); 286 if (Mask) {
|
/external/clang/lib/Driver/ |
H A D | SanitizerArgs.h | 162 /// provides a sanitizer kind in \p Mask. For example, the argument list 179 /// a value in \p Mask. For instance, the argument 183 unsigned Mask) { 188 if (parse(A->getValue(I)) & Mask) 182 describeSanitizeArg(const ArgList &Args, const Arg *A, unsigned Mask) argument
|
/external/libnfc-nxp/src/ |
H A D | phFriNfc_NdefRecord.c | 381 static uint8_t phFriNfc_NdefRecord_NdefFlag(uint8_t Flags,uint8_t Mask) argument 384 check_flag = Flags & Mask;
|
/external/llvm/include/llvm/ADT/ |
H A D | BitVector.h | 174 // Mask off previous bits. 250 BitWord Mask = EMask - IMask; local 251 Bits[I / BITWORD_SIZE] |= Mask; 288 BitWord Mask = EMask - IMask; local 289 Bits[I / BITWORD_SIZE] &= ~Mask; 326 BitWord Mask = 1L << (Idx % BITWORD_SIZE); 327 return (Bits[Idx / BITWORD_SIZE] & Mask) != 0; 488 /// setBitsInMask - Add '1' bits from Mask to this vector. Don't resize. 489 /// This computes "*this |= Mask". 490 void setBitsInMask(const uint32_t *Mask, unsigne [all...] |
H A D | SmallBitVector.h | 232 // Mask off previous bits. 311 uintptr_t Mask = EMask - IMask; local 312 setSmallBits(getSmallBits() | Mask); 342 uintptr_t Mask = EMask - IMask; local 343 setSmallBits(getSmallBits() & ~Mask); 489 /// setBitsInMask - Add '1' bits from Mask to this vector. Don't resize. 490 /// This computes "*this |= Mask". 491 void setBitsInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) { argument 493 applyMask<true, false>(Mask, MaskWords); 495 getPointer()->setBitsInMask(Mask, MaskWord 500 clearBitsInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) argument 509 setBitsNotInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) argument 518 clearBitsNotInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) argument 527 applyMask(const uint32_t *Mask, unsigned MaskWords) argument [all...] |
/external/llvm/include/llvm/CodeGen/ |
H A D | MachineInstr.h | 165 unsigned Mask = BundledPred | BundledSucc; local 166 Flags = (Flags & Mask) | (flags & ~Mask); 1039 bool hasPropertyInBundle(unsigned Mask, QueryType Type) const;
|
/external/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombine.h | 305 bool MaskedValueIsZero(Value *V, const APInt &Mask, argument 307 return llvm::MaskedValueIsZero(V, Mask, TD, Depth); 367 Value *FoldLogicalPlusAnd(Value *LHS, Value *RHS, ConstantInt *Mask,
|
H A D | InstCombineVectorOps.cpp | 219 SmallVectorImpl<Constant*> &Mask) { 225 Mask.assign(NumElts, UndefValue::get(Type::getInt32Ty(V->getContext()))); 231 Mask.push_back(ConstantInt::get(Type::getInt32Ty(V->getContext()), i)); 237 Mask.push_back(ConstantInt::get(Type::getInt32Ty(V->getContext()), 255 if (CollectSingleShuffleElements(VecOp, LHS, RHS, Mask)) { 257 Mask[InsertedIdx] = UndefValue::get(Type::getInt32Ty(V->getContext())); 270 if (CollectSingleShuffleElements(VecOp, LHS, RHS, Mask)) { 273 Mask[InsertedIdx % NumElts] = 278 Mask[InsertedIdx % NumElts] = 296 static Value *CollectShuffleElements(Value *V, SmallVectorImpl<Constant*> &Mask, argument 218 CollectSingleShuffleElements(Value *V, Value *LHS, Value *RHS, SmallVectorImpl<Constant*> &Mask) argument 396 SmallVector<Constant*, 16> Mask; local 422 SmallVector<int, 16> Mask = SVI.getShuffleMask(); local [all...] |
/external/llvm/utils/PerfectShuffle/ |
H A D | PerfectShuffle.cpp | 28 // Mask manipulation functions. 35 static unsigned getMaskElt(unsigned Mask, unsigned Elt) { argument 36 return (Mask >> ((3-Elt)*4)) & 0xF; 39 static unsigned setMaskElt(unsigned Mask, unsigned Elt, unsigned NewVal) { argument 41 return (Mask & ~(0xF << FieldShift)) | (NewVal << FieldShift); 45 static bool isValidMask(unsigned short Mask) { argument 46 unsigned short UndefBits = Mask & 0x8888; 47 return (Mask & ((UndefBits >> 1)|(UndefBits>>2)|(UndefBits>>3))) == 0; 52 static bool hasUndefElements(unsigned short Mask) { argument 53 return (Mask 58 isOnlyLHSMask(unsigned short Mask) argument 73 getCompressedMask(unsigned short Mask) argument [all...] |
/external/llvm/lib/Target/AArch64/Utils/ |
H A D | AArch64BaseInfo.cpp | 768 uint64_t Mask = (1ULL << Num1s) - 1; local 770 Mask = (Mask >> Rotation) 771 | ((Mask << (Width - Rotation)) & WidthMask); 775 Imm |= Mask; 776 Mask <<= Width;
|
/external/llvm/include/llvm/Analysis/ |
H A D | ScalarEvolution.h | 192 static SCEV::NoWrapFlags maskFlags(SCEV::NoWrapFlags Flags, int Mask) { argument 193 return (SCEV::NoWrapFlags)(Flags & Mask);
|