/external/llvm/lib/Analysis/ |
H A D | DependenceAnalysis.cpp | 190 return Src->mayReadFromMemory() && Dst->mayReadFromMemory(); 196 return Src->mayWriteToMemory() && Dst->mayWriteToMemory(); 202 return Src->mayWriteToMemory() && Dst->mayReadFromMemory(); 208 return Src->mayReadFromMemory() && Dst->mayWriteToMemory(); 660 // Examines the loop nesting of the Src and Dst 677 // ... - loops containing Src but not Dst 678 // SrcLevels - innermost loop containing Src but not Dst 679 // ... - loops containing Dst but not Src 680 // MaxLevels - innermost loops containing Dst but not Src 699 // to A (the Src) and the load from A (the Dst), w 710 establishNestingLevels(const Instruction *Src, const Instruction *Dst) argument 787 const SCEV *Dst = Pair->Dst; local 820 checkDstSubscript(const SCEV *Dst, const Loop *LoopNest, SmallBitVector &Loops) argument 839 classifyPair(const SCEV *Src, const Loop *SrcLoopNest, const SCEV *Dst, const Loop *DstLoopNest, SmallBitVector &Loops) argument 955 testZIV(const SCEV *Src, const SCEV *Dst, FullDependence &Result) const argument 2034 testSIV(const SCEV *Src, const SCEV *Dst, unsigned &Level, FullDependence &Result, Constraint &NewConstraint, const SCEV *&SplitIter) const argument 2105 testRDIV(const SCEV *Src, const SCEV *Dst, FullDependence &Result) const argument 2172 testMIV(const SCEV *Src, const SCEV *Dst, const SmallBitVector &Loops, FullDependence &Result) const argument 2214 gcdMIVtest(const SCEV *Src, const SCEV *Dst, FullDependence &Result) const argument 2428 banerjeeMIVtest(const SCEV *Src, const SCEV *Dst, const SmallBitVector &Loops, FullDependence &Result) const argument 2972 propagate(const SCEV *&Src, const SCEV *&Dst, SmallBitVector &Loops, SmallVector<Constraint, 4> &Constraints, bool &Consistent) argument 2997 propagateDistance(const SCEV *&Src, const SCEV *&Dst, Constraint &CurConstraint, bool &Consistent) argument 3024 propagateLine(const SCEV *&Src, const SCEV *&Dst, Constraint &CurConstraint, bool &Consistent) argument 3099 propagatePoint(const SCEV *&Src, const SCEV *&Dst, Constraint &CurConstraint) argument 3197 depends(Instruction *Src, Instruction *Dst, bool PossiblyLoopIndependent) argument 3649 Instruction *Dst = Dep->getDst(); local [all...] |
H A D | BranchProbabilityInfo.cpp | 455 isEdgeHot(const BasicBlock *Src, const BasicBlock *Dst) const { 458 return getEdgeProbability(Src, Dst) > BranchProbability(4, 5); 502 /// of all raw edge weights from Src to Dst. 504 getEdgeWeight(const BasicBlock *Src, const BasicBlock *Dst) const { 508 if (*I == Dst) { 536 /// Get the probability of going from Src to Dst. It returns the sum of all 537 /// probabilities for edges from Src to Dst. 539 getEdgeProbability(const BasicBlock *Src, const BasicBlock *Dst) const { 541 uint32_t N = getEdgeWeight(Src, Dst); 550 const BasicBlock *Dst) cons [all...] |
/external/llvm/lib/Target/X86/ |
H A D | X86SelectionDAGInfo.cpp | 32 SDValue Dst, SDValue Src, 60 Entry.Node = Dst; 139 Dst, InFlag); 162 EVT AddrVT = Dst.getValueType(); 166 DAG.getNode(ISD::ADD, dl, AddrVT, Dst, 179 SDValue Chain, SDValue Dst, SDValue Src, 237 Dst, InFlag); 254 EVT DstVT = Dst.getValueType(); 258 DAG.getNode(ISD::ADD, dl, DstVT, Dst, 30 EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVolatile, MachinePointerInfo DstPtrInfo) const argument 178 EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument
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/external/clang/lib/StaticAnalyzer/Core/ |
H A D | ExprEngineC.cpp | 24 ExplodedNodeSet &Dst) { 175 getCheckerManager().runCheckersForPostStmt(Dst, Tmp2, B, *this); 179 ExplodedNodeSet &Dst) { 214 getCheckerManager().runCheckersForPostStmt(Dst, Tmp, BE, *this); 218 ExplodedNode *Pred, ExplodedNodeSet &Dst) { 229 evalLoad(Dst, CastE, CastE, subExprNode, state, state->getSVal(Ex, LCtx)); 241 StmtNodeBuilder Bldr(dstPreStmt, Dst, *currBldrCtx); 401 ExplodedNodeSet &Dst) { 402 StmtNodeBuilder B(Pred, Dst, *currBldrCtx); 432 ExplodedNodeSet &Dst) { 22 VisitBinaryOperator(const BinaryOperator* B, ExplodedNode *Pred, ExplodedNodeSet &Dst) argument 178 VisitBlockExpr(const BlockExpr *BE, ExplodedNode *Pred, ExplodedNodeSet &Dst) argument 217 VisitCast(const CastExpr *CastE, const Expr *Ex, ExplodedNode *Pred, ExplodedNodeSet &Dst) argument 399 VisitCompoundLiteralExpr(const CompoundLiteralExpr *CL, ExplodedNode *Pred, ExplodedNodeSet &Dst) argument 431 VisitDeclStmt(const DeclStmt *DS, ExplodedNode *Pred, ExplodedNodeSet &Dst) argument 515 VisitLogicalExpr(const BinaryOperator* B, ExplodedNode *Pred, ExplodedNodeSet &Dst) argument 584 VisitInitListExpr(const InitListExpr *IE, ExplodedNode *Pred, ExplodedNodeSet &Dst) argument 632 VisitGuardedExpr(const Expr *Ex, const Expr *L, const Expr *R, ExplodedNode *Pred, ExplodedNodeSet &Dst) argument 678 VisitOffsetOfExpr(const OffsetOfExpr *OOE, ExplodedNode *Pred, ExplodedNodeSet &Dst) argument 696 VisitUnaryExprOrTypeTraitExpr(const UnaryExprOrTypeTraitExpr *Ex, ExplodedNode *Pred, ExplodedNodeSet &Dst) argument 729 VisitUnaryOperator(const UnaryOperator* U, ExplodedNode *Pred, ExplodedNodeSet &Dst) argument 851 VisitIncrementDecrementOperator(const UnaryOperator* U, ExplodedNode *Pred, ExplodedNodeSet &Dst) argument [all...] |
H A D | CheckerManager.cpp | 95 ExplodedNodeSet &Dst, 104 Dst.insert(Src); 114 CurrSet = &Dst; 167 ExplodedNodeSet &Dst, 174 expandGraphWithCheckers(C, Dst, Src); 206 ExplodedNodeSet &Dst, 215 expandGraphWithCheckers(C, Dst, Src); 249 ExplodedNodeSet &Dst, 258 expandGraphWithCheckers(C, Dst, Src); 297 void CheckerManager::runCheckersForLocation(ExplodedNodeSet &Dst, argument 94 expandGraphWithCheckers(CHECK_CTX checkCtx, ExplodedNodeSet &Dst, const ExplodedNodeSet &Src) argument 166 runCheckersForStmt(bool isPreVisit, ExplodedNodeSet &Dst, const ExplodedNodeSet &Src, const Stmt *S, ExprEngine &Eng, bool WasInlined) argument 205 runCheckersForObjCMessage(bool isPreVisit, ExplodedNodeSet &Dst, const ExplodedNodeSet &Src, const ObjCMethodCall &msg, ExprEngine &Eng, bool WasInlined) argument 248 runCheckersForCallEvent(bool isPreVisit, ExplodedNodeSet &Dst, const ExplodedNodeSet &Src, const CallEvent &Call, ExprEngine &Eng, bool WasInlined) argument 337 runCheckersForBind(ExplodedNodeSet &Dst, const ExplodedNodeSet &Src, SVal location, SVal val, const Stmt *S, ExprEngine &Eng, const ProgramPoint &PP) argument 356 runCheckersForEndFunction(NodeBuilderContext &BC, ExplodedNodeSet &Dst, ExplodedNode *Pred, ExprEngine &Eng) argument 401 runCheckersForBranchCondition(const Stmt *Condition, ExplodedNodeSet &Dst, ExplodedNode *Pred, ExprEngine &Eng) argument 450 runCheckersForDeadSymbols(ExplodedNodeSet &Dst, const ExplodedNodeSet &Src, SymbolReaper &SymReaper, const Stmt *S, ExprEngine &Eng, ProgramPoint::Kind K) argument 524 runCheckersForEvalCall(ExplodedNodeSet &Dst, const ExplodedNodeSet &Src, const CallEvent &Call, ExprEngine &Eng) argument [all...] |
H A D | ExprEngineCallAndReturn.cpp | 158 ExplodedNodeSet &Dst) { 164 Dst.Add(Pred); 175 removeDead(Pred, Dst, dyn_cast<ReturnStmt>(LastSt), LCtx, 319 // CEENode -> Dst -> WorkList 332 ExplodedNodeSet Dst; local 334 getCheckerManager().runCheckersForPostObjCMessage(Dst, DstPostCall, *Msg, 338 getCheckerManager().runCheckersForPostStmt(Dst, DstPostCall, CE, 341 Dst.insert(DstPostCall); 345 for (ExplodedNodeSet::iterator PSI = Dst.begin(), PSE = Dst 156 removeDeadOnEndOfFunction(NodeBuilderContext& BC, ExplodedNode *Pred, ExplodedNodeSet &Dst) argument 507 evalCall(ExplodedNodeSet &Dst, ExplodedNode *Pred, const CallEvent &Call) argument 858 VisitReturnStmt(const ReturnStmt *RS, ExplodedNode *Pred, ExplodedNodeSet &Dst) argument [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | ARMSelectionDAGInfo.h | 50 SDValue Dst, SDValue Src,
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H A D | ARMSelectionDAGInfo.cpp | 31 SDValue Dst, SDValue Src, 79 DAG.getNode(ISD::ADD, dl, MVT::i32, Dst, 129 DAG.getNode(ISD::ADD, dl, MVT::i32, Dst, 144 SDValue Chain, SDValue Dst, 159 Entry.Node = Dst; 29 EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const argument 143 EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVolatile, MachinePointerInfo DstPtrInfo) const argument
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/external/llvm/lib/Target/R600/MCTargetDesc/ |
H A D | AMDGPUAsmBackend.cpp | 87 uint16_t *Dst = (uint16_t*)(Data + Fixup.getOffset()); local 89 *Dst = (Value - 4) / 4;
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/external/llvm/lib/Target/XCore/MCTargetDesc/ |
H A D | XCoreMCTargetDesc.cpp | 58 MachineLocation Dst(MachineLocation::VirtualFP); 60 MAI->addInitialFrameState(0, Dst, Src);
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/external/llvm/lib/CodeGen/ |
H A D | BasicTargetTransformInfo.cpp | 91 virtual unsigned getCastInstrCost(unsigned Opcode, Type *Dst, 237 unsigned BasicTTI::getCastInstrCost(unsigned Opcode, Type *Dst, argument 243 std::pair<unsigned, MVT> DstLT = TLI->getTypeLegalizationCost(Dst); 267 if (!Src->isVectorTy() && !Dst->isVectorTy()) { 282 if (Dst->isVectorTy() && Src->isVectorTy()) { 305 unsigned Num = Dst->getVectorNumElements(); 306 unsigned Cost = TopTTI->getCastInstrCost(Opcode, Dst->getScalarType(), 311 return getScalarizationOverhead(Dst, true, true) + Num * Cost; 320 (Dst->isVectorTy()? getScalarizationOverhead(Dst, tru [all...] |
H A D | RegisterCoalescer.cpp | 216 unsigned &Src, unsigned &Dst, 219 Dst = MI->getOperand(0).getReg(); 224 Dst = MI->getOperand(0).getReg(); 257 unsigned Src, Dst, SrcSub, DstSub; local 258 if (!isMoveInstr(TRI, MI, Src, Dst, SrcSub, DstSub)) 262 // If one register is a physreg, it must be Dst. 264 if (TargetRegisterInfo::isPhysicalRegister(Dst)) 266 std::swap(Src, Dst); 273 if (TargetRegisterInfo::isPhysicalRegister(Dst)) { 276 Dst 215 isMoveInstr(const TargetRegisterInfo &tri, const MachineInstr *MI, unsigned &Src, unsigned &Dst, unsigned &SrcSub, unsigned &DstSub) argument 352 unsigned Src, Dst, SrcSub, DstSub; local [all...] |
/external/llvm/lib/Target/R600/ |
H A D | SILowerControlFlow.cpp | 197 unsigned Dst = MI.getOperand(0).getReg(); local 200 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_OR_SAVEEXEC_B64), Dst) 205 .addReg(Dst); 216 unsigned Dst = MI.getOperand(0).getReg(); local 219 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_OR_B64), Dst) 230 unsigned Dst = MI.getOperand(0).getReg(); local 234 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_OR_B64), Dst) 245 unsigned Dst = MI.getOperand(0).getReg(); local 249 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_OR_B64), Dst) 377 unsigned Dst local 395 unsigned Dst = MI.getOperand(0).getReg(); local [all...] |
H A D | SIInsertWaits.cpp | 299 static void increaseCounters(Counters &Dst, const Counters &Src) { argument 302 Dst.Array[i] = std::max(Dst.Array[i], Src.Array[i]);
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/external/llvm/include/llvm/Transforms/Utils/ |
H A D | BuildLibCalls.h | 52 Value *EmitStrCpy(Value *Dst, Value *Src, IRBuilder<> &B, 58 Value *EmitStrNCpy(Value *Dst, Value *Src, Value *Len, IRBuilder<> &B, 63 /// This expects that the Len and ObjSize have type 'intptr_t' and Dst/Src 65 Value *EmitMemCpyChk(Value *Dst, Value *Src, Value *Len, Value *ObjSize,
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H A D | BasicBlockUtils.h | 137 /// SplitCriticalEdge - If an edge from Src to Dst is critical, split the edge 141 inline BasicBlock *SplitCriticalEdge(BasicBlock *Src, BasicBlock *Dst, argument 149 if (TI->getSuccessor(i) == Dst)
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCTargetTransformInfo.cpp | 92 virtual unsigned getCastInstrCost(unsigned Opcode, Type *Dst, 182 unsigned PPCTTI::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) const { argument 185 return TargetTransformInfo::getCastInstrCost(Opcode, Dst, Src);
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/external/elfutils/libelf/ |
H A D | common.h | 168 #define CONVERT_TO(Dst, Var) \ 169 (Dst) = (sizeof (Var) == 1 \
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/external/llvm/include/llvm/Analysis/ |
H A D | BlockFrequencyImpl.h | 73 /// getEdgeFreq - Return edge frequency based on SRC frequency and Src -> Dst 75 BlockFrequency getEdgeFreq(BlockT *Src, BlockT *Dst) const { 76 BranchProbability Prob = BPI->getEdgeProbability(Src, Dst); 141 /// isBackedge - Return if edge Src -> Dst is a backedge. 143 bool isBackedge(BlockT *Src, BlockT *Dst) { argument 145 assert(isReachable(Dst)); 148 unsigned b = RPO[Dst];
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/external/llvm/lib/Transforms/Utils/ |
H A D | SimplifyLibCalls.cpp | 241 Value *Dst = CI->getArgOperand(0), *Src = CI->getArgOperand(1); 242 if (Dst == Src) // __strcpy_chk(x,x) -> x 251 Value *Ret = EmitStrCpy(Dst, Src, B, TD, TLI, Name.substr(2, 6)); 262 EmitMemCpyChk(Dst, Src, 286 Value *Dst = CI->getArgOperand(0), *Src = CI->getArgOperand(1); 287 if (Dst == Src) { // stpcpy(x,x) -> x+strlen(x) 289 return StrLen ? B.CreateInBoundsGEP(Dst, StrLen) : 0; 298 Value *Ret = EmitStrCpy(Dst, Src, B, TD, TLI, Name.substr(2, 6)); 310 Value *DstEnd = B.CreateGEP(Dst, 313 if (!EmitMemCpyChk(Dst, Sr 379 emitStrLenMemCpy(Value *Src, Value *Dst, uint64_t Len, IRBuilder<> &B) argument [all...] |
/external/llvm/lib/Target/AArch64/ |
H A D | AArch64FrameLowering.cpp | 99 MachineLocation Dst(MachineLocation::VirtualFP); 101 Moves.push_back(MachineMove(SPLabel, Dst, Src)); 134 MachineLocation Dst(MachineLocation::VirtualFP); 136 Moves.push_back(MachineMove(FPLabel, Dst, Src)); 166 MachineLocation Dst(MachineLocation::VirtualFP); 168 Moves.push_back(MachineMove(CSLabel, Dst, Src)); 183 MachineLocation Dst(MachineLocation::VirtualFP, 186 Moves.push_back(MachineMove(CSLabel, Dst, Src));
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/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64MCTargetDesc.cpp | 64 MachineLocation Dst(MachineLocation::VirtualFP); 66 MAI->addInitialFrameState(0, Dst, Src);
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/external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
H A D | PPCMCTargetDesc.cpp | 72 MachineLocation Dst(MachineLocation::VirtualFP); 74 MAI->addInitialFrameState(0, Dst, Src);
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/external/skia/legacy/src/effects/ |
H A D | SkPorterDuff.cpp | 27 MAKE_PAIR(Dst),
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/external/skia/src/effects/ |
H A D | SkPorterDuff.cpp | 27 MAKE_PAIR(Dst),
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