Searched refs:TM (Results 26 - 50 of 299) sorted by relevance

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/external/llvm/lib/Target/AArch64/
H A DAArch64SelectionDAGInfo.h26 explicit AArch64SelectionDAGInfo(const AArch64TargetMachine &TM);
H A DAArch64.h29 FunctionPass *createAArch64ISelDAG(AArch64TargetMachine &TM,
/external/llvm/lib/Target/MBlaze/
H A DMBlazeSelectionDAGInfo.h25 explicit MBlazeSelectionDAGInfo(const MBlazeTargetMachine &TM);
/external/llvm/lib/Target/MSP430/
H A DMSP430SelectionDAGInfo.h25 explicit MSP430SelectionDAGInfo(const MSP430TargetMachine &TM);
H A DMSP430.h40 FunctionPass *createMSP430ISelDag(MSP430TargetMachine &TM,
/external/llvm/lib/Target/Mips/
H A DMipsSelectionDAGInfo.h25 explicit MipsSelectionDAGInfo(const MipsTargetMachine &TM);
H A DMips16ISelDAGToDAG.h23 explicit Mips16DAGToDAGISel(MipsTargetMachine &TM) : MipsDAGToDAGISel(TM) {} argument
47 FunctionPass *createMips16ISelDag(MipsTargetMachine &TM);
H A DMipsTargetMachine.cpp82 MipsPassConfig(MipsTargetMachine *TM, PassManagerBase &PM) argument
83 : TargetPassConfig(TM, PM) {}
113 MipsTargetMachine &TM = getMipsTargetMachine(); local
114 addPass(createMipsDelaySlotFillerPass(TM));
117 if (TM.getSubtarget<MipsSubtarget>().hasStandardEncoding())
118 addPass(createMipsLongBranchPass(TM));
119 if (TM.getSubtarget<MipsSubtarget>().inMips16Mode())
120 addPass(createMipsConstantIslandPass(TM));
H A DMipsISelDAGToDAG.h34 explicit MipsDAGToDAGISel(MipsTargetMachine &TM) argument
35 : SelectionDAGISel(TM), Subtarget(TM.getSubtarget<MipsSubtarget>()) {}
89 FunctionPass *createMipsISelDag(MipsTargetMachine &TM);
H A DMipsInstrInfo.h30 MipsTargetMachine &TM; member in class:llvm::MipsInstrInfo
43 explicit MipsInstrInfo(MipsTargetMachine &TM, unsigned UncondBrOpc);
45 static const MipsInstrInfo *create(MipsTargetMachine &TM);
107 const MipsInstrInfo *createMips16InstrInfo(MipsTargetMachine &TM);
108 const MipsInstrInfo *createMipsSEInstrInfo(MipsTargetMachine &TM);
/external/llvm/lib/Target/PowerPC/
H A DPPCSelectionDAGInfo.h25 explicit PPCSelectionDAGInfo(const PPCTargetMachine &TM);
H A DPPC.h36 FunctionPass *createPPCISelDag(PPCTargetMachine &TM);
37 FunctionPass *createPPCJITCodeEmitterPass(PPCTargetMachine &TM,
43 ImmutablePass *createPPCTargetTransformInfoPass(const PPCTargetMachine *TM);
H A DPPCJITInfo.h25 PPCTargetMachine &TM; member in class:llvm::PPCJITInfo
28 PPCJITInfo(PPCTargetMachine &tm, bool tmIs64Bit) : TM(tm) {
H A DPPCTargetTransformInfo.cpp36 const PPCTargetMachine *TM; member in class:__anon9766::PPCTTI
45 PPCTTI() : ImmutablePass(ID), TM(0), ST(0), TLI(0) {
49 PPCTTI(const PPCTargetMachine *TM) argument
50 : ImmutablePass(ID), TM(TM), ST(TM->getSubtargetImpl()),
51 TLI(TM->getTargetLowering()) {
112 llvm::createPPCTargetTransformInfoPass(const PPCTargetMachine *TM) { argument
113 return new PPCTTI(TM);
/external/llvm/lib/Target/Sparc/
H A DSparcSelectionDAGInfo.h25 explicit SparcSelectionDAGInfo(const SparcTargetMachine &TM);
/external/llvm/lib/Target/XCore/
H A DXCore.h27 FunctionPass *createXCoreISelDag(XCoreTargetMachine &TM,
H A DXCoreSelectionDAGInfo.h25 explicit XCoreSelectionDAGInfo(const XCoreTargetMachine &TM);
/external/llvm/include/llvm/Target/
H A DTargetLoweringObjectFile.h52 virtual void Initialize(MCContext &ctx, const TargetMachine &TM);
55 const TargetMachine &TM,
79 const TargetMachine &TM);
86 const TargetMachine &TM) const;
93 const TargetMachine &TM) const {
94 return SectionForGlobal(GV, getKindForGlobal(GV, TM), Mang, TM);
102 Mangler *Mang, const TargetMachine &TM) const = 0;
144 Mangler *Mang, const TargetMachine &TM) const;
/external/llvm/lib/Target/ARM/
H A DARM.h32 FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM,
35 FunctionPass *createARMJITCodeEmitterPass(ARMBaseTargetMachine &TM,
49 ImmutablePass *createARMTargetTransformInfoPass(const ARMBaseTargetMachine *TM);
/external/llvm/lib/Target/R600/
H A DAMDGPUConvertToISA.cpp28 TargetMachine &TM; member in class:__anon9767::AMDGPUConvertToISAPass
32 MachineFunctionPass(ID), TM(tm) { }
50 static_cast<const AMDGPUInstrInfo*>(TM.getInstrInfo());
H A DAMDIL.h66 createAMDGPUISelDag(TargetMachine &TM);
68 createAMDGPUPeepholeOpt(TargetMachine &TM);
72 createAMDGPUCFGPreparationPass(TargetMachine &TM);
74 createAMDGPUCFGStructurizerPass(TargetMachine &TM);
/external/llvm/lib/Target/X86/
H A DX86TargetObjectFile.cpp46 X86LinuxTargetObjectFile::Initialize(MCContext &Ctx, const TargetMachine &TM) { argument
47 TargetLoweringObjectFileELF::Initialize(Ctx, TM);
48 InitializeELF(TM.Options.UseInitArray);
/external/llvm/include/llvm/CodeGen/
H A DTargetLoweringObjectFileImpl.h42 const TargetMachine &TM,
52 Mangler *Mang, const TargetMachine &TM) const;
56 Mangler *Mang, const TargetMachine &TM) const;
87 Mangler *Mang, const TargetMachine &TM) const;
91 Mangler *Mang, const TargetMachine &TM) const;
95 Mangler *Mang, const TargetMachine &TM) const;
126 Mangler *Mang, const TargetMachine &TM) const;
130 Mangler *Mang, const TargetMachine &TM) const;
/external/llvm/lib/Target/Hexagon/
H A DHexagonSelectionDAGInfo.cpp21 &TM)
22 : TargetSelectionDAGInfo(TM) {
20 HexagonSelectionDAGInfo(const HexagonTargetMachine &TM) argument
/external/llvm/lib/Target/
H A DTargetLoweringObjectFile.cpp41 const TargetMachine &TM) {
43 InitMCObjectFileInfo(TM.getTargetTriple(),
44 TM.getRelocationModel(), TM.getCodeModel(), *Ctx);
107 const TargetMachine &TM,
113 /// a global variable. Given an global variable and information from TM, it
118 const TargetMachine &TM){
122 Reloc::Model ReloModel = TM.getRelocationModel();
131 if (isSuitableForBSS(GVar, TM.Options.NoZerosInBSS))
141 if (isSuitableForBSS(GVar, TM
40 Initialize(MCContext &ctx, const TargetMachine &TM) argument
106 emitPersonalityValue(MCStreamer &Streamer, const TargetMachine &TM, const MCSymbol *Sym) const argument
117 getKindForGlobal(const GlobalValue *GV, const TargetMachine &TM) argument
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