| /external/llvm/lib/CodeGen/ |
| H A D | MachineFunctionAnalysis.cpp | 23 FunctionPass(ID), TM(tm), MF(0) {
48 MF = new MachineFunction(&F, TM, NextFnNum++,
|
| H A D | LLVMTargetMachine.cpp | 87 static MCContext *addPassesToGenerateCode(LLVMTargetMachine *TM, argument
93 TargetPassConfig *PassConfig = TM->createPassConfig(PM);
112 new MachineModuleInfo(*TM->getMCAsmInfo(), *TM->getRegisterInfo(),
113 &TM->getTargetLowering()->getObjFileLowering());
118 PM.add(new MachineFunctionAnalysis(*TM));
122 (TM->getOptLevel() == CodeGenOpt::None &&
124 TM->setFastISel(true);
|
| /external/llvm/lib/Target/MSP430/ |
| H A D | MSP430TargetMachine.cpp | 45 MSP430PassConfig(MSP430TargetMachine *TM, PassManagerBase &PM) argument
46 : TargetPassConfig(TM, PM) {}
|
| H A D | MSP430RegisterInfo.h | 29 MSP430TargetMachine &TM; member in struct:llvm::MSP430RegisterInfo
|
| /external/llvm/lib/Target/XCore/ |
| H A D | XCoreTargetMachine.cpp | 42 XCorePassConfig(XCoreTargetMachine *TM, PassManagerBase &PM) argument
43 : TargetPassConfig(TM, PM) {}
|
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMTargetObjectFile.h | 29 virtual void Initialize(MCContext &Ctx, const TargetMachine &TM);
|
| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSelectionDAGInfo.h | 25 explicit HexagonSelectionDAGInfo(const HexagonTargetMachine &TM);
|
| /external/llvm/lib/Target/R600/ |
| H A D | R600RegisterInfo.h | 27 AMDGPUTargetMachine &TM; member in struct:llvm::R600RegisterInfo
|
| H A D | SIRegisterInfo.h | 27 AMDGPUTargetMachine &TM; member in struct:llvm::SIRegisterInfo
|
| H A D | SIRegisterInfo.cpp | 24 TM(tm),
|
| /external/llvm/lib/Target/X86/ |
| H A D | X86TargetObjectFile.h | 38 virtual void Initialize(MCContext &Ctx, const TargetMachine &TM);
|
| H A D | X86AsmPrinter.h | 28 explicit X86AsmPrinter(TargetMachine &TM, MCStreamer &Streamer) argument
29 : AsmPrinter(TM, Streamer) {
30 Subtarget = &TM.getSubtarget<X86Subtarget>();
|
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64AsmPrinter.h | 38 explicit AArch64AsmPrinter(TargetMachine &TM, MCStreamer &Streamer) argument
39 : AsmPrinter(TM, Streamer) {
40 Subtarget = &TM.getSubtarget<AArch64Subtarget>();
|
| H A D | AArch64TargetMachine.cpp | 47 AArch64PassConfig(AArch64TargetMachine *TM, PassManagerBase &PM) argument
48 : TargetPassConfig(TM, PM) {}
|
| /external/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelDAGToDAG.h | 24 explicit MipsSEDAGToDAGISel(MipsTargetMachine &TM) : MipsDAGToDAGISel(TM) {} argument
53 FunctionPass *createMipsSEISelDag(MipsTargetMachine &TM);
|
| H A D | MipsAsmPrinter.h | 49 explicit MipsAsmPrinter(TargetMachine &TM, MCStreamer &Streamer) argument
50 : AsmPrinter(TM, Streamer), MCInstLowering(*this) {
51 Subtarget = &TM.getSubtarget<MipsSubtarget>();
|
| H A D | MipsFrameLowering.h | 33 static const MipsFrameLowering *create(MipsTargetMachine &TM,
|
| H A D | MipsISelDAGToDAG.cpp | 149 FunctionPass *llvm::createMipsISelDag(MipsTargetMachine &TM) { argument
150 if (TM.getSubtargetImpl()->inMips16Mode())
151 return llvm::createMips16ISelDag(TM);
153 return llvm::createMipsSEISelDag(TM);
|
| H A D | MipsFrameLowering.cpp | 85 const MipsFrameLowering *MipsFrameLowering::create(MipsTargetMachine &TM, argument
87 if (TM.getSubtargetImpl()->inMips16Mode())
|
| /external/llvm/lib/Target/Sparc/ |
| H A D | Sparc.h | 27 FunctionPass *createSparcISelDag(SparcTargetMachine &TM);
28 FunctionPass *createSparcDelaySlotFillerPass(TargetMachine &TM);
29 FunctionPass *createSparcFPMoverPass(TargetMachine &TM);
|
| /external/clang/lib/CodeGen/ |
| H A D | BackendUtil.cpp | 58 PassManager *getCodeGenPasses(TargetMachine *TM) const {
62 if (TM)
63 TM->addAnalysisPasses(*CodeGenPasses);
68 PassManager *getPerModulePasses(TargetMachine *TM) const {
72 if (TM)
73 TM->addAnalysisPasses(*PerModulePasses);
78 FunctionPassManager *getPerFunctionPasses(TargetMachine *TM) const {
82 if (TM)
83 TM->addAnalysisPasses(*PerFunctionPasses);
89 void CreatePasses(TargetMachine *TM);
209 CreatePasses(TargetMachine *TM) argument
461 TargetMachine *TM = TheTarget->createTargetMachine(Triple, TargetOpts.CPU, local
479 AddEmitPasses(BackendAction Action, formatted_raw_ostream &OS, TargetMachine *TM) argument
529 TargetMachine *TM = CreateTargetMachine(UsesCodeGen); local
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| H A D | MachineFunctionAnalysis.h | 28 const TargetMachine &TM; member in struct:llvm::MachineFunctionAnalysis
|
| /external/llvm/lib/ExecutionEngine/MCJIT/ |
| H A D | MCJIT.cpp | 43 TargetMachine *TM) {
49 return new MCJIT(M, TM, JMM, GVsWithCode);
54 : ExecutionEngine(m), TM(tm), Ctx(0), MemMgr(MM), Dyld(MM),
57 setDataLayout(TM->getDataLayout());
64 delete TM;
85 PM.add(new DataLayout(*TM->getDataLayout()));
92 if (TM->addPassesToEmitMC(PM, Ctx, Buffer->getOStream(), false)) {
172 return (void*)Dyld.getSymbolLoadAddress((TM->getMCAsmInfo()->getGlobalPrefix()
39 createJIT(Module *M, std::string *ErrorStr, JITMemoryManager *JMM, bool GVsWithCode, TargetMachine *TM) argument
|
| H A D | MCJIT.h | 30 TargetMachine *TM; member in class:llvm::MCJIT
95 TargetMachine *TM);
|
| /external/llvm/lib/Target/MBlaze/ |
| H A D | MBlazeTargetMachine.cpp | 52 MBlazePassConfig(MBlazeTargetMachine *TM, PassManagerBase &PM) argument
53 : TargetPassConfig(TM, PM) {}
|