PPCRegisterInfo.cpp revision 7af0248af47fbd86ec65d308adda22ec367accc4
1f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman//===- PPC32RegisterInfo.cpp - PowerPC32 Register Information ---*- C++ -*-===// 2f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 3f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// The LLVM Compiler Infrastructure 4f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 5f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// This file was developed by the LLVM research group and is distributed under 6f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// the University of Illinois Open Source License. See LICENSE.TXT for details. 7f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 8f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman//===----------------------------------------------------------------------===// 9f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 10f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// This file contains the PowerPC32 implementation of the MRegisterInfo class. 11f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 12f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman//===----------------------------------------------------------------------===// 13f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 14f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#define DEBUG_TYPE "reginfo" 15f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#include "PowerPC.h" 16f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#include "PowerPCInstrBuilder.h" 17f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#include "PPC32RegisterInfo.h" 18f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#include "llvm/Constants.h" 19f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#include "llvm/Type.h" 20f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#include "llvm/CodeGen/ValueTypes.h" 21f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#include "llvm/CodeGen/MachineInstrBuilder.h" 22f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#include "llvm/CodeGen/MachineFunction.h" 23f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#include "llvm/CodeGen/MachineFrameInfo.h" 24f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#include "llvm/Target/TargetFrameInfo.h" 25f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#include "llvm/Target/TargetMachine.h" 26f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#include "llvm/Target/TargetOptions.h" 27551ccae044b0ff658fe629dd67edd5ffe75d10e8Reid Spencer#include "llvm/Support/CommandLine.h" 28551ccae044b0ff658fe629dd67edd5ffe75d10e8Reid Spencer#include "llvm/Support/Debug.h" 29551ccae044b0ff658fe629dd67edd5ffe75d10e8Reid Spencer#include "llvm/ADT/STLExtras.h" 30f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#include <cstdlib> 31f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#include <iostream> 32f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukmanusing namespace llvm; 33f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 34f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukmannamespace llvm { 35f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // Switch toggling compilation for AIX 36f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman extern cl::opt<bool> AIX; 37f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman} 38f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 39f2ccb77ee9d8ab35866dae111fa36929689c7511Misha BrukmanPPC32RegisterInfo::PPC32RegisterInfo() 40f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman : PPC32GenRegisterInfo(PPC::ADJCALLSTACKDOWN, PPC::ADJCALLSTACKUP) { 41f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman ImmToIdxMap[PPC::LD] = PPC::LDX; ImmToIdxMap[PPC::STD] = PPC::STDX; 42f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman ImmToIdxMap[PPC::LBZ] = PPC::LBZX; ImmToIdxMap[PPC::STB] = PPC::STBX; 43f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman ImmToIdxMap[PPC::LHZ] = PPC::LHZX; ImmToIdxMap[PPC::LHA] = PPC::LHAX; 44f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman ImmToIdxMap[PPC::LWZ] = PPC::LWZX; ImmToIdxMap[PPC::LWA] = PPC::LWAX; 45f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman ImmToIdxMap[PPC::LFS] = PPC::LFSX; ImmToIdxMap[PPC::LFD] = PPC::LFDX; 46f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman ImmToIdxMap[PPC::STH] = PPC::STHX; ImmToIdxMap[PPC::STW] = PPC::STWX; 47f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman ImmToIdxMap[PPC::STFS] = PPC::STFSX; ImmToIdxMap[PPC::STFD] = PPC::STFDX; 48f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman ImmToIdxMap[PPC::ADDI] = PPC::ADD; 49f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman} 50f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 51dfd0e7bc342f1252a2d2088ca5a759b6f04a65d7Nate Begemanstatic const TargetRegisterClass *getClass(unsigned SrcReg) { 52dfd0e7bc342f1252a2d2088ca5a759b6f04a65d7Nate Begeman if (PPC32::FPRCRegisterClass->contains(SrcReg)) 53dfd0e7bc342f1252a2d2088ca5a759b6f04a65d7Nate Begeman return PPC32::FPRCRegisterClass; 54dfd0e7bc342f1252a2d2088ca5a759b6f04a65d7Nate Begeman assert(PPC32::GPRCRegisterClass->contains(SrcReg) && "Reg not FPR or GPR"); 55dfd0e7bc342f1252a2d2088ca5a759b6f04a65d7Nate Begeman return PPC32::GPRCRegisterClass; 56dfd0e7bc342f1252a2d2088ca5a759b6f04a65d7Nate Begeman} 57dfd0e7bc342f1252a2d2088ca5a759b6f04a65d7Nate Begeman 58f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukmanstatic unsigned getIdx(const TargetRegisterClass *RC) { 59f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman if (RC == PPC32::GPRCRegisterClass) { 60f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman switch (RC->getSize()) { 61f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman default: assert(0 && "Invalid data size!"); 62f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman case 1: return 0; 63f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman case 2: return 1; 64f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman case 4: return 2; 65f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 66f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } else if (RC == PPC32::FPRCRegisterClass) { 67f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman switch (RC->getSize()) { 68f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman default: assert(0 && "Invalid data size!"); 69f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman case 4: return 3; 70f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman case 8: return 4; 71f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 727af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman } else if (RC == PPC32::CRRCRegisterClass) { 737af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman switch (RC->getSize()) { 747af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman default: assert(0 && "Invalid data size!"); 757af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman case 4: return 2; 767af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman } 77f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 78f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman std::cerr << "Invalid register class to getIdx()!\n"; 79f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman abort(); 80f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman} 81f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 82f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukmanvoid 83f2ccb77ee9d8ab35866dae111fa36929689c7511Misha BrukmanPPC32RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB, 84f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MachineBasicBlock::iterator MI, 85f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman unsigned SrcReg, int FrameIdx) const { 86f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman static const unsigned Opcode[] = { 87f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman PPC::STB, PPC::STH, PPC::STW, PPC::STFS, PPC::STFD 88f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman }; 89dfd0e7bc342f1252a2d2088ca5a759b6f04a65d7Nate Begeman unsigned OC = Opcode[getIdx(getClass(SrcReg))]; 90f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman if (SrcReg == PPC::LR) { 91da721e74f87c3098bdb1373a7a1c7aef4cf7d574Nate Begeman BuildMI(MBB, MI, PPC::MFLR, 1, PPC::R11).addReg(PPC::LR); 92f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman addFrameReference(BuildMI(MBB, MI, OC, 3).addReg(PPC::R11),FrameIdx); 937af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman } else if (PPC32::CRRCRegisterClass == getClass(SrcReg)) { 947af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman BuildMI(MBB, MI, PPC::MFCR, 0, PPC::R11); 957af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman addFrameReference(BuildMI(MBB, MI, OC, 3).addReg(PPC::R11),FrameIdx); 96f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } else { 97f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman addFrameReference(BuildMI(MBB, MI, OC, 3).addReg(SrcReg),FrameIdx); 98f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 99f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman} 100f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 101f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukmanvoid 102f2ccb77ee9d8ab35866dae111fa36929689c7511Misha BrukmanPPC32RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, 103f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MachineBasicBlock::iterator MI, 104f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman unsigned DestReg, int FrameIdx) const{ 105f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman static const unsigned Opcode[] = { 106f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman PPC::LBZ, PPC::LHZ, PPC::LWZ, PPC::LFS, PPC::LFD 107f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman }; 108dfd0e7bc342f1252a2d2088ca5a759b6f04a65d7Nate Begeman unsigned OC = Opcode[getIdx(getClass(DestReg))]; 109f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman if (DestReg == PPC::LR) { 110f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman addFrameReference(BuildMI(MBB, MI, OC, 2, PPC::R11), FrameIdx); 111f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman BuildMI(MBB, MI, PPC::MTLR, 1).addReg(PPC::R11); 1127af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman } else if (PPC32::CRRCRegisterClass == getClass(DestReg)) { 1137af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman addFrameReference(BuildMI(MBB, MI, OC, 2, PPC::R11), FrameIdx); 1147af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman BuildMI(MBB, MI, PPC::MTCRF, 1, DestReg).addReg(PPC::R11); 115f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } else { 116f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman addFrameReference(BuildMI(MBB, MI, OC, 2, DestReg), FrameIdx); 117f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 118f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman} 119f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 120f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukmanvoid PPC32RegisterInfo::copyRegToReg(MachineBasicBlock &MBB, 121f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MachineBasicBlock::iterator MI, 122f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman unsigned DestReg, unsigned SrcReg, 123f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman const TargetRegisterClass *RC) const { 124f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MachineInstr *I; 125f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 126f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman if (RC == PPC32::GPRCRegisterClass) { 127f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman BuildMI(MBB, MI, PPC::OR, 2, DestReg).addReg(SrcReg).addReg(SrcReg); 128f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } else if (RC == PPC32::FPRCRegisterClass) { 129f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman BuildMI(MBB, MI, PPC::FMR, 1, DestReg).addReg(SrcReg); 1307af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman } else if (RC == PPC32::CRRCRegisterClass) { 1317af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman BuildMI(MBB, MI, PPC::MCRF, 1, DestReg).addReg(SrcReg); 1327af0248af47fbd86ec65d308adda22ec367accc4Nate Begeman } else { 133f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman std::cerr << "Attempt to copy register that is not GPR or FPR"; 134f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman abort(); 135f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 136f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman} 137f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 138f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman//===----------------------------------------------------------------------===// 139f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// Stack Frame Processing methods 140f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman//===----------------------------------------------------------------------===// 141f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 142f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// hasFP - Return true if the specified function should have a dedicated frame 143f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// pointer register. This is true if the function has variable sized allocas or 144f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// if frame pointer elimination is disabled. 145f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman// 146f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukmanstatic bool hasFP(MachineFunction &MF) { 147f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MachineFrameInfo *MFI = MF.getFrameInfo(); 148f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman return MFI->hasVarSizedObjects(); 149f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman} 150f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 151f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukmanvoid PPC32RegisterInfo:: 152f2ccb77ee9d8ab35866dae111fa36929689c7511Misha BrukmaneliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, 153f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MachineBasicBlock::iterator I) const { 154f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman if (hasFP(MF)) { 155f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // If we have a frame pointer, convert as follows: 156f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // ADJCALLSTACKDOWN -> addi, r1, r1, -amount 157f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // ADJCALLSTACKUP -> addi, r1, r1, amount 158f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MachineInstr *Old = I; 159f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman unsigned Amount = Old->getOperand(0).getImmedValue(); 160f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman if (Amount != 0) { 161f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // We need to keep the stack aligned properly. To do this, we round the 162f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // amount of space needed for the outgoing arguments up to the next 163f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // alignment boundary. 164f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment(); 165f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman Amount = (Amount+Align-1)/Align*Align; 166f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 167f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // Replace the pseudo instruction with a new instruction... 168f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman if (Old->getOpcode() == PPC::ADJCALLSTACKDOWN) { 169f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MBB.insert(I, BuildMI(PPC::ADDI, 2, PPC::R1).addReg(PPC::R1) 170f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman .addSImm(-Amount)); 171f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } else { 172f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman assert(Old->getOpcode() == PPC::ADJCALLSTACKUP); 173f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MBB.insert(I, BuildMI(PPC::ADDI, 2, PPC::R1).addReg(PPC::R1) 174f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman .addSImm(Amount)); 175f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 176f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 177f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 178f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MBB.erase(I); 179f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman} 180f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 181f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukmanvoid 182f2ccb77ee9d8ab35866dae111fa36929689c7511Misha BrukmanPPC32RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const { 183f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman unsigned i = 0; 184f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MachineInstr &MI = *II; 185f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MachineBasicBlock &MBB = *MI.getParent(); 186f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MachineFunction &MF = *MBB.getParent(); 187f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 188f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman while (!MI.getOperand(i).isFrameIndex()) { 189f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman ++i; 190f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!"); 191f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 192f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 193f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman int FrameIndex = MI.getOperand(i).getFrameIndex(); 194f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 195f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // Replace the FrameIndex with base register with GPR1 (SP) or GPR31 (FP). 196f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.SetMachineOperandReg(i, hasFP(MF) ? PPC::R31 : PPC::R1); 197f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 198f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // Take into account whether it's an add or mem instruction 199f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman unsigned OffIdx = (i == 2) ? 1 : 2; 200f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 201f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // Now add the frame object offset to the offset from r1. 202f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) + 203f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.getOperand(OffIdx).getImmedValue(); 204f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 205f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // If we're not using a Frame Pointer that has been set to the value of the 206f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // SP before having the stack size subtracted from it, then add the stack size 207f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // to Offset to get the correct offset. 208f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman Offset += MF.getFrameInfo()->getStackSize(); 209f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 210f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman if (Offset > 32767 || Offset < -32768) { 211f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // Insert a set of r0 with the full offset value before the ld, st, or add 212f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MachineBasicBlock *MBB = MI.getParent(); 213f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MBB->insert(II, BuildMI(PPC::LIS, 1, PPC::R0).addSImm(Offset >> 16)); 214f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MBB->insert(II, BuildMI(PPC::ORI, 2, PPC::R0).addReg(PPC::R0) 215f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman .addImm(Offset)); 216f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // convert into indexed form of the instruction 217f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // sth 0:rA, 1:imm 2:(rB) ==> sthx 0:rA, 2:rB, 1:r0 218f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // addi 0:rA 1:rB, 2, imm ==> add 0:rA, 1:rB, 2:r0 219f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman unsigned NewOpcode = const_cast<std::map<unsigned, unsigned>& >(ImmToIdxMap)[MI.getOpcode()]; 220f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman assert(NewOpcode && "No indexed form of load or store available!"); 221f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.setOpcode(NewOpcode); 222f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.SetMachineOperandReg(1, MI.getOperand(i).getReg()); 223f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.SetMachineOperandReg(2, PPC::R0); 224f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } else { 225f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI.SetMachineOperandConst(OffIdx,MachineOperand::MO_SignExtendedImmed,Offset); 226f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 227f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman} 228f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 229f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 230f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukmanvoid PPC32RegisterInfo::emitPrologue(MachineFunction &MF) const { 231f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB 232f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MachineBasicBlock::iterator MBBI = MBB.begin(); 233f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MachineFrameInfo *MFI = MF.getFrameInfo(); 234f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MachineInstr *MI; 235f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 236f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // Get the number of bytes to allocate from the FrameInfo 237f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman unsigned NumBytes = MFI->getStackSize(); 238f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 239f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // If we have calls, we cannot use the red zone to store callee save registers 240f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // and we must set up a stack frame, so calculate the necessary size here. 241f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman if (MFI->hasCalls()) { 242f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // We reserve argument space for call sites in the function immediately on 243f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // entry to the current function. This eliminates the need for add/sub 244f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // brackets around call sites. 245f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman NumBytes += MFI->getMaxCallFrameSize(); 246f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 247f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 248f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // Do we need to allocate space on the stack? 249f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman if (NumBytes == 0) return; 250f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 251f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // Add the size of R1 to NumBytes size for the store of R1 to the bottom 252f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // of the stack and round the size to a multiple of the alignment. 253f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment(); 2545709998993cade99e4aeda1c9d44a1bdf54aa720Nate Begeman unsigned GPRSize = getSpillSize(PPC::R1)/8; 2558edcd8465361f3aa29082e1b1f2a1c88afc0836aChris Lattner unsigned Size = hasFP(MF) ? GPRSize + GPRSize : GPRSize; 256f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman NumBytes = (NumBytes+Size+Align-1)/Align*Align; 257f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 258f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // Update frame info to pretend that this is part of the stack... 259f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MFI->setStackSize(NumBytes); 260f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 261f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // adjust stack pointer: r1 -= numbytes 262f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman if (NumBytes <= 32768) { 263f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI=BuildMI(PPC::STWU,3).addReg(PPC::R1).addSImm(-NumBytes).addReg(PPC::R1); 264f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MBB.insert(MBBI, MI); 265f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } else { 266f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman int NegNumbytes = -NumBytes; 267f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI = BuildMI(PPC::LIS, 1, PPC::R0).addSImm(NegNumbytes >> 16); 268f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MBB.insert(MBBI, MI); 269f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI = BuildMI(PPC::ORI, 2, PPC::R0).addReg(PPC::R0) 270f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman .addImm(NegNumbytes & 0xFFFF); 271f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MBB.insert(MBBI, MI); 272f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI = BuildMI(PPC::STWUX, 3).addReg(PPC::R1).addReg(PPC::R1).addReg(PPC::R0); 273f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MBB.insert(MBBI, MI); 274f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 275f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 276f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman if (hasFP(MF)) { 2778edcd8465361f3aa29082e1b1f2a1c88afc0836aChris Lattner MI = BuildMI(PPC::STW, 3).addReg(PPC::R31).addSImm(GPRSize).addReg(PPC::R1); 278f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MBB.insert(MBBI, MI); 279f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI = BuildMI(PPC::OR, 2, PPC::R31).addReg(PPC::R1).addReg(PPC::R1); 280f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MBB.insert(MBBI, MI); 281f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 282f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman} 283f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 284f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukmanvoid PPC32RegisterInfo::emitEpilogue(MachineFunction &MF, 285f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MachineBasicBlock &MBB) const { 286f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman const MachineFrameInfo *MFI = MF.getFrameInfo(); 287f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MachineBasicBlock::iterator MBBI = prior(MBB.end()); 288f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MachineInstr *MI; 289f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman assert(MBBI->getOpcode() == PPC::BLR && 290f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman "Can only insert epilog into returning blocks"); 291f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 292f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman // Get the number of bytes allocated from the FrameInfo... 293f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman unsigned NumBytes = MFI->getStackSize(); 2945709998993cade99e4aeda1c9d44a1bdf54aa720Nate Begeman unsigned GPRSize = getSpillSize(PPC::R31)/8; 295f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 296f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman if (NumBytes != 0) { 297f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman if (hasFP(MF)) { 2981f4a132599974d448cbaa4519006d38ce9b1bf16Nate Begeman MI = BuildMI(PPC::LWZ, 2, PPC::R31).addSImm(GPRSize).addReg(PPC::R31); 299f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MBB.insert(MBBI, MI); 300f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 301f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MI = BuildMI(PPC::LWZ, 2, PPC::R1).addSImm(0).addReg(PPC::R1); 302f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman MBB.insert(MBBI, MI); 303f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 304f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman} 305f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 306f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman#include "PPC32GenRegisterInfo.inc" 307f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 308f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukmanconst TargetRegisterClass* 309f2ccb77ee9d8ab35866dae111fa36929689c7511Misha BrukmanPPC32RegisterInfo::getRegClassForType(const Type* Ty) const { 310f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman switch (Ty->getTypeID()) { 311f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman default: assert(0 && "Invalid type to getClass!"); 312f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman case Type::LongTyID: 313f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman case Type::ULongTyID: assert(0 && "Long values can't fit in registers!"); 314f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman case Type::BoolTyID: 315f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman case Type::SByteTyID: 316f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman case Type::UByteTyID: 317f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman case Type::ShortTyID: 318f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman case Type::UShortTyID: 319f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman case Type::IntTyID: 320f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman case Type::UIntTyID: 321f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman case Type::PointerTyID: return &GPRCInstance; 322f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 323f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman case Type::FloatTyID: 324f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman case Type::DoubleTyID: return &FPRCInstance; 325f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman } 326f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman} 327f2ccb77ee9d8ab35866dae111fa36929689c7511Misha Brukman 328