1//===--------------------- AMDGPUFrameLowering.h ----------------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10/// \file 11/// \brief Interface to describe a layout of a stack frame on a AMDIL target 12/// machine. 13// 14//===----------------------------------------------------------------------===// 15#ifndef AMDILFRAME_LOWERING_H 16#define AMDILFRAME_LOWERING_H 17 18#include "llvm/CodeGen/MachineFunction.h" 19#include "llvm/Target/TargetFrameLowering.h" 20 21namespace llvm { 22 23/// \brief Information about the stack frame layout on the AMDGPU targets. 24/// 25/// It holds the direction of the stack growth, the known stack alignment on 26/// entry to each function, and the offset to the locals area. 27/// See TargetFrameInfo for more comments. 28class AMDGPUFrameLowering : public TargetFrameLowering { 29public: 30 AMDGPUFrameLowering(StackDirection D, unsigned StackAl, int LAO, 31 unsigned TransAl = 1); 32 virtual ~AMDGPUFrameLowering(); 33 34 /// \returns The number of 32-bit sub-registers that are used when storing 35 /// values to the stack. 36 virtual unsigned getStackWidth(const MachineFunction &MF) const; 37 virtual int getFrameIndexOffset(const MachineFunction &MF, int FI) const; 38 virtual const SpillSlot *getCalleeSavedSpillSlots(unsigned &NumEntries) const; 39 virtual void emitPrologue(MachineFunction &MF) const; 40 virtual void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; 41 virtual bool hasFP(const MachineFunction &MF) const; 42}; 43} // namespace llvm 44#endif // AMDILFRAME_LOWERING_H 45