18c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng//===-- X86BaseInfo.h - Top level definitions for X86 -------- --*- C++ -*-===// 28c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng// 38c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng// The LLVM Compiler Infrastructure 48c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng// 58c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng// This file is distributed under the University of Illinois Open Source 68c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng// License. See LICENSE.TXT for details. 78c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng// 88c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng//===----------------------------------------------------------------------===// 98c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng// 108c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng// This file contains small standalone helper functions and enum definitions for 118c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng// the X86 target useful for the compiler back-end and the MC libraries. 128c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng// As such, it deliberately does not include references to LLVM core 138c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng// code gen types, passes, etc.. 148c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng// 158c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng//===----------------------------------------------------------------------===// 168c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 178c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng#ifndef X86BASEINFO_H 188c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng#define X86BASEINFO_H 198c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 208c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng#include "X86MCTargetDesc.h" 218c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng#include "llvm/Support/DataTypes.h" 226d1263acb9704b38a8d90fd6ce94f49193cd4ddeCraig Topper#include "llvm/Support/ErrorHandling.h" 238c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 248c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Chengnamespace llvm { 258c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 268c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Chengnamespace X86 { 278c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // Enums for memory operand decoding. Each memory operand is represented with 288c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // a 5 operand sequence in the form: 298c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // [BaseReg, ScaleAmt, IndexReg, Disp, Segment] 308c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // These enums help decode this. 318c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng enum { 328c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng AddrBaseReg = 0, 338c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng AddrScaleAmt = 1, 348c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng AddrIndexReg = 2, 358c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng AddrDisp = 3, 368c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 378c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// AddrSegmentReg - The operand # of the segment in the memory operand. 388c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng AddrSegmentReg = 4, 398c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 408c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// AddrNumOperands - Total number of operands in a memory reference. 418c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng AddrNumOperands = 5 428c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng }; 438c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng} // end namespace X86; 448c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 458c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 468c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng/// X86II - This namespace holds all of the target specific flags that 478c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng/// instruction info tracks. 488c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng/// 498c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Chengnamespace X86II { 508c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// Target Operand Flag enum. 518c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng enum TOF { 528c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng //===------------------------------------------------------------------===// 538c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // X86 Specific MachineOperand flags. 548c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 558c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MO_NO_FLAG, 568c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 578c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// MO_GOT_ABSOLUTE_ADDRESS - On a symbol operand, this represents a 588c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// relocation of: 598c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// SYMBOL_LABEL + [. - PICBASELABEL] 608c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MO_GOT_ABSOLUTE_ADDRESS, 618c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 628c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// MO_PIC_BASE_OFFSET - On a symbol operand this indicates that the 638c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// immediate should get the value of the symbol minus the PIC base label: 648c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// SYMBOL_LABEL - PICBASELABEL 658c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MO_PIC_BASE_OFFSET, 668c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 678c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// MO_GOT - On a symbol operand this indicates that the immediate is the 688c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// offset to the GOT entry for the symbol name from the base of the GOT. 698c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// 708c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// See the X86-64 ELF ABI supplement for more details. 718c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// SYMBOL_LABEL @GOT 728c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MO_GOT, 738c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 748c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// MO_GOTOFF - On a symbol operand this indicates that the immediate is 758c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// the offset to the location of the symbol name from the base of the GOT. 768c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// 778c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// See the X86-64 ELF ABI supplement for more details. 788c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// SYMBOL_LABEL @GOTOFF 798c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MO_GOTOFF, 808c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 818c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// MO_GOTPCREL - On a symbol operand this indicates that the immediate is 828c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// offset to the GOT entry for the symbol name from the current code 838c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// location. 848c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// 858c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// See the X86-64 ELF ABI supplement for more details. 868c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// SYMBOL_LABEL @GOTPCREL 878c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MO_GOTPCREL, 888c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 898c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// MO_PLT - On a symbol operand this indicates that the immediate is 908c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// offset to the PLT entry of symbol name from the current code location. 918c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// 928c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// See the X86-64 ELF ABI supplement for more details. 938c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// SYMBOL_LABEL @PLT 948c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MO_PLT, 958c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 968c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// MO_TLSGD - On a symbol operand this indicates that the immediate is 97d01d693c0b337cfcbf524a3a38c8123a6c5fe54eHans Wennborg /// the offset of the GOT entry with the TLS index structure that contains 98d01d693c0b337cfcbf524a3a38c8123a6c5fe54eHans Wennborg /// the module number and variable offset for the symbol. Used in the 99d01d693c0b337cfcbf524a3a38c8123a6c5fe54eHans Wennborg /// general dynamic TLS access model. 1008c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// 1018c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// See 'ELF Handling for Thread-Local Storage' for more details. 1028c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// SYMBOL_LABEL @TLSGD 1038c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MO_TLSGD, 1048c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 105f0234fcbc9be9798c10dedc3e3c134b7afbc6511Hans Wennborg /// MO_TLSLD - On a symbol operand this indicates that the immediate is 106f0234fcbc9be9798c10dedc3e3c134b7afbc6511Hans Wennborg /// the offset of the GOT entry with the TLS index for the module that 1077c1ac767691b2cb5d3367e667e51714f34eb675bHans Wennborg /// contains the symbol. When this index is passed to a call to 108f0234fcbc9be9798c10dedc3e3c134b7afbc6511Hans Wennborg /// __tls_get_addr, the function will return the base address of the TLS 109d01d693c0b337cfcbf524a3a38c8123a6c5fe54eHans Wennborg /// block for the symbol. Used in the x86-64 local dynamic TLS access model. 110f0234fcbc9be9798c10dedc3e3c134b7afbc6511Hans Wennborg /// 111f0234fcbc9be9798c10dedc3e3c134b7afbc6511Hans Wennborg /// See 'ELF Handling for Thread-Local Storage' for more details. 112f0234fcbc9be9798c10dedc3e3c134b7afbc6511Hans Wennborg /// SYMBOL_LABEL @TLSLD 113f0234fcbc9be9798c10dedc3e3c134b7afbc6511Hans Wennborg MO_TLSLD, 114f0234fcbc9be9798c10dedc3e3c134b7afbc6511Hans Wennborg 115f0234fcbc9be9798c10dedc3e3c134b7afbc6511Hans Wennborg /// MO_TLSLDM - On a symbol operand this indicates that the immediate is 116f0234fcbc9be9798c10dedc3e3c134b7afbc6511Hans Wennborg /// the offset of the GOT entry with the TLS index for the module that 1177c1ac767691b2cb5d3367e667e51714f34eb675bHans Wennborg /// contains the symbol. When this index is passed to a call to 118f0234fcbc9be9798c10dedc3e3c134b7afbc6511Hans Wennborg /// ___tls_get_addr, the function will return the base address of the TLS 119d01d693c0b337cfcbf524a3a38c8123a6c5fe54eHans Wennborg /// block for the symbol. Used in the IA32 local dynamic TLS access model. 120f0234fcbc9be9798c10dedc3e3c134b7afbc6511Hans Wennborg /// 121f0234fcbc9be9798c10dedc3e3c134b7afbc6511Hans Wennborg /// See 'ELF Handling for Thread-Local Storage' for more details. 122f0234fcbc9be9798c10dedc3e3c134b7afbc6511Hans Wennborg /// SYMBOL_LABEL @TLSLDM 123f0234fcbc9be9798c10dedc3e3c134b7afbc6511Hans Wennborg MO_TLSLDM, 124f0234fcbc9be9798c10dedc3e3c134b7afbc6511Hans Wennborg 1258c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// MO_GOTTPOFF - On a symbol operand this indicates that the immediate is 126d01d693c0b337cfcbf524a3a38c8123a6c5fe54eHans Wennborg /// the offset of the GOT entry with the thread-pointer offset for the 127d01d693c0b337cfcbf524a3a38c8123a6c5fe54eHans Wennborg /// symbol. Used in the x86-64 initial exec TLS access model. 1288c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// 1298c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// See 'ELF Handling for Thread-Local Storage' for more details. 1308c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// SYMBOL_LABEL @GOTTPOFF 1318c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MO_GOTTPOFF, 1328c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 1338c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// MO_INDNTPOFF - On a symbol operand this indicates that the immediate is 134d01d693c0b337cfcbf524a3a38c8123a6c5fe54eHans Wennborg /// the absolute address of the GOT entry with the negative thread-pointer 135d01d693c0b337cfcbf524a3a38c8123a6c5fe54eHans Wennborg /// offset for the symbol. Used in the non-PIC IA32 initial exec TLS access 136d01d693c0b337cfcbf524a3a38c8123a6c5fe54eHans Wennborg /// model. 1378c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// 1388c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// See 'ELF Handling for Thread-Local Storage' for more details. 1398c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// SYMBOL_LABEL @INDNTPOFF 1408c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MO_INDNTPOFF, 1418c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 1428c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// MO_TPOFF - On a symbol operand this indicates that the immediate is 143d01d693c0b337cfcbf524a3a38c8123a6c5fe54eHans Wennborg /// the thread-pointer offset for the symbol. Used in the x86-64 local 144d01d693c0b337cfcbf524a3a38c8123a6c5fe54eHans Wennborg /// exec TLS access model. 1458c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// 1468c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// See 'ELF Handling for Thread-Local Storage' for more details. 1478c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// SYMBOL_LABEL @TPOFF 1488c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MO_TPOFF, 1498c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 150f0234fcbc9be9798c10dedc3e3c134b7afbc6511Hans Wennborg /// MO_DTPOFF - On a symbol operand this indicates that the immediate is 151d01d693c0b337cfcbf524a3a38c8123a6c5fe54eHans Wennborg /// the offset of the GOT entry with the TLS offset of the symbol. Used 152d01d693c0b337cfcbf524a3a38c8123a6c5fe54eHans Wennborg /// in the local dynamic TLS access model. 153f0234fcbc9be9798c10dedc3e3c134b7afbc6511Hans Wennborg /// 154f0234fcbc9be9798c10dedc3e3c134b7afbc6511Hans Wennborg /// See 'ELF Handling for Thread-Local Storage' for more details. 155f0234fcbc9be9798c10dedc3e3c134b7afbc6511Hans Wennborg /// SYMBOL_LABEL @DTPOFF 156f0234fcbc9be9798c10dedc3e3c134b7afbc6511Hans Wennborg MO_DTPOFF, 157f0234fcbc9be9798c10dedc3e3c134b7afbc6511Hans Wennborg 1588c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// MO_NTPOFF - On a symbol operand this indicates that the immediate is 159d01d693c0b337cfcbf524a3a38c8123a6c5fe54eHans Wennborg /// the negative thread-pointer offset for the symbol. Used in the IA32 160d01d693c0b337cfcbf524a3a38c8123a6c5fe54eHans Wennborg /// local exec TLS access model. 1618c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// 1628c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// See 'ELF Handling for Thread-Local Storage' for more details. 1638c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// SYMBOL_LABEL @NTPOFF 1648c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MO_NTPOFF, 1658c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 166228756c744a1f877f7150c8fc91e074ff58c9d66Hans Wennborg /// MO_GOTNTPOFF - On a symbol operand this indicates that the immediate is 167d01d693c0b337cfcbf524a3a38c8123a6c5fe54eHans Wennborg /// the offset of the GOT entry with the negative thread-pointer offset for 168d01d693c0b337cfcbf524a3a38c8123a6c5fe54eHans Wennborg /// the symbol. Used in the PIC IA32 initial exec TLS access model. 169228756c744a1f877f7150c8fc91e074ff58c9d66Hans Wennborg /// 170228756c744a1f877f7150c8fc91e074ff58c9d66Hans Wennborg /// See 'ELF Handling for Thread-Local Storage' for more details. 171228756c744a1f877f7150c8fc91e074ff58c9d66Hans Wennborg /// SYMBOL_LABEL @GOTNTPOFF 172228756c744a1f877f7150c8fc91e074ff58c9d66Hans Wennborg MO_GOTNTPOFF, 173228756c744a1f877f7150c8fc91e074ff58c9d66Hans Wennborg 1748c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// MO_DLLIMPORT - On a symbol operand "FOO", this indicates that the 1758c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// reference is actually to the "__imp_FOO" symbol. This is used for 1768c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// dllimport linkage on windows. 1778c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MO_DLLIMPORT, 1788c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 1798c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// MO_DARWIN_STUB - On a symbol operand "FOO", this indicates that the 1808c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// reference is actually to the "FOO$stub" symbol. This is used for calls 1818c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// and jumps to external functions on Tiger and earlier. 1828c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MO_DARWIN_STUB, 1838c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 1848c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// MO_DARWIN_NONLAZY - On a symbol operand "FOO", this indicates that the 1858c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// reference is actually to the "FOO$non_lazy_ptr" symbol, which is a 1868c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// non-PIC-base-relative reference to a non-hidden dyld lazy pointer stub. 1878c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MO_DARWIN_NONLAZY, 1888c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 1898c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// MO_DARWIN_NONLAZY_PIC_BASE - On a symbol operand "FOO", this indicates 1908c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// that the reference is actually to "FOO$non_lazy_ptr - PICBASE", which is 1918c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// a PIC-base-relative reference to a non-hidden dyld lazy pointer stub. 1928c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MO_DARWIN_NONLAZY_PIC_BASE, 1938c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 1948c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE - On a symbol operand "FOO", this 1958c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// indicates that the reference is actually to "FOO$non_lazy_ptr -PICBASE", 1968c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// which is a PIC-base-relative reference to a hidden dyld lazy pointer 1978c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// stub. 1988c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE, 1998c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 2008c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// MO_TLVP - On a symbol operand this indicates that the immediate is 2018c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// some TLS offset. 2028c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// 2038c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// This is the TLS offset for the Darwin TLS mechanism. 2048c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MO_TLVP, 2058c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 2068c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// MO_TLVP_PIC_BASE - On a symbol operand this indicates that the immediate 2078c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// is some TLS offset from the picbase. 2088c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// 2098c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// This is the 32-bit TLS offset for Darwin TLS in PIC mode. 210d4a19b6a72d19a6f90b676aac37118664b7b7a84Anton Korobeynikov MO_TLVP_PIC_BASE, 211d4a19b6a72d19a6f90b676aac37118664b7b7a84Anton Korobeynikov 212d4a19b6a72d19a6f90b676aac37118664b7b7a84Anton Korobeynikov /// MO_SECREL - On a symbol operand this indicates that the immediate is 213d4a19b6a72d19a6f90b676aac37118664b7b7a84Anton Korobeynikov /// the offset from beginning of section. 214d4a19b6a72d19a6f90b676aac37118664b7b7a84Anton Korobeynikov /// 215d4a19b6a72d19a6f90b676aac37118664b7b7a84Anton Korobeynikov /// This is the TLS offset for the COFF/Windows TLS mechanism. 216d4a19b6a72d19a6f90b676aac37118664b7b7a84Anton Korobeynikov MO_SECREL 2178c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng }; 2188c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 2198c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng enum { 2208c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng //===------------------------------------------------------------------===// 2218c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // Instruction encodings. These are the standard/most common forms for X86 2228c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // instructions. 2238c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // 2248c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 2258c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // PseudoFrm - This represents an instruction that is a pseudo instruction 2268c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // or one that has not been implemented yet. It is illegal to code generate 2278c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // it, but tolerated for intermediate implementation stages. 2288c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng Pseudo = 0, 2298c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 2308c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// Raw - This form is for instructions that don't have any operands, so 2318c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// they are just a fixed opcode value, like 'leave'. 2328c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng RawFrm = 1, 2338c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 2348c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// AddRegFrm - This form is used for instructions like 'push r32' that have 2358c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// their one register operand added to their opcode. 2368c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng AddRegFrm = 2, 2378c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 2388c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// MRMDestReg - This form is used for instructions that use the Mod/RM byte 2398c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// to specify a destination, which in this case is a register. 2408c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// 2418c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MRMDestReg = 3, 2428c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 2438c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// MRMDestMem - This form is used for instructions that use the Mod/RM byte 2448c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// to specify a destination, which in this case is memory. 2458c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// 2468c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MRMDestMem = 4, 2478c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 2488c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// MRMSrcReg - This form is used for instructions that use the Mod/RM byte 2498c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// to specify a source, which in this case is a register. 2508c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// 2518c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MRMSrcReg = 5, 2528c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 2538c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// MRMSrcMem - This form is used for instructions that use the Mod/RM byte 2548c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// to specify a source, which in this case is memory. 2558c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// 2568c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MRMSrcMem = 6, 2578c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 2588c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// MRM[0-7][rm] - These forms are used to represent instructions that use 2598c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// a Mod/RM byte, and use the middle field to hold extended opcode 2608c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// information. In the intel manual these are represented as /0, /1, ... 2618c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// 2628c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 2638c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // First, instructions that operate on a register r/m operand... 2648c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MRM0r = 16, MRM1r = 17, MRM2r = 18, MRM3r = 19, // Format /0 /1 /2 /3 2658c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MRM4r = 20, MRM5r = 21, MRM6r = 22, MRM7r = 23, // Format /4 /5 /6 /7 2668c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 2678c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // Next, instructions that operate on a memory r/m operand... 2688c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MRM0m = 24, MRM1m = 25, MRM2m = 26, MRM3m = 27, // Format /0 /1 /2 /3 2698c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MRM4m = 28, MRM5m = 29, MRM6m = 30, MRM7m = 31, // Format /4 /5 /6 /7 2708c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 2718c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // MRMInitReg - This form is used for instructions whose source and 2728c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // destinations are the same register. 2738c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng MRMInitReg = 32, 2748c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 2759e3d0b335111b2df73984a6cfd9ef1cd5d323872Craig Topper //// MRM_XX - A mod/rm byte of exactly 0xXX. 2769e3d0b335111b2df73984a6cfd9ef1cd5d323872Craig Topper MRM_C1 = 33, MRM_C2 = 34, MRM_C3 = 35, MRM_C4 = 36, 2779e3d0b335111b2df73984a6cfd9ef1cd5d323872Craig Topper MRM_C8 = 37, MRM_C9 = 38, MRM_E8 = 39, MRM_F0 = 40, 2789e3d0b335111b2df73984a6cfd9ef1cd5d323872Craig Topper MRM_F8 = 41, MRM_F9 = 42, MRM_D0 = 45, MRM_D1 = 46, 279be02a90de17f857ba65bbd8a11653ca1bad30adcMichael Liao MRM_D4 = 47, MRM_D5 = 48, MRM_D8 = 49, MRM_D9 = 50, 280be02a90de17f857ba65bbd8a11653ca1bad30adcMichael Liao MRM_DA = 51, MRM_DB = 52, MRM_DC = 53, MRM_DD = 54, 281be02a90de17f857ba65bbd8a11653ca1bad30adcMichael Liao MRM_DE = 55, MRM_DF = 56, 2828c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 2838c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// RawFrmImm8 - This is used for the ENTER instruction, which has two 2848c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// immediates, the first of which is a 16-bit immediate (specified by 2858c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// the imm encoding) and the second is a 8-bit fixed value. 2868c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng RawFrmImm8 = 43, 2878c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 2888c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// RawFrmImm16 - This is used for CALL FAR instructions, which have two 2898c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// immediates, the first of which is a 16 or 32-bit immediate (specified by 2908c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// the imm encoding) and the second is a 16-bit fixed value. In the AMD 2918c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// manual, this operand is described as pntr16:32 and pntr16:16 2928c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng RawFrmImm16 = 44, 2938c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 2948c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng FormMask = 63, 2958c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 2968c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng //===------------------------------------------------------------------===// 2978c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // Actual flags... 2988c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 2998c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // OpSize - Set if this instruction requires an operand size prefix (0x66), 3008c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // which most often indicates that the instruction operates on 16 bit data 3018c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // instead of 32 bit data. 3028c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng OpSize = 1 << 6, 3038c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 3048c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // AsSize - Set if this instruction requires an operand size prefix (0x67), 3058c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // which most often indicates that the instruction address 16 bit address 3068c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // instead of 32 bit address (or 32 bit address in 64 bit mode). 3078c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng AdSize = 1 << 7, 3088c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 3098c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng //===------------------------------------------------------------------===// 3108c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // Op0Mask - There are several prefix bytes that are used to form two byte 3118c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // opcodes. These are currently 0x0F, 0xF3, and 0xD8-0xDF. This mask is 3128c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // used to obtain the setting of this field. If no bits in this field is 3138c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // set, there is no prefix byte for obtaining a multibyte opcode. 3148c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // 3158c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng Op0Shift = 8, 3168c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng Op0Mask = 0x1F << Op0Shift, 3178c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 3188c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // TB - TwoByte - Set if this instruction has a two byte opcode, which 3198c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // starts with a 0x0F byte before the real opcode. 3208c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng TB = 1 << Op0Shift, 3218c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 3228c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // REP - The 0xF3 prefix byte indicating repetition of the following 3238c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // instruction. 3248c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng REP = 2 << Op0Shift, 3258c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 3268c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // D8-DF - These escape opcodes are used by the floating point unit. These 3278c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // values must remain sequential. 3288c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng D8 = 3 << Op0Shift, D9 = 4 << Op0Shift, 3298c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng DA = 5 << Op0Shift, DB = 6 << Op0Shift, 3308c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng DC = 7 << Op0Shift, DD = 8 << Op0Shift, 3318c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng DE = 9 << Op0Shift, DF = 10 << Op0Shift, 3328c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 3338c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // XS, XD - These prefix codes are for single and double precision scalar 3348c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // floating point operations performed in the SSE registers. 3358c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng XD = 11 << Op0Shift, XS = 12 << Op0Shift, 3368c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 3378c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // T8, TA, A6, A7 - Prefix after the 0x0F prefix. 3388c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng T8 = 13 << Op0Shift, TA = 14 << Op0Shift, 3398c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng A6 = 15 << Op0Shift, A7 = 16 << Op0Shift, 3408c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 341ee62e4f6d192ee31d1ad9dd0ba0c41db6663d3c7Craig Topper // T8XD - Prefix before and after 0x0F. Combination of T8 and XD. 342ee62e4f6d192ee31d1ad9dd0ba0c41db6663d3c7Craig Topper T8XD = 17 << Op0Shift, 343ee62e4f6d192ee31d1ad9dd0ba0c41db6663d3c7Craig Topper 344ee62e4f6d192ee31d1ad9dd0ba0c41db6663d3c7Craig Topper // T8XS - Prefix before and after 0x0F. Combination of T8 and XS. 345ee62e4f6d192ee31d1ad9dd0ba0c41db6663d3c7Craig Topper T8XS = 18 << Op0Shift, 3468c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 34775485d6746f8b5b23c17cf6d2364e7e1e0705992Craig Topper // TAXD - Prefix before and after 0x0F. Combination of TA and XD. 34875485d6746f8b5b23c17cf6d2364e7e1e0705992Craig Topper TAXD = 19 << Op0Shift, 34975485d6746f8b5b23c17cf6d2364e7e1e0705992Craig Topper 350ebebe35d1c5ad689caf31cdc4da5b7a9539ffa5cJan Sjödin // XOP8 - Prefix to include use of imm byte. 351ebebe35d1c5ad689caf31cdc4da5b7a9539ffa5cJan Sjödin XOP8 = 20 << Op0Shift, 352ebebe35d1c5ad689caf31cdc4da5b7a9539ffa5cJan Sjödin 353ebebe35d1c5ad689caf31cdc4da5b7a9539ffa5cJan Sjödin // XOP9 - Prefix to exclude use of imm byte. 354ebebe35d1c5ad689caf31cdc4da5b7a9539ffa5cJan Sjödin XOP9 = 21 << Op0Shift, 355ebebe35d1c5ad689caf31cdc4da5b7a9539ffa5cJan Sjödin 3568c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng //===------------------------------------------------------------------===// 3578c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // REX_W - REX prefixes are instruction prefixes used in 64-bit mode. 3588c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // They are used to specify GPRs and SSE registers, 64-bit operand size, 3598c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // etc. We only cares about REX.W and REX.R bits and only the former is 3608c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // statically determined. 3618c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // 3628c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng REXShift = Op0Shift + 5, 3638c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng REX_W = 1 << REXShift, 3648c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 3658c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng //===------------------------------------------------------------------===// 3668c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // This three-bit field describes the size of an immediate operand. Zero is 3678c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // unused so that we can tell if we forgot to set a value. 3688c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng ImmShift = REXShift + 1, 3698c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng ImmMask = 7 << ImmShift, 3708c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng Imm8 = 1 << ImmShift, 3718c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng Imm8PCRel = 2 << ImmShift, 3728c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng Imm16 = 3 << ImmShift, 3738c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng Imm16PCRel = 4 << ImmShift, 3748c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng Imm32 = 5 << ImmShift, 3758c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng Imm32PCRel = 6 << ImmShift, 3768c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng Imm64 = 7 << ImmShift, 3778c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 3788c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng //===------------------------------------------------------------------===// 3798c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // FP Instruction Classification... Zero is non-fp instruction. 3808c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 3818c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // FPTypeMask - Mask for all of the FP types... 3828c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng FPTypeShift = ImmShift + 3, 3838c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng FPTypeMask = 7 << FPTypeShift, 3848c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 3858c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // NotFP - The default, set for instructions that do not use FP registers. 3868c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng NotFP = 0 << FPTypeShift, 3878c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 3888c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // ZeroArgFP - 0 arg FP instruction which implicitly pushes ST(0), f.e. fld0 3898c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng ZeroArgFP = 1 << FPTypeShift, 3908c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 3918c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // OneArgFP - 1 arg FP instructions which implicitly read ST(0), such as fst 3928c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng OneArgFP = 2 << FPTypeShift, 3938c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 3948c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // OneArgFPRW - 1 arg FP instruction which implicitly read ST(0) and write a 3958c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // result back to ST(0). For example, fcos, fsqrt, etc. 3968c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // 3978c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng OneArgFPRW = 3 << FPTypeShift, 3988c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 3998c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // TwoArgFP - 2 arg FP instructions which implicitly read ST(0), and an 4008c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // explicit argument, storing the result to either ST(0) or the implicit 4018c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // argument. For example: fadd, fsub, fmul, etc... 4028c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng TwoArgFP = 4 << FPTypeShift, 4038c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 4048c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // CompareFP - 2 arg FP instructions which implicitly read ST(0) and an 4058c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // explicit argument, but have no destination. Example: fucom, fucomi, ... 4068c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng CompareFP = 5 << FPTypeShift, 4078c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 4088c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // CondMovFP - "2 operand" floating point conditional move instructions. 4098c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng CondMovFP = 6 << FPTypeShift, 4108c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 4118c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // SpecialFP - Special instruction forms. Dispatch by opcode explicitly. 4128c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng SpecialFP = 7 << FPTypeShift, 4138c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 4148c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // Lock prefix 4158c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng LOCKShift = FPTypeShift + 3, 4168c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng LOCK = 1 << LOCKShift, 4178c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 4188c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // Segment override prefixes. Currently we just need ability to address 4198c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // stuff in gs and fs segments. 4208c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng SegOvrShift = LOCKShift + 1, 4218c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng SegOvrMask = 3 << SegOvrShift, 4228c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng FS = 1 << SegOvrShift, 4238c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng GS = 2 << SegOvrShift, 4248c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 4258c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // Execution domain for SSE instructions in bits 23, 24. 4268c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // 0 in bits 23-24 means normal, non-SSE instruction. 4278c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng SSEDomainShift = SegOvrShift + 2, 4288c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 4298c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng OpcodeShift = SSEDomainShift + 2, 4308c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 4318c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng //===------------------------------------------------------------------===// 4328c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// VEX - The opcode prefix used by AVX instructions 4338c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng VEXShift = OpcodeShift + 8, 4348c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng VEX = 1U << 0, 4358c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 4368c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// VEX_W - Has a opcode specific functionality, but is used in the same 4378c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// way as REX_W is for regular SSE instructions. 4388c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng VEX_W = 1U << 1, 4398c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 4408c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// VEX_4V - Used to specify an additional AVX/SSE register. Several 2 4418c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// address instructions in SSE are represented as 3 address ones in AVX 4428c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// and the additional register is encoded in VEX_VVVV prefix. 4438c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng VEX_4V = 1U << 2, 4448c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 445b53fa8bf19a51f0c49a9f8b6ede3e2ff3bdfb961Craig Topper /// VEX_4VOp3 - Similar to VEX_4V, but used on instructions that encode 446b53fa8bf19a51f0c49a9f8b6ede3e2ff3bdfb961Craig Topper /// operand 3 with VEX.vvvv. 447b53fa8bf19a51f0c49a9f8b6ede3e2ff3bdfb961Craig Topper VEX_4VOp3 = 1U << 3, 448b53fa8bf19a51f0c49a9f8b6ede3e2ff3bdfb961Craig Topper 4498c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// VEX_I8IMM - Specifies that the last register used in a AVX instruction, 4508c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// must be encoded in the i8 immediate field. This usually happens in 4518c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// instructions with 4 operands. 452b53fa8bf19a51f0c49a9f8b6ede3e2ff3bdfb961Craig Topper VEX_I8IMM = 1U << 4, 4538c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 4548c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// VEX_L - Stands for a bit in the VEX opcode prefix meaning the current 4558c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// instruction uses 256-bit wide registers. This is usually auto detected 4568c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// if a VR256 register is used, but some AVX instructions also have this 4578c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// field marked when using a f256 memory references. 458b53fa8bf19a51f0c49a9f8b6ede3e2ff3bdfb961Craig Topper VEX_L = 1U << 5, 4598c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 4606744a17dcfb941d9fdd869b9f06e20660e18ff88Craig Topper // VEX_LIG - Specifies that this instruction ignores the L-bit in the VEX 4616744a17dcfb941d9fdd869b9f06e20660e18ff88Craig Topper // prefix. Usually used for scalar instructions. Needed by disassembler. 462b53fa8bf19a51f0c49a9f8b6ede3e2ff3bdfb961Craig Topper VEX_LIG = 1U << 6, 4636744a17dcfb941d9fdd869b9f06e20660e18ff88Craig Topper 4648c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// Has3DNow0F0FOpcode - This flag indicates that the instruction uses the 4658c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// wacky 0x0F 0x0F prefix for 3DNow! instructions. The manual documents 4668c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// this as having a 0x0F prefix with a 0x0F opcode, and each instruction 4678c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// storing a classifier in the imm8 field. To simplify our implementation, 4688c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// we handle this by storeing the classifier in the opcode field and using 4698c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// this flag to indicate that the encoder should do the wacky 3DNow! thing. 4701b9b377975b3f437acef8c2ba90de582add52f65Bruno Cardoso Lopes Has3DNow0F0FOpcode = 1U << 7, 4711b9b377975b3f437acef8c2ba90de582add52f65Bruno Cardoso Lopes 4725d1a38cbfac62f75ee22cc0c9195616ea5fe5553Craig Topper /// MemOp4 - Used to indicate swapping of operand 3 and 4 to be encoded in 4735d1a38cbfac62f75ee22cc0c9195616ea5fe5553Craig Topper /// ModRM or I8IMM. This is used for FMA4 and XOP instructions. 4745d1a38cbfac62f75ee22cc0c9195616ea5fe5553Craig Topper MemOp4 = 1U << 8, 475ebebe35d1c5ad689caf31cdc4da5b7a9539ffa5cJan Sjödin 476ebebe35d1c5ad689caf31cdc4da5b7a9539ffa5cJan Sjödin /// XOP - Opcode prefix used by XOP instructions. 477ebebe35d1c5ad689caf31cdc4da5b7a9539ffa5cJan Sjödin XOP = 1U << 9 478ebebe35d1c5ad689caf31cdc4da5b7a9539ffa5cJan Sjödin 4798c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng }; 4808c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 4818c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // getBaseOpcodeFor - This function returns the "base" X86 opcode for the 4828c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // specified machine instruction. 4838c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // 484305b515c2787f47adecbe120e4b4bef55c5e5525Chandler Carruth inline unsigned char getBaseOpcodeFor(uint64_t TSFlags) { 4858c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng return TSFlags >> X86II::OpcodeShift; 4868c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng } 4878c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 488305b515c2787f47adecbe120e4b4bef55c5e5525Chandler Carruth inline bool hasImm(uint64_t TSFlags) { 4898c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng return (TSFlags & X86II::ImmMask) != 0; 4908c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng } 4918c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 4928c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// getSizeOfImm - Decode the "size of immediate" field from the TSFlags field 4938c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// of the specified instruction. 494305b515c2787f47adecbe120e4b4bef55c5e5525Chandler Carruth inline unsigned getSizeOfImm(uint64_t TSFlags) { 4958c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng switch (TSFlags & X86II::ImmMask) { 4966d1263acb9704b38a8d90fd6ce94f49193cd4ddeCraig Topper default: llvm_unreachable("Unknown immediate size"); 4978c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::Imm8: 4988c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::Imm8PCRel: return 1; 4998c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::Imm16: 5008c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::Imm16PCRel: return 2; 5018c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::Imm32: 5028c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::Imm32PCRel: return 4; 5038c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::Imm64: return 8; 5048c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng } 5058c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng } 5068c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 5078c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// isImmPCRel - Return true if the immediate of the specified instruction's 5088c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// TSFlags indicates that it is pc relative. 509305b515c2787f47adecbe120e4b4bef55c5e5525Chandler Carruth inline unsigned isImmPCRel(uint64_t TSFlags) { 5108c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng switch (TSFlags & X86II::ImmMask) { 5116d1263acb9704b38a8d90fd6ce94f49193cd4ddeCraig Topper default: llvm_unreachable("Unknown immediate size"); 5128c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::Imm8PCRel: 5138c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::Imm16PCRel: 5148c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::Imm32PCRel: 5158c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng return true; 5168c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::Imm8: 5178c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::Imm16: 5188c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::Imm32: 5198c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::Imm64: 5208c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng return false; 5218c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng } 5228c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng } 5238c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 5248c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// getMemoryOperandNo - The function returns the MCInst operand # for the 5258c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// first field of the memory operand. If the instruction doesn't have a 5268c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// memory operand, this returns -1. 5278c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// 5288c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// Note that this ignores tied operands. If there is a tied register which 5298c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// is duplicated in the MCInst (e.g. "EAX = addl EAX, [mem]") it is only 5308c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// counted as one operand. 5318c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// 532305b515c2787f47adecbe120e4b4bef55c5e5525Chandler Carruth inline int getMemoryOperandNo(uint64_t TSFlags, unsigned Opcode) { 5338c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng switch (TSFlags & X86II::FormMask) { 5346942f706aad24c45b55d30256250e4ae472b3b07Pete Cooper case X86II::MRMInitReg: 5356942f706aad24c45b55d30256250e4ae472b3b07Pete Cooper // FIXME: Remove this form. 5366942f706aad24c45b55d30256250e4ae472b3b07Pete Cooper return -1; 5376d1263acb9704b38a8d90fd6ce94f49193cd4ddeCraig Topper default: llvm_unreachable("Unknown FormMask value in getMemoryOperandNo!"); 5388c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::Pseudo: 5398c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::RawFrm: 5408c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::AddRegFrm: 5418c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::MRMDestReg: 5428c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::MRMSrcReg: 5438c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::RawFrmImm8: 5448c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::RawFrmImm16: 5458c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng return -1; 5468c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::MRMDestMem: 5478c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng return 0; 5488c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::MRMSrcMem: { 5498c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng bool HasVEX_4V = (TSFlags >> X86II::VEXShift) & X86II::VEX_4V; 5505d1a38cbfac62f75ee22cc0c9195616ea5fe5553Craig Topper bool HasMemOp4 = (TSFlags >> X86II::VEXShift) & X86II::MemOp4; 5518c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng unsigned FirstMemOp = 1; 552b53fa8bf19a51f0c49a9f8b6ede3e2ff3bdfb961Craig Topper if (HasVEX_4V) 5538c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng ++FirstMemOp;// Skip the register source (which is encoded in VEX_VVVV). 5545d1a38cbfac62f75ee22cc0c9195616ea5fe5553Craig Topper if (HasMemOp4) 5551b9b377975b3f437acef8c2ba90de582add52f65Bruno Cardoso Lopes ++FirstMemOp;// Skip the register source (which is encoded in I8IMM). 5568c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 5578c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // FIXME: Maybe lea should have its own form? This is a horrible hack. 5588c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng //if (Opcode == X86::LEA64r || Opcode == X86::LEA64_32r || 5598c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng // Opcode == X86::LEA16r || Opcode == X86::LEA32r) 5608c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng return FirstMemOp; 5618c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng } 5628c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::MRM0r: case X86II::MRM1r: 5638c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::MRM2r: case X86II::MRM3r: 5648c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::MRM4r: case X86II::MRM5r: 5658c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::MRM6r: case X86II::MRM7r: 5668c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng return -1; 5678c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::MRM0m: case X86II::MRM1m: 5688c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::MRM2m: case X86II::MRM3m: 5698c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86II::MRM4m: case X86II::MRM5m: 570566f233ba64c0bb2773b5717cb18753c7564f4b7Craig Topper case X86II::MRM6m: case X86II::MRM7m: { 571566f233ba64c0bb2773b5717cb18753c7564f4b7Craig Topper bool HasVEX_4V = (TSFlags >> X86II::VEXShift) & X86II::VEX_4V; 572566f233ba64c0bb2773b5717cb18753c7564f4b7Craig Topper unsigned FirstMemOp = 0; 573566f233ba64c0bb2773b5717cb18753c7564f4b7Craig Topper if (HasVEX_4V) 574566f233ba64c0bb2773b5717cb18753c7564f4b7Craig Topper ++FirstMemOp;// Skip the register dest (which is encoded in VEX_VVVV). 575566f233ba64c0bb2773b5717cb18753c7564f4b7Craig Topper return FirstMemOp; 576566f233ba64c0bb2773b5717cb18753c7564f4b7Craig Topper } 5779e3d0b335111b2df73984a6cfd9ef1cd5d323872Craig Topper case X86II::MRM_C1: case X86II::MRM_C2: 5789e3d0b335111b2df73984a6cfd9ef1cd5d323872Craig Topper case X86II::MRM_C3: case X86II::MRM_C4: 5799e3d0b335111b2df73984a6cfd9ef1cd5d323872Craig Topper case X86II::MRM_C8: case X86II::MRM_C9: 5809e3d0b335111b2df73984a6cfd9ef1cd5d323872Craig Topper case X86II::MRM_E8: case X86II::MRM_F0: 5819e3d0b335111b2df73984a6cfd9ef1cd5d323872Craig Topper case X86II::MRM_F8: case X86II::MRM_F9: 5829e3d0b335111b2df73984a6cfd9ef1cd5d323872Craig Topper case X86II::MRM_D0: case X86II::MRM_D1: 583be02a90de17f857ba65bbd8a11653ca1bad30adcMichael Liao case X86II::MRM_D4: case X86II::MRM_D5: 584be02a90de17f857ba65bbd8a11653ca1bad30adcMichael Liao case X86II::MRM_D8: case X86II::MRM_D9: 585be02a90de17f857ba65bbd8a11653ca1bad30adcMichael Liao case X86II::MRM_DA: case X86II::MRM_DB: 586be02a90de17f857ba65bbd8a11653ca1bad30adcMichael Liao case X86II::MRM_DC: case X86II::MRM_DD: 587be02a90de17f857ba65bbd8a11653ca1bad30adcMichael Liao case X86II::MRM_DE: case X86II::MRM_DF: 5888c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng return -1; 5898c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng } 5908c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng } 5918c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 5928c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// isX86_64ExtendedReg - Is the MachineOperand a x86-64 extended (r8 or 5938c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng /// higher) register? e.g. r8, xmm8, xmm13, etc. 594305b515c2787f47adecbe120e4b4bef55c5e5525Chandler Carruth inline bool isX86_64ExtendedReg(unsigned RegNo) { 5958c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng switch (RegNo) { 5968c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng default: break; 5978c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86::R8: case X86::R9: case X86::R10: case X86::R11: 5988c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86::R12: case X86::R13: case X86::R14: case X86::R15: 5998c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86::R8D: case X86::R9D: case X86::R10D: case X86::R11D: 6008c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86::R12D: case X86::R13D: case X86::R14D: case X86::R15D: 6018c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86::R8W: case X86::R9W: case X86::R10W: case X86::R11W: 6028c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86::R12W: case X86::R13W: case X86::R14W: case X86::R15W: 6038c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86::R8B: case X86::R9B: case X86::R10B: case X86::R11B: 6048c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86::R12B: case X86::R13B: case X86::R14B: case X86::R15B: 6058c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86::XMM8: case X86::XMM9: case X86::XMM10: case X86::XMM11: 6068c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86::XMM12: case X86::XMM13: case X86::XMM14: case X86::XMM15: 6078c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86::YMM8: case X86::YMM9: case X86::YMM10: case X86::YMM11: 6088c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86::YMM12: case X86::YMM13: case X86::YMM14: case X86::YMM15: 6098c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86::CR8: case X86::CR9: case X86::CR10: case X86::CR11: 6108c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng case X86::CR12: case X86::CR13: case X86::CR14: case X86::CR15: 6118c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng return true; 6128c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng } 6138c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng return false; 6148c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng } 6158c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 616305b515c2787f47adecbe120e4b4bef55c5e5525Chandler Carruth inline bool isX86_64NonExtLowByteReg(unsigned reg) { 6178c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng return (reg == X86::SPL || reg == X86::BPL || 6188c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng reg == X86::SIL || reg == X86::DIL); 6198c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng } 6208c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng} 6218c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 6228c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng} // end namespace llvm; 6238c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng 6248c3fee59038d8fd98db2a01b6a309a8941a16a3fEvan Cheng#endif 625