| 87773c318fcee853fb34a80a10c4347d523bdafb |
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01-Aug-2013 |
Tim Northover <tnorthover@apple.com> |
AArch64: add initial NEON support
Patch by Ana Pazos.
- Completed implementation of instruction formats:
AdvSIMD three same
AdvSIMD modified immediate
AdvSIMD scalar pairwise
- Completed implementation of instruction classes
(some of the instructions in these classes
belong to yet unfinished instruction formats):
Vector Arithmetic
Vector Immediate
Vector Pairwise Arithmetic
- Initial implementation of instruction formats:
AdvSIMD scalar two-reg misc
AdvSIMD scalar three same
- Intial implementation of instruction class:
Scalar Arithmetic
- Initial clang changes to support arm v8 intrinsics.
Note: no clang changes for scalar intrinsics function name mangling yet.
- Comprehensive test cases for added instructions
To verify auto codegen, encoding, decoding, diagnosis, intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187567 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
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| 8be527901ac87d49f7b0b56c96dbc6dadabb5069 |
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05-Jul-2013 |
Rafael Espindola <rafael.espindola@gmail.com> |
Use a OwningPtr instead of a manual delete.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185673 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
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| 2c8ce86e7aae23f9d86cdf4e6027f9703c13ee7f |
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04-Jul-2013 |
Rafael Espindola <rafael.espindola@gmail.com> |
Fix leak. Should bring back the valgrind bot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185663 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
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| 49a6a8d8f2994249c81b7914b07015714748a55c |
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24-May-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
Remove the Copied parameter from MemoryObject::readBytes.
There was exactly one caller using this API right, the others were relying on
specific behavior of the default implementation. Since it's too hard to use it
right just remove it and standardize on the default behavior.
Defines away PR16132.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182636 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
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| 54a1cf75d2b32cd96ec78f61af5c1bed8d81524d |
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28-Feb-2013 |
Tim Northover <Tim.Northover@arm.com> |
AArch64: remove post-encoder method from FCMP (immediate) instructions.
The work done by the post-encoder (setting architecturally unused bits to 0 as
required) can be done by the existing operand that covers the "#0.0". This
removes at least one use of the discouraged PostEncoderMethod uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176261 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
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| 5bd6cb2dabf3fea9cb9fa0b275fbc7ceb85ba970 |
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14-Feb-2013 |
Tim Northover <Tim.Northover@arm.com> |
AArch64: add block comments where missing
Only comments affected. No code change at all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175169 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
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| dfe076af9879eb68a7b8331f9c02eecf563d85be |
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05-Feb-2013 |
Tim Northover <Tim.Northover@arm.com> |
Fix formatting in AArch64 backend.
This should fix three purely whitespace issues:
+ 80 column violations.
+ Tab characters.
+ TableGen brace placement.
No functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174370 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
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| 19254c49a8752fe8c6fa648a6eb29f20a1f62c8b |
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05-Feb-2013 |
Tim Northover <Tim.Northover@arm.com> |
Remove cyclic dependency in AArch64 libraries
This moves the bit twiddling and string fiddling functions required by other
parts of the backend into a separate library. Previously they resided in
AArch64Desc, which created a circular dependency between various components.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174369 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
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| 84d3239889c576029382c3165495e0c78b14e9eb |
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01-Feb-2013 |
Tim Northover <Tim.Northover@arm.com> |
Remove currently unused register decoder from AArch64.
This should fix a warning when building this backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174177 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
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| 72062f5744557e270a38192554c3126ea5f97434 |
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31-Jan-2013 |
Tim Northover <Tim.Northover@arm.com> |
Add AArch64 as an experimental target.
This patch adds support for AArch64 (ARM's 64-bit architecture) to
LLVM in the "experimental" category. Currently, it won't be built
unless requested explicitly.
This initial commit should have support for:
+ Assembly of all scalar (i.e. non-NEON, non-Crypto) instructions
(except the late addition CRC instructions).
+ CodeGen features required for C++03 and C99.
+ Compilation for the "small" memory model: code+static data <
4GB.
+ Absolute and position-independent code.
+ GNU-style (i.e. "__thread") TLS.
+ Debugging information.
The principal omission, currently, is performance tuning.
This patch excludes the NEON support also reviewed due to an outbreak of
batshit insanity in our legal department. That will be committed soon bringing
the changes to precisely what has been approved.
Further reviews would be gratefully received.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174054 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
|