| 1858786285139b87961d9ca08de91dcd59364afb |
|
07-Aug-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Rename register classes CPURegs and CPU64Regs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187832 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
|
| 5e795097b081390a7172beeffad7e65c5150214f |
|
02-Aug-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Expand vector truncating stores and extending loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187667 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
|
| 9a308df027b60057d0fe3ba7a3ee9648f6677879 |
|
26-Jun-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Improve code generation for constant multiplication using shifts, adds and
subs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185011 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
|
| ac6d9bec671252dd1e596fa71180ff6b39d06b5d |
|
25-May-2013 |
Andrew Trick <atrick@apple.com> |
Track IR ordering of SelectionDAG nodes 2/4.
Change SelectionDAG::getXXXNode() interfaces as well as call sites of
these functions to pass in SDLoc instead of DebugLoc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182703 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
|
| cd6c57917db22a3913a2cdbadfa79fed3547bdec |
|
01-May-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Instruction selection patterns for DSP-ASE vector select and compare
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180820 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
|
| e311b00a912b9f1a1e8fc1d28b2e58a015d250ec |
|
23-Apr-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Compare splat value with element size instead of calling isUIntN.
No intended changes in functionality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180130 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
|
| b109ea8245e2948ea6d06a6e6cbab7c6788da211 |
|
22-Apr-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
80 columns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180040 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
|
| d597263b9442923bacc24f26a8510fb69f992864 |
|
22-Apr-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] In performDSPShiftCombine, check that all elements in the vector are
shifted by the same amount and the shift amount is smaller than the element
size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180039 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
|
| 6265d5c91a18b2fb6499eb581c488315880c044d |
|
20-Apr-2013 |
Tim Northover <Tim.Northover@arm.com> |
Remove unused MEMBARRIER DAG node; it's been replaced by ATOMIC_FENCE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179939 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
|
| 97a62bf2a4a2d141aad8af3531c3b69934f134c1 |
|
20-Apr-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Instruction selection patterns for DSP-ASE vector shifts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179906 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
|
| 4e0980af2e9eda80cbd82895167e650d83ffe087 |
|
13-Apr-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Move MipsTargetLowering::lowerINTRINSIC_W_CHAIN and
lowerINTRINSIC_WO_CHAIN into MipsSETargetLowering.
No functionality changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179444 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
|
| 3d60241c3e86973be281660bc5971c3a46cfdc47 |
|
13-Apr-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Reapply r179420 and r179421.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179434 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
|
| d35d5bdfc41ff401f938e49e844d707462405428 |
|
13-Apr-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
Revert r179420 and r179421.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179422 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
|
| 9367b8d4f254d9e5cccb15334cc1a969c5be0d31 |
|
13-Apr-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] v4i8 and v2i16 add, sub and mul instruction selection patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179420 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
|
| fc82e4db13b46b2f14f5895d2a0b33524d55d06a |
|
11-Apr-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Custom-lower i64 MULHS and MULHU nodes. Remove the code which selects
multiply instructions in MipsSEDAGToDAGISel.
This patch was supposed to be part of r178403.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179314 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
|
| a430cb613b6e93c05f128b04323c57acfd08686d |
|
09-Apr-2013 |
Reed Kotler <rkotler@mips.com> |
This patch enables llvm to switch between compiling for mips32/mips64
and mips16 on a per function basis.
Because this patch is somewhat involved I have provide an overview of the
key pieces of it.
The patch is written so as to not change the behavior of the non mixed
mode. We have tested this a lot but it is something new to switch subtargets
so we don't want any chance of regression in the mainline compiler until
we have more confidence in this.
Mips32/64 are very different from Mip16 as is the case of ARM vs Thumb1.
For that reason there are derived versions of the register info, frame info,
instruction info and instruction selection classes.
Now we register three separate passes for instruction selection.
One which is used to switch subtargets (MipsModuleISelDAGToDAG.cpp) and then
one for each of the current subtargets (Mips16ISelDAGToDAG.cpp and
MipsSEISelDAGToDAG.cpp).
When the ModuleISel pass runs, it determines if there is a need to switch
subtargets and if so, the owning pointers in MipsTargetMachine are
appropriately changed.
When 16Isel or SEIsel is run, they will return immediately without doing
any work if the current subtarget mode does not apply to them.
In addition, MipsAsmPrinter needs to be reset on a function basis.
The pass BasicTargetTransformInfo is substituted with a null pass since the
pass is immutable and really needs to be a function pass for it to be
used with changing subtargets. This will be fixed in a follow on patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179118 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
|
| 7e287bfb58e63c4e1068e49e8e1b714f3b9703bc |
|
30-Mar-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
Remove unused variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178405 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
|
| d593a77b4cf3b81cd657e351e47cad25ee037ce1 |
|
30-Mar-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Move the code which does dag-combine for multiply-add/sub nodes to
derived class MipsSETargetLowering.
We shouldn't be generating madd/msub nodes if target is Mips16, since Mips16
doesn't have support for multipy-add/sub instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178404 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
|
| f5926fd844a84adcf1ae4f193146f2877997b82c |
|
30-Mar-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Fix definitions of multiply, multiply-add/sub and divide instructions.
The new instructions have explicit register output operands and use table-gen
patterns instead of C++ code to do instruction selection.
Mips16's instructions are unaffected by this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178403 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
|
| 042b79625f315da6378d06b5480b15894d6b06b1 |
|
14-Mar-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Fix filename in comment and delete unnecessary lines of code.
No functionality changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177104 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
|
| 5ac065a79767cc112eba63136183b7103765d0d3 |
|
13-Mar-2013 |
Akira Hatanaka <ahatanaka@mips.com> |
[mips] Define two subclasses of MipsTargetLowering. Mips16TargetLowering is for
mips16 and MipsSETargetLowering is for mips32/64.
No functionality changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176917 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
|