e3809eed34f000581a464689596eefde2a6d1f24 |
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24-Jul-2013 |
Elena Demikhovsky <elena.demikhovsky@intel.com> |
I'm starting to commit KNL backend. I'll push patches one-by-one. This patch includes support for the extended register set XMM16-31, YMM16-31, ZMM0-31. The full ISA you can see here: http://software.intel.com/en-us/intel-isa-extensions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187030 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86VZeroUpper.cpp
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d29804f80d1cc26ea552b58693ce883f5b13de7a |
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13-Feb-2013 |
Elena Demikhovsky <elena.demikhovsky@intel.com> |
Prevent insertion of "vzeroupper" before call that preserves YMM registers, since a caller uses preserved registers across the call. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175043 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86VZeroUpper.cpp
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9d57cdfa172c1af3712ef52862a1976c57c679a5 |
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17-Oct-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Check for empty YMM use-def lists in X86VZeroUpper. The previous MRI.isPhysRegUsed(YMM0) would also return true when the function contains a call to a function that may clobber YMM0. That's most of them. Checking the use-def chains allows us to skip functions that don't explicitly mention YMM registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166110 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86VZeroUpper.cpp
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df8de92083e9cc97999e9f2f7bc7ef1df9ac6258 |
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22-Aug-2012 |
Craig Topper <craig.topper@gmail.com> |
Don't cache the MBB in the class. Its only used by one function. Change a for loop over operands to use unsigned instead of int. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162344 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86VZeroUpper.cpp
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f7c4d26f77465d731054021ba6bdde556e9f25b7 |
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22-Aug-2012 |
Craig Topper <craig.topper@gmail.com> |
Mark a function as static since it doesn't use anything in the class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162342 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86VZeroUpper.cpp
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a20e1e7ef596842127794372244fd5c646f71296 |
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01-Aug-2012 |
Chad Rosier <mcrosier@apple.com> |
Whitespace. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161122 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86VZeroUpper.cpp
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d9b0b025612992a0b724eeca8bdf10b1d7a5c355 |
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02-Jun-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Fix typos found by http://github.com/lyda/misspell-check git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157885 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86VZeroUpper.cpp
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c909950c384e8234a7b3c5a76b7f79e3f7012ceb |
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20-Apr-2012 |
Craig Topper <craig.topper@gmail.com> |
Convert some uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155186 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86VZeroUpper.cpp
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44d23825d61d530b8d562329ec8fc2d4f843bb8d |
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22-Feb-2012 |
Craig Topper <craig.topper@gmail.com> |
Make all pointers to TargetRegisterClass const since they are all pointers to static data that should not be modified. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151134 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86VZeroUpper.cpp
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5a96b3dad2f634c9081c8b2b6c2575441dc5a2bd |
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07-Dec-2011 |
Evan Cheng <evan.cheng@apple.com> |
Add bundle aware API for querying instruction properties and switch the code generator to it. For non-bundle instructions, these behave exactly the same as the MC layer API. For properties like mayLoad / mayStore, look into the bundle and if any of the bundled instructions has the property it would return true. For properties like isPredicable, only return true if *all* of the bundled instructions have the property. For properties like canFoldAsLoad, isCompare, conservatively return false for bundles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146026 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86VZeroUpper.cpp
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bd00a934c653fb1666fa7d18267644b4e9d14e5e |
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05-Nov-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Enhanced vzeroupper insertion pass that avoids inserting vzeroupper where it is unnecessary through local analysis. Patch from Bruno Cardoso Lopes, with some additional changes. I'm going to wait for any review comments and perform some additional testing before turning this on by default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143750 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86VZeroUpper.cpp
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c53479d9c243e3331f8153840a5d1cc72b62f649 |
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03-Sep-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Use internal storage for command line option. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139079 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86VZeroUpper.cpp
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3bde6fe0df05558b89e7edfe48ac05da59beb81a |
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23-Aug-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Introduce a pass to insert vzeroupper instructions to avoid AVX to SSE transition penalty. The pass is enabled through the "x86-use-vzeroupper" llc command line option. This is only the first step (very naive and conservative one) to sketch out the idea, but proper DFA is coming next to allow smarter decisions. Comments and ideas now and in further commits will be very appreciated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138317 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/X86/X86VZeroUpper.cpp
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