| 79eed0d2246e8e7be505784af0078507c712a02c |
|
29-May-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nvc0/ir: allow 64-bit constant loads on nve4
Looks like only 128-bit access doesn't work.
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| 0d818cdacce0299fabe4ac2aa735247c651fdcfa |
|
28-May-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nvc0/ir: TEX doesn't support JOIN modifier either
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| 28d6a268af3587cedb6a0e9deee7a98ecc8f82ba |
|
05-May-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir/opt: don't lose saturation in tryCollapseChainedMULs
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| d46f969b84a405dff6bbc647a7addd0902adc1e4 |
|
29-Apr-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nvc0/ir/opt: INTERP does not support JOIN
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| 1f4c154f0253ed8fb448402532cfa670f74e69cd |
|
28-Apr-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir/opt: try to convert ABS(SUB) to SAD
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| 00fe442253744c4c4e7e68da44d6983da053968b |
|
29-Apr-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nvc0/ir: implement better placement of texture barriers
Put them before first uses instead of right after the texturing
instruction and cull unnecessary barriers.
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| 90b5301ceab8fd86fccf76efe7ebb039c0e4a28f |
|
18-Apr-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir/opt: swap VP inputs to first source where possible
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| a6fcf14c239fa4c1542559f8c938fb574e48104f |
|
14-Apr-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir/opt: extend handleCVT for nv50's SET u32 to f32 chain
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| 15ce0f76e2e014374a292550505f58da88333fb7 |
|
14-Apr-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir: fix off-by-ones in CSE and nvc0 insnCanLoad
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| 93508b5b0d0a2b1e966973f1d0119b32d2ccf729 |
|
08-Apr-2012 |
Francisco Jerez <currojerez@riseup.net> |
nv50/ir/opt: Add isOptSupported() check in logical arith optimization.
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| 2fc014f8c0d9339b1652f4e037aee5697142304a |
|
07-Feb-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir/opt: don't regard OP_WRSV as dead code
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| e43a3a66a9d8a99021d76ff4d07dec7b8cfd62ca |
|
09-Apr-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir: rewrite the register allocator as GCRA, with spilling
This is more flexible than the linear scan, and we don't need the
separate allocation pass for constrained values anymore.
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| 51327a2df283da9a77c6e537751c6a45baed6951 |
|
02-Apr-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir/opt: silence warning (int < Elements() signedness)
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| ef7f9f68cfe71b1f812e59abc644a54a0b80dd06 |
|
02-Apr-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir/opt: fix combineSt access to wrong instruction
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| bb9c15bac42cf323ef267095b33031ffc1d4fba4 |
|
29-Jan-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir/opt: another insn NULL check in phi elimination
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| d41f293bf014e08df3df4324cdc02de5ce49d5ed |
|
22-Mar-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir/opt: don't delete instruction in removeFlow before its last use
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| be161e66d6108e56d40c116a4ee12668d6b8d960 |
|
22-Mar-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir/opt: check BB equality before instruction ordering in CSE
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| 44e84d6f161e95d44d847440b3bc6d670c242cd7 |
|
22-Mar-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir/opt: don't copy-propagate cond MOVs or MOVs to other reg files
We've never encountered the latter on nvc0, but on nv50 we have moves
between GPRs and address regs.
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| ca1fc2b86400e3fc9dd0517863e22721b5e91c77 |
|
07-Feb-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir/opt: don't replace conditional definitions in CSE
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| 90f0fac65524fbc4e2f2d396d20d9808e4a0a95c |
|
17-Nov-2011 |
Francisco Jerez <currojerez@riseup.net> |
nv50/ir/opt: Update the symbol size when combining loads and stores.
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| 1e957941735fae514de658c836b8bdaf6c66bc06 |
|
21-Mar-2012 |
Francisco Jerez <currojerez@riseup.net> |
nv50/ir/opt: Fix for function calls.
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| d6d1f0e4a25c9fbefce7485d77617855a8ea956a |
|
09-Apr-2012 |
Francisco Jerez <currojerez@riseup.net> |
nv50/ir/opt: Don't lose modifiers during constant folding.
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| 14d5f975a65c57830077dabf2f95261afbc51773 |
|
21-Mar-2012 |
Francisco Jerez <currojerez@riseup.net> |
nv50/ir/opt: Improve modifier handling.
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| a05e6a3fa28168d58a13cfb07f7a664e84b925ae |
|
14-Apr-2012 |
Francisco Jerez <currojerez@riseup.net> |
nv50/ir: Decouple object cloning logic from the sub-object recursion policy.
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| 9362d4bc0a03860ec386156cf499e855a9c2d2a5 |
|
09-Apr-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir: make Instruction::src/def container private
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| 8cc2eca5df0116aa7fb8233a9ab6ad1c9e4203cd |
|
29-Mar-2012 |
Francisco Jerez <currojerez@riseup.net> |
nv50/ir: Add support for unlimited instruction arguments.
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| 55f9bdb64e1f88c74754c8e090cd2cdbe62bba05 |
|
09-Apr-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir/opt: improve post-multiply and check target for support
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| 286abcb51ec2c27970e901ed815a814b3f0bebf6 |
|
06-Apr-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir: add isAccessSupported check for memory access coalescing
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| f09910f399d747e524731953bb11b64c1f4821d0 |
|
01-Feb-2012 |
Brian Paul <brianp@vmware.com> |
nv50: add assertions missed in earlier nv50 commit
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| 541bb2e33f89b07bcbea2e27275df858760c8ec8 |
|
31-Jan-2012 |
Brian Paul <brianp@vmware.com> |
nv50: use larger arrays to silence warnings and fix buffer overflows
The warnings were:
nv50_pc_regalloc.c: In function ‘pass_generate_phi_movs’:
nv50_pc_regalloc.c:423:41: warning: array subscript is above array bounds
codegen/nv50_ir_peephole.cpp: In member function ‘bool nv50_ir::MemoryOpt::replaceStFromSt(nv50_ir::Instruction*, nv50_ir::MemoryOpt::Record*)’:
codegen/nv50_ir_peephole.cpp:1475:18: warning: array subscript is above array bounds
codegen/nv50_ir_peephole.cpp:1475:18: warning: array subscript is above array bounds
codegen/nv50_ir_peephole.cpp:1475:18: warning: array subscript is above array bounds
codegen/nv50_ir_peephole.cpp:1475:18: warning: array subscript is above array bounds
And add some assertions to catch this sooner in debug builds.
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| ae828413c4a98ba3546f5586f2e20d9da718ab0c |
|
07-Jan-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir/opt: optimize u32 MOD by power of 2 into AND
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| 6ab6110133c2d316d98f78bbc38bca0c5b6184a7 |
|
07-Jan-2012 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir/opt: s/SHL/SHR in optimization of u32 DIV
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| d2d19ea51fa3575a8d014a69a9b835c335728817 |
|
14-Sep-2011 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir: add missing license headers
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|
| 57594065c30feec9376be9b2132659f7d87362ee |
|
14-Sep-2011 |
Christoph Bumiller <e0425955@student.tuwien.ac.at> |
nv50/ir: import new shader backend code
/external/mesa3d/src/gallium/drivers/nv50/codegen/nv50_ir_peephole.cpp
|