Searched defs:Def (Results 1 - 25 of 56) sorted by relevance

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/external/llvm/examples/OCaml-Kaleidoscope/Chapter2/
H A Dtoken.ml9 | Def | Extern Constructor in type:token
/external/llvm/examples/OCaml-Kaleidoscope/Chapter3/
H A Dtoken.ml9 | Def | Extern Constructor in type:token
/external/llvm/examples/OCaml-Kaleidoscope/Chapter4/
H A Dtoken.ml9 | Def | Extern Constructor in type:token
/external/llvm/examples/OCaml-Kaleidoscope/Chapter5/
H A Dtoken.ml9 | Def | Extern Constructor in type:token
/external/llvm/examples/OCaml-Kaleidoscope/Chapter6/
H A Dtoken.ml9 | Def | Extern Constructor in type:token
/external/llvm/examples/OCaml-Kaleidoscope/Chapter7/
H A Dtoken.ml9 | Def | Extern Constructor in type:token
/external/llvm/lib/CodeGen/
H A DLiveInterval.cpp52 VNInfo *LiveInterval::createDeadDef(SlotIndex Def, argument
54 assert(!Def.isDead() && "Cannot define a value at the dead slot");
55 iterator I = find(Def);
57 VNInfo *VNI = getNextValue(Def, VNInfoAllocator);
58 ranges.push_back(LiveRange(Def, Def.getDeadSlot(), VNI));
61 if (SlotIndex::isSameInstr(Def, I->start)) {
69 Def = std::min(Def, I->start);
70 if (Def !
162 SlotIndex Def = std::max(I->start, J->start); local
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H A DMachineCopyPropagation.cpp113 static bool isNopCopy(MachineInstr *CopyMI, unsigned Def, unsigned Src, argument
116 if (Def == SrcSrc)
118 if (TRI->isSubRegister(SrcSrc, Def)) {
120 unsigned SubIdx = TRI->getSubRegIndex(SrcSrc, Def);
141 DenseMap<unsigned, MachineInstr*> AvailCopyMap; // Def -> available copies map
142 DenseMap<unsigned, MachineInstr*> CopyMap; // Def -> copies map
143 SourceMap SrcMap; // Src -> Def map
151 unsigned Def = MI->getOperand(0).getReg(); local
154 if (TargetRegisterInfo::isVirtualRegister(Def) ||
162 if (!MRI->isReserved(Def)
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H A DPeepholeOptimizer.cpp318 unsigned Def = 0; local
328 Def = Reg;
336 assert(Def && Src && "Malformed bitcast instruction!");
363 if (MRI->getRegClass(SrcSrc) != MRI->getRegClass(Def))
366 MRI->replaceRegWith(Def, SrcSrc);
H A DExecutionDepsFix.cpp119 int Def; member in struct:__anon21125::LiveReg
351 LiveRegs[rx].Def = -(1 << 20);
364 LiveRegs[rx].Def = -1;
382 LiveRegs[rx].Def = std::max(LiveRegs[rx].Def, fi->second[rx].Def);
422 LiveRegs[i].Def -= CurInstr;
475 unsigned Clearance = CurInstr - LiveRegs[rx].Def;
476 LiveRegs[rx].Def = CurInstr;
588 if (LR.Def <
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/external/llvm/lib/IR/
H A DDominators.cpp96 // dominates - Return true if Def dominates a use in User. This performs
97 // the special checks necessary if Def and User are in the same basic block.
98 // Note that Def doesn't dominate a use in Def itself!
99 bool DominatorTree::dominates(const Instruction *Def, argument
102 const BasicBlock *DefBB = Def->getParent();
104 // Any unreachable use is dominated, even if Def == User.
113 if (Def == User)
120 if (isa<InvokeInst>(Def) || isa<PHINode>(User))
121 return dominates(Def, UseB
136 dominates(const Instruction *Def, const BasicBlock *UseBB) const argument
237 dominates(const Instruction *Def, const Use &U) const argument
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/external/llvm/lib/Analysis/
H A DMemDepPrinter.cpp30 Def, enumerator in enum:__anon21072::MemDepPrinter::DepType
68 return InstTypePair(dep.getInst(), Def);
92 = {"Clobber", "Def", "NonFuncLocal", "Unknown"};
/external/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGSDNodes.cpp110 static void CheckForPhysRegDependency(SDNode *Def, SDNode *User, unsigned Op, argument
122 if (Def->isMachineOpcode()) {
123 const MCInstrDesc &II = TII->get(Def->getMachineOpcode());
128 TRI->getMinimalPhysRegClass(Reg, Def->getValueType(ResNo));
619 void ScheduleDAGSDNodes::computeOperandLatency(SDNode *Def, SDNode *Use,
632 int Latency = TII->getOperandLatency(InstrItins, Def, DefIdx, Use, OpIdx);
/external/llvm/lib/Transforms/Utils/
H A DSimplifyIndVar.cpp266 /// pushIVUsers - Add all uses of Def to the current IV's worklist.
269 Instruction *Def,
273 for (Value::use_iterator UI = Def->use_begin(), E = Def->use_end();
279 // If Def is a LoopPhi, it may not be in the Simplified set, so check for
281 if (User != Def && Simplified.insert(User))
282 SimpleIVUsers.push_back(std::make_pair(User, Def));
268 pushIVUsers( Instruction *Def, SmallPtrSet<Instruction*,16> &Simplified, SmallVectorImpl< std::pair<Instruction*,Instruction*> > &SimpleIVUsers) argument
/external/llvm/utils/TableGen/
H A DCodeGenSchedule.cpp345 unsigned CodeGenSchedModels::getSchedRWIdx(Record *Def, bool IsRead, argument
351 if (I->TheDef == Def)
H A DSetTheory.cpp229 // Expand a Def into a set by evaluating one of its fields.
235 void expand(SetTheory &ST, Record *Def, RecSet &Elts) { argument
236 ST.evaluate(Def->getValueInit(FieldName), Elts, Def->getLoc());
272 if (DefInit *Def = dyn_cast<DefInit>(Expr)) {
273 if (const RecVec *Result = expand(Def->getDef()))
275 Elts.insert(Def->getDef());
H A DCodeGenSchedule.h61 CodeGenSchedRW(unsigned Idx, Record *Def) argument
62 : Index(Idx), TheDef(Def), IsAlias(false), IsVariadic(false) {
63 Name = Def->getName();
64 IsRead = Def->isSubClassOf("SchedRead");
65 HasVariants = Def->isSubClassOf("SchedVariant");
67 IsVariadic = Def->getValueAsBit("Variadic");
72 IsSequence = Def->isSubClassOf("WriteSequence");
302 CodeGenSchedRW &getSchedRW(Record *Def) {
303 bool IsRead = Def->isSubClassOf("SchedRead");
304 unsigned Idx = getSchedRWIdx(Def, IsRea
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/external/clang/lib/Lex/
H A DPPMacroExpansion.cpp214 MacroDirective::DefInfo Def = MD->getDefinition(); local
215 assert(Def.isValid());
216 MacroInfo *MI = Def.getMacroInfo();
293 if (Def.getDirective()->isAmbiguous()) {
298 for (MacroDirective::DefInfo PrevDef = Def.getPreviousDefinition();
H A DPreprocessingRecord.cpp323 MacroDefinition *Def) {
324 MacroDefinitions[Macro] = Def;
379 else if (MacroDefinition *Def = findMacroDefinition(MI))
381 new (*this) MacroExpansion(Def, Range));
419 MacroDefinition *Def local
421 addPreprocessedEntity(Def);
422 MacroDefinitions[MI] = Def;
322 RegisterMacroDefinition(MacroInfo *Macro, MacroDefinition *Def) argument
H A DPreprocessor.cpp314 Def = I->second->findDirectiveAtLoc(Loc, SourceMgr); local
315 if (!Def)
317 if (!MacroDefinitionEquals(Def.getMacroInfo(), Tokens))
319 SourceLocation Location = Def.getLocation();
/external/llvm/include/llvm/Analysis/
H A DMemoryDependenceAnalysis.h57 /// Def - This is a dependence on the specified instruction which
70 /// 3. Dependence queries on calls return Def only when they are
74 Def, enumerator in enum:llvm::MemDepResult::DepType
106 assert(Inst && "Def requires inst");
107 return MemDepResult(PairTy(Inst, Def));
132 bool isDef() const { return Value.getInt() == Def; }
/external/llvm/lib/TableGen/
H A DTGLexer.h46 Bit, Bits, Class, Code, Dag, Def, Foreach, Defm, Field, In, Int, Let, List, enumerator in enum:llvm::tgtok::TokKind
/external/llvm/lib/Target/ARM/
H A DA15SDOptimizer.cpp210 MachineInstr *Def = Op->getParent(); local
214 if (DeadInstr.find(Def) != DeadInstr.end())
221 for (unsigned int j = 0; j < Def->getNumOperands(); ++j) {
222 MachineOperand &MODef = Def->getOperand(j);
234 if (&*II == Def)
245 DEBUG(dbgs() << "Deleting instruction " << *Def << "\n");
246 DeadInstr.insert(Def);
315 MachineInstr *Def = MRI->getVRegDef(OpReg); local
316 if (!Def)
318 if (Def
627 MachineInstr *Def = MRI->getVRegDef(*I); local
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/external/llvm/lib/Target/SystemZ/
H A DSystemZElimCompare.cpp40 : Def(false), Use(false), IndirectDef(false), IndirectUse(false) {}
43 Def |= Other.Def;
50 operator bool() const { return Def || Use; }
54 bool Def; member in struct:__anon21486::Reference
152 Ref.Def = true;
348 (!CCRefs.Def && adjustCCMasksForInstr(MI, Compare, CCUsers))) {
354 if (SrcRefs.Def)
357 if (CCRefs.Use && CCRefs.Def)
451 if (CCRefs.Def) {
[all...]
/external/clang/lib/CodeGen/
H A DCGVTables.cpp146 const FunctionDecl *Def = 0; local
147 if (MD->hasBody(Def) && Def->isOutOfLine())

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