/external/clang/lib/StaticAnalyzer/Checkers/ |
H A D | ReturnPointerRangeChecker.cpp | 30 void checkPreStmt(const ReturnStmt *RS, CheckerContext &C) const; 34 void ReturnPointerRangeChecker::checkPreStmt(const ReturnStmt *RS, argument 38 const Expr *RetE = RS->getRetValue();
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H A D | ReturnUndefChecker.cpp | 35 void checkPreStmt(const ReturnStmt *RS, CheckerContext &C) const; 39 void ReturnUndefChecker::checkPreStmt(const ReturnStmt *RS, argument 41 const Expr *RetE = RS->getRetValue();
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H A D | CheckObjCDealloc.cpp | 208 Selector RS = Ctx.Selectors.getSelector(0, &RII); local 240 if (scan_ivar_release(MD->getBody(), ID, PD, RS, SelfII, Ctx)
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H A D | StackAddrEscapeChecker.cpp | 35 void checkPreStmt(const ReturnStmt *RS, CheckerContext &C) const; 119 void StackAddrEscapeChecker::checkPreStmt(const ReturnStmt *RS, argument 122 const Expr *RetE = RS->getRetValue();
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H A D | MallocChecker.cpp | 92 static RefState getEscaped(const RefState *RS) { argument 93 return RefState(Escaped, RS->getStmt(), RS->getAllocationFamily()); 315 const Expr *DeallocExpr, const RefState *RS, 1120 const RefState *RS = C.getState()->get<RegionState>(Sym); local 1121 assert(RS); 1122 return isTrackedByCurrentChecker(RS->getAllocationFamily()); 1262 const RefState *RS, 1276 const Expr *AllocExpr = cast<Expr>(RS->getStmt()); 1287 printExpectedDeallocName(os, RS 1259 ReportMismatchedDealloc(CheckerContext &C, SourceRange Range, const Expr *DeallocExpr, const RefState *RS, SymbolRef Sym) const argument 1570 const RefState *RS = C.getState()->get<RegionState>(Sym); local 1636 RegionStateTy RS = state->get<RegionState>(); local 1786 const RefState *RS = C.getState()->get<RegionState>(Sym); local 1814 RegionStateTy RS = state->get<RegionState>(); local 2001 retTrue(const RefState *RS) argument 2005 checkIfNewOrNewArrayFamily(const RefState *RS) argument 2081 const RefState *RS = state->get<RegionState>(Sym); local 2164 RegionStateTy RS = State->get<RegionState>(); local [all...] |
/external/llvm/lib/CodeGen/ |
H A D | PrologEpilogInserter.h | 51 RegScavenger *RS; member in class:llvm::PEI
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H A D | BranchFolding.h | 93 RegScavenger *RS; member in class:llvm::BranchFolder
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H A D | TailDuplication.cpp | 66 OwningPtr<RegScavenger> RS; member in class:__anon21214::TailDuplicatePass 136 RS.reset(); 138 RS.reset(new RegScavenger()); 787 if (RS && !TailBB->livein_empty()) { 789 RS->enterBasicBlock(PredBB); 791 RS->forward(prior(PredBB->end())); 793 RS->getRegsUsed(RegsLiveAtExit, false);
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H A D | MachineVerifier.cpp | 139 bool addPassed(const RegSet &RS) { argument 141 for (RegSet::const_iterator I = RS.begin(), E = RS.end(); I != E; ++I) 158 bool addRequired(const RegSet &RS) { argument 160 for (RegSet::const_iterator I = RS.begin(), E = RS.end(); I != E; ++I)
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonFixupHwLoops.cpp | 65 RegScavenger &RS); 119 RegScavenger RS; local 125 RS.enterBasicBlock(MBB); 132 RS.forward(MII); 139 convertLoopInstr(MF, MII, RS); 160 RegScavenger &RS) { 164 unsigned Scratch = RS.scavengeRegister(&Hexagon::IntRegsRegClass, MII, 0); 158 convertLoopInstr(MachineFunction &MF, MachineBasicBlock::iterator &MII, RegScavenger &RS) argument
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/external/clang/lib/StaticAnalyzer/Core/ |
H A D | Environment.cpp | 96 const ReturnStmt *RS = cast<ReturnStmt>(S); local 97 if (const Expr *RE = RS->getRetValue())
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H A D | RangeConstraintManager.cpp | 82 RangeSet(PrimRangeSet RS) : ranges(RS) {} argument
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H A D | ExprEngineCallAndReturn.cpp | 245 if (const ReturnStmt *RS = dyn_cast_or_null<ReturnStmt>(LastSt)) { 247 SVal V = state->getSVal(RS, LCtx); 983 void ExprEngine::VisitReturnStmt(const ReturnStmt *RS, ExplodedNode *Pred, argument 987 getCheckerManager().runCheckersForPreStmt(dstPreVisit, Pred, RS, *this); 991 if (RS->getRetValue()) { 994 B.generateNode(RS, *it, (*it)->getState());
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/external/guava/guava/src/com/google/common/base/ |
H A D | Ascii.java | 335 * relationship shall be: FS is the most inclusive, then GS, then RS, 355 public static final byte RS = 30; field in class:Ascii
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/external/llvm/lib/DebugInfo/ |
H A D | DWARFCompileUnit.h | 47 StringRef RS, StringRef SS, StringRef SOS, StringRef AOS, 50 RangeSection(RS), StringSection(SS), StringOffsetSection(SOS), 46 DWARFCompileUnit(const DWARFDebugAbbrev *DA, StringRef IS, StringRef AS, StringRef RS, StringRef SS, StringRef SOS, StringRef AOS, const RelocAddrMap *M, bool LE) argument
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/external/dropbear/libtomcrypt/src/ciphers/twofish/ |
H A D | twofish.c | 55 /* The 4x8 RS Linear Transform */ 56 static const unsigned char RS[4][8] = { variable 223 /* computes [y0 y1 y2 y3] = RS . [x0 x1 x2 x3 x4 x5 x6 x7] */ 234 /* computes [y0 y1 y2 y3] = RS . [x0 x1 x2 x3 x4 x5 x6 x7] */ 241 out[x] ^= gf_mult(in[y], RS[x][y], RS_POLY);
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/external/llvm/include/llvm/Support/ |
H A D | IntegersSubsetMapping.h | 219 SuccessorClass *RS) { 229 CurrentRSuccessor = RS; 217 onLROpen(const IntTy &Pt, SuccessorClass *LS, SuccessorClass *RS) argument
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/external/aac/libAACenc/src/ |
H A D | metadata_compressor.cpp | 121 RS = 5, enumerator in enum:__anon110 531 drcComp->channelIdx[RS] = channelMapping.elInfo[2].ChannelIndex[1]; 539 drcComp->channelIdx[RS] = channelMapping.elInfo[2].ChannelIndex[1]; 548 drcComp->channelIdx[RS] = channelMapping.elInfo[3].ChannelIndex[1]; /* rs */ 558 drcComp->channelIdx[RS] = channelMapping.elInfo[3].ChannelIndex[1]; /* rrear */ 895 if (drcComp->channelIdx[RS] >= 0) tmp -= fMultDiv2(FL2FXCONST_DBL(0.707f), (FIXP_PCM)pSamples[drcComp->channelIdx[RS]])>>(DOWNMIX_SHIFT-1); /* Rs */ 908 if (drcComp->channelIdx[RS] >= 0) tmp += fMultDiv2(FL2FXCONST_DBL(0.707f), (FIXP_PCM)pSamples[drcComp->channelIdx[RS]])>>(DOWNMIX_SHIFT-1); /* Rs */ 910 if ((drcComp->channelIdx[RS] > [all...] |
/external/clang/lib/Sema/ |
H A D | SemaLambda.cpp | 420 const ReturnStmt *RS = *I; local 421 const Expr *RetE = RS->getRetValue(); 429 Diag(RS->getLocStart(),
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/external/llvm/utils/FileCheck/ |
H A D | FileCheck.cpp | 129 bool AddRegExToRegEx(StringRef RS, unsigned &CurParen, SourceMgr &SM); 338 bool Pattern::AddRegExToRegEx(StringRef RS, unsigned &CurParen, argument 340 Regex R(RS); 343 SM.PrintMessage(SMLoc::getFromPointer(RS.data()), SourceMgr::DK_Error, 348 RegExStr += RS.str();
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/external/llvm/lib/Target/ARM/ |
H A D | ARMLoadStoreOptimizer.cpp | 69 RegScavenger *RS; member in struct:__anon21343::ARMLoadStoreOpt 1045 RS->forward(prior(Loc)); 1230 RS->enterBasicBlock(&MBB); 1340 unsigned Scratch = RS->FindUnusedReg(&ARM::GPRRegClass); 1342 RS->forward(prior(MBBI)); 1363 // RS may be pointing to an instruction that's deleted. 1364 RS->skipTo(prior(MBBI)); 1370 RS->forward(prior(MBBI)); 1440 RS = new RegScavenger(); 1452 delete RS; [all...] |
/external/qemu/tcg/ppc/ |
H A D | tcg-target.c | 396 #define RS(r) ((r)<<21) macro 408 #define SAB(s,a,b) (RS(s) | RA(a) | RB(b)) 453 tcg_out32 (s, ORI | RS (ret) | RA (ret) | (arg & 0xffff)); 477 tcg_out32 (s, MTSPR | RS (0) | CTR); 502 tcg_out32 (s, MTSPR | RS (arg) | LR); 558 | RS (addr_reg) 573 | RS (addr_reg) 605 tcg_out32 (s, EXTSB | RA (data_reg) | RS (3)); 608 tcg_out32 (s, EXTSH | RA (data_reg) | RS (3)); 672 tcg_out32 (s, EXTSB | RA (data_reg) | RS (data_re [all...] |
/external/qemu/tcg/ppc64/ |
H A D | tcg-target.c | 393 #define RS(r) ((r)<<21) macro 406 #define SAB(s,a,b) (RS(s) | RA(a) | RB(b)) 447 tcg_out32 (s, op | RA (ra) | RS (rs) | sh | mb); 457 tcg_out32 (s, ORI | RS (ret) | RA (ret) | (arg & 0xffff)); 477 if (h16) tcg_out32 (s, ORIS | RS (ret) | RA (ret) | h16); 478 if (l16) tcg_out32 (s, ORI | RS (ret) | RA (ret) | l16); 497 tcg_out32 (s, MTSPR | RS (0) | CTR); 509 tcg_out32 (s, MTSPR | RS (arg) | LR); 577 | RS (addr_reg) 587 | RS (addr_re [all...] |
/external/qemu/ |
H A D | ppc-dis.c | 84 /* Opcode is defined for the POWER (RS/6000) architecture. */ 729 the RS field in the instruction. This is used for extended 734 /* The RS field in a D, DS, X, XFX, XS, M, MD or MDS form 737 #define RS RBS + 1 738 #define RT RS 742 /* The RS and RT fields of the DS form stq instruction, which have 744 #define RSQ RS + 1 748 /* The RS field of the tlbwe instruction, which is optional. */ 1455 the RS field in the instruction. This is used for extended 2153 { "efscfd", VX(4, 719), VX_MASK, PPCEFS, { RS, R 733 #define RS macro [all...] |
/external/valgrind/main/VEX/priv/ |
H A D | guest_s390_toIR.c | 11991 } RS; member in union:__anon26468 12773 case 0x86: s390_format_RS_RRRD(s390_irgen_BXH, ovl.fmt.RS.r1, ovl.fmt.RS.r3, 12774 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok; 12775 case 0x87: s390_format_RS_RRRD(s390_irgen_BXLE, ovl.fmt.RS.r1, ovl.fmt.RS.r3, 12776 ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok; 12777 case 0x88: s390_format_RS_R0RD(s390_irgen_SRL, ovl.fmt.RS [all...] |