Searched defs:isSub (Results 1 - 7 of 7) sorted by relevance
/external/llvm/lib/Target/X86/ |
H A D | X86FrameLowering.cpp | 150 bool isSub = NumBytes < 0; local 151 uint64_t Offset = isSub ? -NumBytes : NumBytes; 156 Opc = isSub 167 unsigned Reg = isSub 171 Opc = isSub 175 .addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub)); 176 if (isSub) 187 StackPtr, false, isSub ? -ThisVal : ThisVal); 195 if (isSub) [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | Thumb1RegisterInfo.cpp | 101 bool isSub = false; local 107 isSub = true; 129 int Opc = (isSub) ? ARM::tSUBrr : (isHigh ? ARM::tADDhirr : ARM::tADDrr); 134 if (DestReg == ARM::SP || isSub) 174 bool isSub = NumBytes < 0; local 176 if (isSub) Bytes = -NumBytes; 190 Opc = isSub ? ARM::tSUBspi : ARM::tADDspi; 192 } else if (!isSub && BaseReg == ARM::SP) { 212 Opc = isSub ? ARM::tSUBspi : ARM::tADDspi; 217 Opc = isSub 307 bool isSub = Imm < 0; local [all...] |
H A D | ARMBaseInstrInfo.cpp | 165 bool isSub = ARM_AM::getAM2Op(OffImm) == ARM_AM::sub; local 173 get(isSub ? ARM::SUBri : ARM::ADDri), WBReg) 180 get(isSub ? ARM::SUBrsi : ARM::ADDrsi), WBReg) 185 get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg) 191 bool isSub = ARM_AM::getAM3Op(OffImm) == ARM_AM::sub; local 196 get(isSub ? ARM::SUBri : ARM::ADDri), WBReg) 201 get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg) 1784 bool isSub = NumBytes < 0; local 1785 if (isSub) NumBytes = -NumBytes; 1798 unsigned Opc = isSub 2404 bool isSub = ARM_AM::getAM2Op(ShOpVal) == ARM_AM::sub; local 2420 bool isSub = ARM_AM::getAM2Op(ShOpVal) == ARM_AM::sub; local 2448 bool isSub = ARM_AM::getAM2Op(ShOpVal) == ARM_AM::sub; local 2461 bool isSub = ARM_AM::getAM2Op(ShOpVal) == ARM_AM::sub; local 2513 bool isSub = ARM_AM::getAM2Op(ShOpVal) == ARM_AM::sub; local 3137 bool isSub = ARM_AM::getAM2Op(ShOpVal) == ARM_AM::sub; local [all...] |
H A D | ARMISelLowering.cpp | 7341 bool isSub = ARM_AM::getAM2Op(Offset) == ARM_AM::sub; local 7343 if (isSub)
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/external/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineAndOrXor.cpp | 331 /// where isSub determines whether the operator is a sub. If we can fold one of 341 ConstantInt *Mask, bool isSub, 381 if (isSub) 340 FoldLogicalPlusAnd(Value *LHS, Value *RHS, ConstantInt *Mask, bool isSub, Instruction &I) argument
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/external/clang/lib/CodeGen/ |
H A D | CGExprScalar.cpp | 2329 bool isSub=false) { 2349 return buildFMulAdd(LHSBinOp, op.RHS, CGF, Builder, false, isSub); 2356 return buildFMulAdd(RHSBinOp, op.LHS, CGF, Builder, isSub, false); 2327 tryEmitFMulAdd(const BinOpInfo &op, const CodeGenFunction &CGF, CGBuilderTy &Builder, bool isSub=false) argument
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/external/valgrind/main/VEX/priv/ |
H A D | guest_arm_toIR.c | 15977 UInt isSub = INSN0(9,9); local 15982 putIRegT(rD, binop(isSub ? Iop_Sub32 : Iop_Add32, 15985 setFlags_D1_D2( isSub ? ARMG_CC_OP_SUB : ARMG_CC_OP_ADD, 15987 DIP("%s r%u, r%u, #%u\n", isSub ? "subs" : "adds", rD, rN, uimm3); 15998 UInt isSub = INSN0(9,9); local 16003 putIRegT( rD, binop(isSub ? Iop_Sub32 : Iop_Add32, 16006 setFlags_D1_D2( isSub ? ARMG_CC_OP_SUB : ARMG_CC_OP_ADD, 16008 DIP("%s r%u, r%u, r%u\n", isSub ? "subs" : "adds", rD, rN, rM); 16151 UInt isSub = INSN0(11,11); local 16158 putIRegT( rN, binop(isSub [all...] |
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