| /dalvik/vm/compiler/codegen/mips/ |
| H A D | Codegen.h | 71 int rSrc);
73 extern MipsLIR* dvmCompilerRegCopy(CompilationUnit *cUnit, int rDest, int rSrc);
81 int displacement, int rSrc, OpSize size);
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| H A D | CodegenFactory.cpp | 37 int displacement, int rSrc)
39 return storeBaseDisp(cUnit, rBase, displacement, rSrc, kWord);
36 storeWordDisp(CompilationUnit *cUnit, int rBase, int displacement, int rSrc) argument
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| H A D | CodegenDriver.cpp | 4840 MipsLIR* dvmCompilerRegCopyNoInsert(CompilationUnit *cUnit, int rDest, int rSrc) argument
4842 return genRegCopyNoInsert(cUnit, rDest, rSrc);
4846 MipsLIR* dvmCompilerRegCopy(CompilationUnit *cUnit, int rDest, int rSrc) argument
4848 return genRegCopy(cUnit, rDest, rSrc);
4859 int displacement, int rSrc, OpSize size)
4861 storeBaseDisp(cUnit, rBase, displacement, rSrc, size);
4858 dvmCompilerFlushRegImpl(CompilationUnit *cUnit, int rBase, int displacement, int rSrc, OpSize size) argument
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| /dalvik/vm/compiler/codegen/mips/Mips32/ |
| H A D | Factory.cpp | 38 int displacement, int rSrc);
46 static MipsLIR *fpRegCopy(CompilationUnit *cUnit, int rDest, int rSrc) argument
50 res->operands[1] = rSrc;
51 if (rDest == rSrc) {
55 assert(DOUBLEREG(rDest) == DOUBLEREG(rSrc));
60 if (SINGLEREG(rSrc)) {
65 res->operands[0] = rSrc;
69 assert(SINGLEREG(rSrc));
484 int rIndex, int rSrc, int scale, OpSize size)
493 if (FPREG(rSrc)) {
483 storeBaseIndexed(CompilationUnit *cUnit, int rBase, int rIndex, int rSrc, int scale, OpSize size) argument
718 storeBaseDispBody(CompilationUnit *cUnit, int rBase, int displacement, int rSrc, int rSrcHi, OpSize size) argument
811 storeBaseDisp(CompilationUnit *cUnit, int rBase, int displacement, int rSrc, OpSize size) argument
835 genRegCopyNoInsert(CompilationUnit *cUnit, int rDest, int rSrc) argument
856 genRegCopy(CompilationUnit *cUnit, int rDest, int rSrc) argument
[all...] |
| /dalvik/vm/compiler/codegen/arm/Thumb2/ |
| H A D | Factory.cpp | 811 int rIndex, int rSrc, int scale, OpSize size)
813 bool allLowRegs = LOWREG(rBase) && LOWREG(rIndex) && LOWREG(rSrc);
819 if (FPREG(rSrc)) {
820 assert(SINGLEREG(rSrc));
838 store = newLIR3(cUnit, opcode, rSrc, regPtr, 0);
859 store = newLIR3(cUnit, opcode, rSrc, rBase, rIndex);
861 store = newLIR4(cUnit, opcode, rSrc, rBase, rIndex, scale);
1010 int displacement, int rSrc, int rSrcHi,
1017 bool allLowRegs = (LOWREG(rBase) && LOWREG(rSrc));
1023 if (!FPREG(rSrc)) {
810 storeBaseIndexed(CompilationUnit *cUnit, int rBase, int rIndex, int rSrc, int scale, OpSize size) argument
1009 storeBaseDispBody(CompilationUnit *cUnit, int rBase, int displacement, int rSrc, int rSrcHi, OpSize size) argument
1105 storeBaseDisp(CompilationUnit *cUnit, int rBase, int displacement, int rSrc, OpSize size) argument
1192 fpRegCopy(CompilationUnit *cUnit, int rDest, int rSrc) argument
1218 genRegCopyNoInsert(CompilationUnit *cUnit, int rDest, int rSrc) argument
1244 genRegCopy(CompilationUnit *cUnit, int rDest, int rSrc) argument
[all...] |
| /dalvik/vm/compiler/codegen/arm/ |
| H A D | Codegen.h | 65 int rSrc);
|
| H A D | CodegenDriver.cpp | 4724 ArmLIR* dvmCompilerRegCopyNoInsert(CompilationUnit *cUnit, int rDest, int rSrc) argument
4726 return genRegCopyNoInsert(cUnit, rDest, rSrc);
4730 ArmLIR* dvmCompilerRegCopy(CompilationUnit *cUnit, int rDest, int rSrc) argument
4732 return genRegCopy(cUnit, rDest, rSrc);
4743 int displacement, int rSrc, OpSize size)
4745 storeBaseDisp(cUnit, rBase, displacement, rSrc, size);
4742 dvmCompilerFlushRegImpl(CompilationUnit *cUnit, int rBase, int displacement, int rSrc, OpSize size) argument
|
| /dalvik/vm/compiler/codegen/arm/Thumb/ |
| H A D | Factory.cpp | 33 int displacement, int rSrc);
513 int rIndex, int rSrc, int scale, OpSize size)
539 res = newLIR3(cUnit, opcode, rSrc, rBase, rNewIndex);
714 int displacement, int rSrc, int rSrcHi,
774 store = res = newLIR3(cUnit, opcode, rSrc, rBase, encodedDisp);
782 store = newLIR3(cUnit, kThumbStrRRI5, rSrc, rScratch, 0);
786 store = newLIR3(cUnit, opcode, rSrc, rBase, rScratch);
808 int displacement, int rSrc, OpSize size)
810 return storeBaseDispBody(cUnit, rBase, displacement, rSrc, -1, size);
839 static ArmLIR* genRegCopyNoInsert(CompilationUnit *cUnit, int rDest, int rSrc) argument
512 storeBaseIndexed(CompilationUnit *cUnit, int rBase, int rIndex, int rSrc, int scale, OpSize size) argument
713 storeBaseDispBody(CompilationUnit *cUnit, int rBase, int displacement, int rSrc, int rSrcHi, OpSize size) argument
807 storeBaseDisp(CompilationUnit *cUnit, int rBase, int displacement, int rSrc, OpSize size) argument
863 genRegCopy(CompilationUnit *cUnit, int rDest, int rSrc) argument
[all...] |
| /dalvik/vm/compiler/codegen/ |
| H A D | Ralloc.h | 216 extern ArmLIR* dvmCompilerRegCopy(CompilationUnit *cUnit, int rDest, int rSrc);
222 int displacement, int rSrc, OpSize size);
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| H A D | CodegenFactory.cpp | 43 int displacement, int rSrc)
45 return storeBaseDisp(cUnit, rBase, displacement, rSrc, kWord);
42 storeWordDisp(CompilationUnit *cUnit, int rBase, int displacement, int rSrc) argument
|