Searched defs:imm (Results 1 - 6 of 6) sorted by relevance

/dalvik/vm/compiler/codegen/x86/libenc/
H A Denc_wrapper.cpp77 //assert(n_size != imm.get_size());
106 (int)opnd.imm());
159 extern "C" ENCODER_DECLARE_EXPORT char * encoder_imm(Mnemonic m, OpndSize size, int imm, char * stream) { argument
161 //assert(imm.get_size() == size_32);
162 add_imm(args, size, imm, true/*is_signed*/);
182 extern "C" ENCODER_DECLARE_EXPORT char * encoder_update_imm(int imm, char * stream) { argument
186 //assert(imm.get_size() == size_32);
187 add_imm(args, decInst.operands[0].size(), imm, true/*is_signed*/);
345 int imm, int reg, bool isPhysical, LowOpndRegType type, char * stream) {
351 add_imm(args, OpndSize_8, imm, tru
344 encoder_imm_reg(Mnemonic m, OpndSize size, int imm, int reg, bool isPhysical, LowOpndRegType type, char * stream) argument
362 encoder_update_imm_rm(int imm, char * stream) argument
375 encoder_imm_mem(Mnemonic m, OpndSize size, int imm, int disp, int base_reg, bool isBasePhysical, char * stream) argument
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/dalvik/vm/compiler/codegen/x86/
H A DLowerAlu.cpp767 int common_alu_int_lit(ALU_Opcode opc, u2 vA, u2 vB, s2 imm) { //except div and rem argument
769 alu_binary_imm_reg(OpndSize_32, opc, imm, 1, false);
774 int common_shift_int_lit(ALU_Opcode opc, u2 vA, u2 vB, s2 imm) { argument
775 return common_alu_int_lit(opc, vA, vB, imm);
790 int alu_rsub_int(ALU_Opcode opc, u2 vA, s2 imm, u2 vB) { argument
791 move_imm_to_reg(OpndSize_32, imm, 2, false);
987 int isPowerOfTwo(int imm) { argument
990 if(imm == (1 << i)) return i;
996 int div_lit_strength_reduction(u2 vA, u2 vB, s2 imm) { argument
999 int power = isPowerOfTwo(imm);
1037 common_div_rem_int_lit(bool isRem, u2 vA, u2 vB, s2 imm) argument
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H A DLowerJump.cpp528 \brief generate a single native instruction "jcc imm" to jump to a label
539 int imm = 0; local
540 imm = getRelativeOffset(target, isShortTerm, JmpCall_cond, &unknown, &size);
541 dump_label(m, size, imm, target, isShortTerm);
544 \brief generate a single native instruction "jmp imm" to jump to ".invokeArgsDone"
551 \brief generate a single native instruction "jmp imm" to jump to a label
574 int imm = 0; local
575 imm = getRelativeOffset(target, isShortTerm, JmpCall_uncond, &unknown, &size);
576 dump_label(m, size, imm, target, isShortTerm);
584 \brief generate a single native instruction "jcc imm"
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H A DLowerHelper.cpp226 LowOpImm* dump_special(AtomOpCode cc, int imm) { argument
232 op->immOpnd.value = imm;
233 //stream = encoder_imm(m, size, imm, stream);
237 LowOpLabel* lower_label(Mnemonic m, OpndSize size, int imm, const char* label, bool isLocal) { argument
238 stream = encoder_imm(m, size, imm, stream);
242 LowOpLabel* dump_label(Mnemonic m, OpndSize size, int imm, argument
244 return lower_label(m, size, imm, label, isLocal);
247 LowOpNCG* dump_ncg(Mnemonic m, OpndSize size, int imm) { argument
248 stream = encoder_imm(m, size, imm, stream);
255 LowOpImm* lower_imm(Mnemonic m, OpndSize size, int imm, boo argument
260 dump_imm(Mnemonic m, OpndSize size, int imm) argument
264 dump_imm_with_codeaddr(Mnemonic m, OpndSize size, int imm, char* codePtr) argument
681 lower_imm_reg(Mnemonic m, AtomOpCode m2, OpndSize size, int imm, int reg, LowOpndRegType type, bool chaining) argument
687 dump_imm_reg_noalloc(Mnemonic m, OpndSize size, int imm, int reg, bool isPhysical, LowOpndRegType type) argument
694 dump_imm_reg(Mnemonic m, AtomOpCode m2, OpndSize size, int imm, int reg, bool isPhysical, LowOpndRegType type, bool chaining) argument
708 lower_imm_mem(Mnemonic m, AtomOpCode m2, OpndSize size, int imm, int disp, int base_reg, MemoryAccessType mType, int mIndex, bool chaining) argument
715 dump_imm_mem_noalloc(Mnemonic m, OpndSize size, int imm, int disp, int base_reg, bool isBasePhysical, MemoryAccessType mType, int mIndex) argument
724 dump_imm_mem(Mnemonic m, AtomOpCode m2, OpndSize size, int imm, int disp, int base_reg, bool isBasePhysical, MemoryAccessType mType, int mIndex, bool chaining) argument
853 load_int_fp_stack_imm(OpndSize size, int imm) argument
1078 compare_imm_reg(OpndSize size, int imm, int reg, bool isPhysical) argument
1098 compare_imm_mem(OpndSize size, int imm, int disp, int base_reg, bool isBasePhysical) argument
1107 compare_imm_VR(OpndSize size, int imm, int vA) argument
1200 test_imm_reg(OpndSize size, int imm, int reg, bool isPhysical) argument
1206 test_imm_mem(OpndSize size, int imm, int disp, int reg, bool isPhysical) argument
1234 alu_binary_imm_mem(OpndSize size, ALU_Opcode opc, int imm, int disp, int base_reg, bool isBasePhysical) argument
1245 alu_binary_imm_reg(OpndSize size, ALU_Opcode opc, int imm, int reg, bool isPhysical) argument
1582 move_chain_to_mem(OpndSize size, int imm, int disp, int base_reg, bool isBasePhysical) argument
1590 move_imm_to_mem(OpndSize size, int imm, int disp, int base_reg, bool isBasePhysical) argument
1599 set_VR_to_imm(u2 vA, OpndSize size, int imm) argument
1625 set_VR_to_imm_noupdateref(LowOp* op, u2 vA, OpndSize size, int imm) argument
1631 set_VR_to_imm_noalloc(u2 vA, OpndSize size, int imm) argument
1638 move_chain_to_reg(OpndSize size, int imm, int reg, bool isPhysical) argument
1645 move_imm_to_reg(OpndSize size, int imm, int reg, bool isPhysical) argument
1654 move_imm_to_reg_noalloc(OpndSize size, int imm, int reg, bool isPhysical) argument
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/dalvik/vm/compiler/codegen/arm/
H A DAssemble.cpp2591 kMemOp2StrbRRR = 0xF80, /* str rt,[rn,rm,LSL #imm] [111110000000]
2592 rn[19-16] rt[15-12] [000000] imm[5-4] rm[3-0] */
2593 kMemOp2LdrbRRR = 0xF81, /* ldrb rt,[rn,rm,LSL #imm] [111110000001]
2594 rn[19-16] rt[15-12] [000000] imm[5-4] rm[3-0] */
2595 kMemOp2StrhRRR = 0xF82, /* str rt,[rn,rm,LSL #imm] [111110000010]
2596 rn[19-16] rt[15-12] [000000] imm[5-4] rm[3-0] */
2597 kMemOp2LdrhRRR = 0xF83, /* ldrh rt,[rn,rm,LSL #imm] [111110000011]
2598 rn[19-16] rt[15-12] [000000] imm[5-4] rm[3-0] */
2599 kMemOp2StrRRR = 0xF84, /* str rt,[rn,rm,LSL #imm] [111110000100]
2600 rn[19-16] rt[15-12] [000000] imm[
2812 int imm = (insn >> 6) & 0x1F; local
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/dalvik/vm/compiler/codegen/mips/
H A DAssemble.cpp1964 kMemOp2StrbRRR = 0xF80, /* str rt,[rn,rm,LSL #imm] [111110000000]
1965 rn[19-16] rt[15-12] [000000] imm[5-4] rm[3-0] */
1966 kMemOp2LdrbRRR = 0xF81, /* ldrb rt,[rn,rm,LSL #imm] [111110000001]
1967 rn[19-16] rt[15-12] [000000] imm[5-4] rm[3-0] */
1968 kMemOp2StrhRRR = 0xF82, /* str rt,[rn,rm,LSL #imm] [111110000010]
1969 rn[19-16] rt[15-12] [000000] imm[5-4] rm[3-0] */
1970 kMemOp2LdrhRRR = 0xF83, /* ldrh rt,[rn,rm,LSL #imm] [111110000011]
1971 rn[19-16] rt[15-12] [000000] imm[5-4] rm[3-0] */
1972 kMemOp2StrRRR = 0xF84, /* str rt,[rn,rm,LSL #imm] [111110000100]
1973 rn[19-16] rt[15-12] [000000] imm[
2186 int imm = (insn >> 6) & 0x1F; local
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