1%verify "executed"
2%verify "basic lt, gt, eq"
3%verify "hi equal, lo <=>"
4%verify "lo equal, hi <=>"
5    /*
6     * Compare two 64-bit values.  Puts 0, 1, or -1 into the destination
7     * register based on the results of the comparison.
8     */
9    // TUNING: rework to avoid rIBASE spill
10    /* cmp-long vAA, vBB, vCC */
11    movzbl    2(rPC),%ecx              # ecx<- BB
12    SPILL(rIBASE)
13    movzbl    3(rPC),rIBASE            # rIBASE- CC
14    GET_VREG_WORD %eax %ecx,1          # eax<- v[BB+1]
15    GET_VREG_WORD %ecx %ecx 0          # ecx<- v[BB+0]
16    cmpl      4(rFP,rIBASE,4),%eax
17    jl        .L${opcode}_smaller
18    jg        .L${opcode}_bigger
19    sub       (rFP,rIBASE,4),%ecx
20    ja        .L${opcode}_bigger
21    jb        .L${opcode}_smaller
22    SET_VREG %ecx rINST
23    FETCH_INST_OPCODE 2 %ecx
24    UNSPILL(rIBASE)
25    ADVANCE_PC 2
26    GOTO_NEXT_R %ecx
27
28.L${opcode}_bigger:
29    movl      $$1,%ecx
30    SET_VREG %ecx rINST
31    FETCH_INST_OPCODE 2 %ecx
32    UNSPILL(rIBASE)
33    ADVANCE_PC 2
34    GOTO_NEXT_R %ecx
35
36.L${opcode}_smaller:
37    movl      $$-1,%ecx
38    SET_VREG %ecx rINST
39    FETCH_INST_OPCODE 2 %ecx
40    UNSPILL(rIBASE)
41    ADVANCE_PC 2
42    GOTO_NEXT_R %ecx
43