History log of /external/llvm/lib/Target/ARM/Thumb2RegisterInfo.cpp
Revision Date Author Comments (<<< Hide modified files) (Show modified files >>>)
57148c166ab232191098492633c924fad9c44ef3 07-Jun-2013 Bill Wendling <isanbard@gmail.com> Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.


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0b8c9a80f20772c3793201ab5b251d3520b9cea3 02-Jan-2013 Chandler Carruth <chandlerc@gmail.com> Move all of the header files which are involved in modelling the LLVM IR
into their new header subdirectory: include/llvm/IR. This matches the
directory structure of lib, and begins to correct a long standing point
of file layout clutter in LLVM.

There are still more header files to move here, but I wanted to handle
them in separate commits to make tracking what files make sense at each
layer easier.

The only really questionable files here are the target intrinsic
tablegen files. But that's a battle I'd rather not fight today.

I've updated both CMake and Makefile build systems (I think, and my
tests think, but I may have missed something).

I've also re-sorted the includes throughout the project. I'll be
committing updates to Clang, DragonEgg, and Polly momentarily.

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d04a8d4b33ff316ca4cf961e06c9e312eff8e64f 03-Dec-2012 Chandler Carruth <chandlerc@gmail.com> Use the new script to sort the includes of every file under lib.

Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

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c1f6f42049696e7357fb4837e1b25dabbaed3fe6 17-Mar-2012 Craig Topper <craig.topper@gmail.com> Reorder includes to match coding standards. Fix an issue or two exposed by that.

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31d157ae1ac2cd9c787dc3c1d28e64c682803844 18-Feb-2012 Jia Liu <proljc@gmail.com> Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

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0d062c1e14af5653bb6a4719b06f168e2dc0f5db 18-Apr-2011 Jim Grosbach <grosbach@apple.com> Trim a few unneeded includes.

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3daccd82d3151fa3629de430b55698a81084fc9e 05-Mar-2011 Anton Korobeynikov <asl@math.spbu.ru> Implement frame unwinding information emission for Thumb1. Not finished yet because there is no way given the constpool index to examine the actual entry: the reason is clones inserted by constant island pass, which are not tracked at all! The only connection is done during asmprinting time via magic label names which is really gross and needs to be eventually fixed.

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16c29b5f285f375be53dabaa73e3e91107485fe4 10-Jan-2011 Anton Korobeynikov <asl@math.spbu.ru> Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.

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46510a73e977273ec67747eb34cbdb43f815e451 15-Apr-2010 Dan Gohman <gohman@apple.com> Add const qualifiers to CodeGen's use of LLVM IR constructs.


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ca5dfb71ba4aa4a8392a021ec056cf0b70f74f1e 28-Oct-2009 Jim Grosbach <grosbach@apple.com> Cleanup now that frame index scavenging via post-pass is working for ARM and Thumb2.

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f639e9f9e6a9f0315f018ee71f1e5ae744b0c519 25-Oct-2009 Jim Grosbach <grosbach@apple.com> 80-column cleanup

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62d1723a9cbce2019aac862f51952a58146a6bf0 22-Oct-2009 Evan Cheng <evan.cheng@apple.com> Trim more includes.

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1d0be15f89cb5056e20e2d24faa8d6afb1573bca 13-Aug-2009 Owen Anderson <resistor@mac.com> Push LLVMContexts through the IntegerType APIs.


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6495f63945e8dbde81f03a1dc2ab421993b9a495 28-Jul-2009 Evan Cheng <evan.cheng@apple.com> - More refactoring. This gets rid of all of the getOpcode calls.
- This change also makes it possible to switch between ARM / Thumb on a
per-function basis.
- Fixed thumb2 routine which expand reg + arbitrary immediate. It was using
using ARM so_imm logic.
- Use movw and movt to do reg + imm when profitable.
- Other code clean ups and minor optimizations.


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30b2bdfa734d59bb7bc769dc2f06e4900a77f6f8 26-Jul-2009 Evan Cheng <evan.cheng@apple.com> Refactor. Get rid of a few more getOpcode() calls.

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c6b54d5a33ca5341da8d6ccc3140a5b67475e7f4 25-Jul-2009 Evan Cheng <evan.cheng@apple.com> Get rid of a couple of unnecessary getOpcode calls.

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eed707b1e6097aac2bb6b3d47271f6300ace7f2e 25-Jul-2009 Owen Anderson <resistor@mac.com> Revert the ConstantInt constructors back to their 2.5 forms where possible, thanks to contexts-on-types. More to come.


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865763bf80625aa3f06116335b067bf7ad76061c 24-Jul-2009 Evan Cheng <evan.cheng@apple.com> Thumb2 should use the register scavenger.

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5ff58b5c3ab6df332600678798ea5c69c5e943d3 24-Jul-2009 David Goodwin <david_goodwin@apple.com> Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index elimination more exactly for Thumb-2 to get better code gen.


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e922c0201916e0b980ab3cfe91e1413e68d55647 22-Jul-2009 Owen Anderson <resistor@mac.com> Get rid of the Pass+Context magic.


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378445303b10b092a898a75131141a8259cff50b 16-Jul-2009 Evan Cheng <evan.cheng@apple.com> Let callers decide the sub-register index on the def operand of rematerialized instructions.
Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right.


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9adc0abad3c3ed40a268ccbcee0c74cb9e1359fe 15-Jul-2009 Owen Anderson <resistor@mac.com> Move EVER MORE stuff over to LLVMContext.


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f1daf7d8abebd6e0104a6b41a774ccbb19a51c60 09-Jul-2009 David Goodwin <david_goodwin@apple.com> Use common code for both ARM and Thumb-2 instruction and register info.


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dac237e18209b697a8ba122d0ddd9cad4dfba1f8 08-Jul-2009 Torok Edwin <edwintorok@gmail.com> Implement changes from Chris's feedback.
Finish converting lib/Target.


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77521f5232e679aa3de10aaaed2464aa91d7ff55 08-Jul-2009 David Goodwin <david_goodwin@apple.com> Generalize opcode selection in ARMBaseRegisterInfo.


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db5a71a8e01ed9a0d93a19176df6ea0aea510d7b 08-Jul-2009 David Goodwin <david_goodwin@apple.com> Push methods into base class in preparation for sharing.


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ab7c09b6b6f4516a631fd6788918c237c83939af 08-Jul-2009 Torok Edwin <edwintorok@gmail.com> Start converting to new error handling API.
cerr+abort -> llvm_report_error
assert(0)+abort -> LLVM_UNREACHABLE (assert(0)+llvm_unreachable-> abort() included)


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b50ea5c48f8b1ce259e034ca5c16dc14af1a582c 03-Jul-2009 David Goodwin <david_goodwin@apple.com> Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1InstrInfo, Thumb2InstrInfo, Thumb1RegisterInfo and Thumb2RegisterInfo. Move methods from ARMInstrInfo to ARMBaseInstrInfo to prepare for sharing with Thumb2.


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