History log of /external/llvm/utils/TableGen/CodeGenInstruction.cpp
Revision Date Author Comments (<<< Hide modified files) (Show modified files >>>)
4ffd89fa4d2788611187d1a534d2ed46adf1702c 04-Dec-2012 Chandler Carruth <chandlerc@gmail.com> Sort the #include lines for utils/...

I've tried to find main moudle headers where possible, but the TableGen
stuff may warrant someone else looking at it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169251 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
61131ab15fd593a2e295d79fe2714e7bc21f2ec8 25-Oct-2012 Joerg Sonnenberger <joerg@bec.de> Remove exception handling usage from tblgen.

Most places can use PrintFatalError as the unwinding mechanism was not
used for anything other than printing the error. The single exception
was CodeGenDAGPatterns.cpp, where intermediate errors during type
resolution were ignored to simplify incremental platform development.
This use is replaced by an error flag in TreePattern and bailout earlier
in various places if it is set.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166712 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
64486737d59c835725c61c96511beeff7e31f403 21-Oct-2012 Lang Hames <lhames@gmail.com> Allow the commuted form of tied-operand constraints in tablegen ("$dst = $src",
rather than "$src = $dst").


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166382 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
3f7b7f8ce0b050fc6a0100839d9c5a84198b2aed 10-Oct-2012 Sean Silva <silvas@purdue.edu> tblgen: Use semantically correct RTTI functions.

Also, some minor cleanup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165647 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
6cfc806a6b82b60a3e923b6b89f2b4da62cdb50b 10-Oct-2012 Sean Silva <silvas@purdue.edu> tblgen: Mechanically move dynamic_cast<> to dyn_cast<>.

Some of these dyn_cast<>'s would be better phrased as isa<> or cast<>.
That will happen in a future patch.

There are also two dyn_cast_or_null<>'s slipped in instead of
dyn_cast<>'s, since they were causing crashes with just dyn_cast<>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165646 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
83c0eefa3b4698edd007a4cb24d550fd42566063 12-Sep-2012 Owen Anderson <resistor@mac.com> Improve tblgen code cleanliness: create an unknown_class, from which the unknown def inherits. Make tblgen check for that class, rather than checking for the def itself.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163664 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
912519a72eb9ed2d8c957ae8b08d95d9e080dac8 24-Aug-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Heed guessInstructionProperties, and stop warning on redundant flags.

Emit TableGen errors if guessInstructionProperties is 0 and
instruction properties can't be inferred from patterns.

Allow explicit instruction properties even when they can be inferred.

This patch doesn't change the TableGen output. Redundant properties
are not yet verified because the tree has errors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162516 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
c1f10fd5b9a780d1c42dca7143d7a8acd9bd9377 23-Aug-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Tristate mayLoad, mayStore, and hasSideEffects.

Keep track of the set/unset state of these bits along with their
true/false values, but treat '?' as '0' for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162461 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
376a8a773e38fdcd9102a40e08ab1e0661d645d9 23-Aug-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Print out the location of expanded multiclass defs in TableGen errors.

When reporting an error for a defm, we would previously only report the
location of the outer defm, which is not always where the error is.

Now we also print the location of the expanded multiclass defs:

lib/Target/X86/X86InstrSSE.td:2902:12: error: foo
defm ADD : basic_sse12_fp_binop_s<0x58, "add", fadd, SSE_ALU_ITINS_S>,
^
lib/Target/X86/X86InstrSSE.td:2801:11: note: instantiated from multiclass
defm PD : sse12_fp_packed<opc, !strconcat(OpcodeStr, "pd"), OpNode, VR128,
^
lib/Target/X86/X86InstrSSE.td:194:5: note: instantiated from multiclass
def rm : PI<opc, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
^

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162409 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
f2c64ef519b38a4328809b27b4a3a8e0c26e9709 17-Aug-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Add an MCID::Select flag and TII hooks for optimizing selects.

Select instructions pick one of two virtual registers based on a
condition, like x86 cmov. On targets like ARM that support predication,
selects can sometimes be eliminated by predicating the instruction
defining one of the operands.

Teach PeepholeOptimizer to recognize select instructions, and ask the
target to optimize them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162059 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
7e8921b0d17db6a2a0f98dcc791f136750b825c9 08-Jun-2012 Owen Anderson <resistor@mac.com> Teach the AsmMatcherEmitter to allow InstAlias' where the suboperands of a complex operand are called out explicitly in the asm string.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158183 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
bfc9429c2b814469adf3930dda31539d1c3319d8 15-Nov-2011 Jim Grosbach <grosbach@apple.com> ARM parsing datatype suffix variants for fixed-writeback VLD1/VST1 instructions.

rdar://10435076

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144606 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
2a8cd57566dd0eb62831b4c7429e46947a52a879 15-Nov-2011 Jim Grosbach <grosbach@apple.com> Tidy up. Formatting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144598 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
48c1f84b104fd32109d809a56f5ebbf461c0910c 29-Oct-2011 Jim Grosbach <grosbach@apple.com> Allow InstAlias's to use immediate matcher patterns that xform the value.

For example,

On ARM, "mov r3, #-3" is an alias for "mvn r3, #2", so we want to use a
matcher pattern that handles the bitwise negation when mapping to t2MVNi.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143233 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
be5d6bcfc6ad4d5b771bb491c8ec6c87fcd3c425 28-Oct-2011 Jim Grosbach <grosbach@apple.com> Allow register classes to match a containing class in InstAliases.

If the register class in the source alias is a subclass of the register class
of the actual instruction, the alias can still match OK since the constraints
are strictly a subset of what the instruction can actually handle.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143200 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
7c788888872233748da10a8177a9a1eb176c1bc8 01-Oct-2011 Peter Collingbourne <peter@pcc.me.uk> Move TableGen's parser and entry point into a library

This is the first step towards splitting LLVM and Clang's tblgen executables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140951 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
83a8031336a1155e6b0c3e9a84164324e08d1c8b 20-Sep-2011 Andrew Trick <atrick@apple.com> Restore hasPostISelHook tblgen flag.

No functionality change. The hook makes it explicit which patterns
require "special" handling. i.e. it self-documents tblgen
deficiencies. I plan to add verification in ExpandISelPseudos and
Thumb2SizeReduce to catch any missing hasPostISelHooks. Otherwise it's
too fragile.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140160 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
4815d56bb2c356a610f46753c5f1cefafa113b21 20-Sep-2011 Andrew Trick <atrick@apple.com> ARM isel bug fix for adds/subs operands.

Modified ARMISelLowering::AdjustInstrPostInstrSelection to handle the
full gamut of CPSR defs/uses including instructins whose "optional"
cc_out operand is not really optional. This allowed removal of the
hasPostISelHook to simplify the .td files and make the implementation
more robust.
Fixes rdar://10137436: sqlite3 miscompile


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140134 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
37fefc20d3a1e3934a377567d54a141f67752227 30-Aug-2011 Evan Cheng <evan.cheng@apple.com> Follow up to r138791.

Add a instruction flag: hasPostISelHook which tells the pre-RA scheduler to
call a target hook to adjust the instruction. For ARM, this is used to
adjust instructions which may be setting the 's' flag. ADC, SBC, RSB, and RSC
instructions have implicit def of CPSR (required since it now uses CPSR physical
register dependency rather than "glue"). If the carry flag is used, then the
target hook will *fill in* the optional operand with CPSR. Otherwise, the hook
will remove the CPSR implicit def from the MachineInstr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138810 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
c68e927488819efd671207786baadce6cae7266c 19-Aug-2011 Jim Grosbach <grosbach@apple.com> Allow non zero_reg explicit values for OptionalDefOperands in aliases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138073 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
f2764c89083183e0e5da800af18b23bc67937734 19-Aug-2011 Jim Grosbach <grosbach@apple.com> Tidy up. Formatting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138067 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
05bce0beee87512e52428d4b80f5a8e79a949576 30-Jul-2011 David Greene <greened@obbligato.org> Unconstify Inits

Remove const qualifiers from Init references, per Chris' request.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136531 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
f37dd02f7743ebd2424480361f5a7db510495c4f 29-Jul-2011 David Greene <greened@obbligato.org> [AVX] Constify Inits

Make references to Inits const everywhere. This is the final step
before making them unique.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136485 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
c30a38f34bdfecb99ce49e3ffa479039c9bf0209 21-Jul-2011 Chris Lattner <sabre@nondot.org> move tier out of an anonymous namespace, it doesn't make sense
to for it to be an an anon namespace and be in a header.

Eliminate some extraenous uses of tie.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135669 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
5196c12e9fdec9ef3c63d96cb529c1c1cb732773 14-Jul-2011 Benjamin Kramer <benny.kra@googlemail.com> Add a new field to MCOperandInfo that contains information about the type of the Operand.

- The actual values are from the MCOI::OperandType enum.
- Teach tblgen to read it from the instruction definition.
- This is a better implementation of the hacks in edis.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135197 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
d568b3f55294917d1cc701da14a8a7daeb6563e6 12-Jul-2011 Eric Christopher <echristo@apple.com> Revert r134921, 134917, 134908 and 134907. They're causing failures
in multiple buildbots.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134936 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
d4a9066c93da9a5aab47ca228d82e796fdec70c0 11-Jul-2011 David Greene <greened@obbligato.org> [AVX] Make Inits Foldable

Manage Inits in a FoldingSet. This provides several benefits:

- Memory for Inits is properly managed

- Duplicate Inits are folded into Flyweights, saving memory

- It enforces const-correctness, protecting against certain classes
of bugs

The above benefits allow Inits to be used in more contexts, which in
turn provides more dynamism to TableGen. This enhanced capability
will be used by the AVX code generator to a fold common patterns
together.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134907 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
e727d67c585ae8d4779ddd29490d9009cfc8e845 07-Jul-2011 Jim Grosbach <grosbach@apple.com> Add isCodeGenOnly value to the CodeGenInstruction class.

So users of a CGI don't have to look up the value directly from the original
Record; just like the rest of the convenience values in the class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134576 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
806fcc040e0bc7962891f12d6e09fc86f0bc2184 06-Jul-2011 Jim Grosbach <grosbach@apple.com> Don't require pseudo-instructions to carry encoding information.

For now this is distinct from isCodeGenOnly, as code-gen-only
instructions can (and often do) still have encoding information
associated with them. Once we've migrated all of them over to true
pseudo-instructions that are lowered to real instructions prior to
the printer/emitter, we can remove isCodeGenOnly and just use isPseudo.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134539 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
bea6f615eefae279e53bbb63a31d2c3c67274c45 27-Jun-2011 Owen Anderson <resistor@mac.com> Add support for alternative register names, useful for instructions whose operands are logically equivalent to existing registers, but happen to be printed specially. For example, an instruciton that prints d0[0] instead of s0.
Patch by Jim Grosbach.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133940 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
0b6a44afb92fed0365b6709c1f46b0c5e49e1a72 22-Jun-2011 Jim Grosbach <grosbach@apple.com> Consolidate some TableGen diagnostic helper functions.

TableGen had diagnostic printers sprinkled about in a few places. Pull them
together into a single location in Error.cpp.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133568 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
ae1920b1efa72c1789d562df4746110d0c2e10bd 15-Jun-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Give CodeGenRegisterClass a real sorted member set.

Make the Elements vector private and expose an ArrayRef through
getOrder() instead. getOrder will eventually provide multiple
user-specified allocation orders.

Use the sorted member set for member and subclass tests. Clean up a lot
of ad hoc searches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133040 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
0f040a258ff6a2372fc232212b5e4189e8e7185d 15-Mar-2011 Evan Cheng <evan.cheng@apple.com> - Add "Bitcast" target instruction property for instructions which perform
nothing more than a bitcast.
- Teach tablegen to automatically infer "Bitcast" property.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127667 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
a49c7dfb360154070c08b8eb94ad31711d1babae 26-Jan-2011 Bob Wilson <bob.wilson@apple.com> Improve the AsmMatcher's ability to handle suboperands.

When an operand class is defined with MIOperandInfo set to a list of
suboperands, the AsmMatcher has so far required that operand to also define
a custom ParserMatchClass, and InstAlias patterns have not been able to
set the individual suboperands separately. This patch removes both of those
restrictions. If a "compound" operand does not override the default
ParserMatchClass, then the AsmMatcher will now parse its suboperands
separately. If an InstAlias operand has the same class as the corresponding
compound operand, then it will be handled as before; but if that check fails,
TableGen will now try to match up a sequence of InstAlias operands with the
corresponding suboperands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124314 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
36c3bc431b92f1573b3f3bd75b644774681998ee 26-Jan-2011 NAKAMURA Takumi <geek4civic@gmail.com> TableGen: PointerLikeRegClass can be accepted to operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124271 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
e5fffe9c3fa402cb5d5167327783f82b86f52b8f 26-Jan-2011 NAKAMURA Takumi <geek4civic@gmail.com> Fix whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124270 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
55931ab992d8f7fd23d1e8fa994cd8b03b98569f 20-Jan-2011 Bob Wilson <bob.wilson@apple.com> Move InstAlias check of argument types to a separate loop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123934 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
47c90a70bafafeb8c9d27d3528f69bed57ea028e 20-Jan-2011 Bob Wilson <bob.wilson@apple.com> Fix broken check for InstAlias argument used with different types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123932 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
5e8f2a65ca2044815039129610876dfc4de3ebfa 20-Jan-2011 Bob Wilson <bob.wilson@apple.com> Precompute InstAlias operand mapping to result instruction operand indices.

There should be no functional change from this, but I think it's simpler this
way.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123931 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
dc1a2bd3aa199693413f39dd723cc14a77e9f131 14-Jan-2011 Bob Wilson <bob.wilson@apple.com> Fix some tablegen issues to allow using zero_reg for InstAlias definitions.

This is needed to allow an InstAlias for an instruction with an "OptionalDef"
result register (like ARM's cc_out) where you want to set the optional register
to reg0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123490 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
c4af4638dfdab0dc3b6257276cfad2ee45053060 17-Nov-2010 Evan Cheng <evan.cheng@apple.com> Remove ARM isel hacks that fold large immediates into a pair of add, sub, and,
and xor. The 32-bit move immediates can be hoisted out of loops by machine
LICM but the isel hacks were preventing them.

Instead, let peephole optimization pass recognize registers that are defined by
immediates and the ARM target hook will fold the immediates in.

Other changes include 1) do not fold and / xor into cmp to isel TST / TEQ
instructions if there are multiple uses. This happens when the 'and' is live
out, machine sink would have sinked the computation and that ends up pessimizing
code. The peephole pass would recognize situations where the 'and' can be
toggled to define CPSR and eliminate the comparison anyway.

2) Move peephole pass to after machine LICM, sink, and CSE to avoid blocking
important optimizations.

rdar://8663787, rdar://8241368


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119548 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
2ac190238e88b21e716e2853900b5076c9013410 15-Nov-2010 Chris Lattner <sabre@nondot.org> add fields to the .td files unconditionally, simplifying tblgen a bit.
Switch the ARM backend to use 'let' instead of 'set' with this change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119120 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
90fd797dc739319347861d4f3984bc8952ae9a29 06-Nov-2010 Chris Lattner <sabre@nondot.org> add (and document) the ability for alias results to have
fixed physical registers. Start moving fp comparison
aliases to the .td file (which default to using %st1 if
nothing is specified).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118352 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
98c870f87b7f0c996a9ba67003d88d434d6dbcd0 06-Nov-2010 Chris Lattner <sabre@nondot.org> generalize alias support to allow the result of an alias to
add fixed immediate values. Move the aad and aam aliases to
use this, and document it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118350 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
5bde7345980587284bda6d42a68cdb151fbf5d6b 06-Nov-2010 Chris Lattner <sabre@nondot.org> fix a bug where we had an implicit assumption that the
result instruction operand numbering matched the result pattern.

Fixing this allows us to move the xchg/test aliases to the .td file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118334 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
414098571b19fc248fda2be194082cfd012d2729 06-Nov-2010 Chris Lattner <sabre@nondot.org> fix some bugs in the alias support, unblocking changing of "clr" aliases
from c++ hacks to proper .td InstAlias definitions. Change them!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118330 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
662e5a30e864e71111b885d3da3cdd184772035d 06-Nov-2010 Chris Lattner <sabre@nondot.org> Reimplement BuildResultOperands to be in terms of the result instruction's
operand list instead of the operand list redundantly declared on the alias
or instruction.

With this change, we finally remove the ins/outs list on the alias. Before:
def : InstAlias<(outs GR16:$dst), (ins GR8 :$src),
"movsx $src, $dst",
(MOVSX16rr8W GR16:$dst, GR8:$src)>;
After:
def : InstAlias<"movsx $src, $dst",
(MOVSX16rr8W GR16:$dst, GR8:$src)>;

This also makes the alias mechanism more general and powerful, which will
be exploited in subsequent patches.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118329 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
3f2c8e474b8775aa1f3c2c0cb817b7f9f564e068 06-Nov-2010 Chris Lattner <sabre@nondot.org> implement more checking to reject things like:
(someinst GR16:$foo, GR32:$foo)

Reimplement BuildAliasOperandReference to be correctly
based on the names of operands in the result pattern,
instead of on the instruction operand definitions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118328 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
d0f225cafc76ee2d4982c207c6afb25aaf176d12 06-Nov-2010 Chris Lattner <sabre@nondot.org> decode and validate instruction alias result definitions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118327 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
225549f775db61c5dba10e14758f4b43c53ef593 06-Nov-2010 Chris Lattner <sabre@nondot.org> disolve a hack, having CodeGenInstAlias decode the alias in the .td
file instead of the asmmatcher.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118324 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
b501d4f673c0db267a76800339f9943f2ce6fe33 01-Nov-2010 Chris Lattner <sabre@nondot.org> Implement enough of the missing instalias support to get
aliases installed and working. They now work when the
matched pattern and the result instruction have exactly
the same operand list.

This is now enough for us to define proper aliases for
movzx and movsx, implementing rdar://8017633 and PR7459.

Note that we do not accept instructions like:
movzx 0(%rsp), %rsi

GAS accepts this instruction, but it doesn't make any
sense because we don't know the size of the memory
operand. It could be 8/16/32 bits.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117901 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
c76e80ded753b78a72be0db40fcdba543435d818 01-Nov-2010 Chris Lattner <sabre@nondot.org> define a new CodeGenInstAlias. It has an asmstring and operand list for now,
todo: the result field.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117894 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
c240bb0ede0541426254d0e0dc81d891beda4b22 01-Nov-2010 Chris Lattner <sabre@nondot.org> factor the operand list (and related fields/operations) out of
CodeGenInstruction into its own helper class. No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117893 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
79b3cddfa2eeb9ed7f93daf8e4f3c3d87779c3ab 01-Nov-2010 Chris Lattner <sabre@nondot.org> avoid needless throw/catch/rethrow, stringref'ize some simple stuff.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117892 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
f78081145695baa5d0b004e674c4561245b13b52 01-Nov-2010 Chris Lattner <sabre@nondot.org> eliminate the old InstFormatName which is always "AsmString",
simplify CodeGenInstruction. No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117891 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
4d43d0fd996a01c2cd21fd51082bc1bba783ef3c 01-Nov-2010 Chris Lattner <sabre@nondot.org> move FlattenVariants out of AsmMatcherEmitter into a shared
CodeGenInstruction::FlattenAsmStringVariants method. Use it
to simplify the code in AsmWriterInst, which now no longer
needs to worry about variants.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117886 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
5013f7469ec44adba127de65517e699180ee532f 13-Oct-2010 Jim Grosbach <grosbach@apple.com> Allow targets to optionally specify custom binary encoder functions for
operand values. This is useful for operands which require additional trickery
to encode into the instruction. For example, the ARM shifted immediate and
shifted register operands.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116353 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
01855071e24e0e3e75306b82267d3ad0b13a0c15 11-Oct-2010 Jim Grosbach <grosbach@apple.com> When figuring out which operands match which encoding fields in an instruction,
try to match them by name first. If there is no by-name match, fall back to
assuming they are in order (this was the previous behavior).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116211 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
f523e476c2e199220306b367b7bd834978fb93d6 24-Sep-2010 Owen Anderson <resistor@mac.com> Revert r114703 and r114702, removing the isConditionalMove flag from instructions. After further
reflection, this isn't going to achieve the purpose I intended it for. Back to the drawing board!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114710 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
5716180b1a863d345127fa8f9dfe0a931ab7370c 24-Sep-2010 Owen Anderson <resistor@mac.com> Add an TargetInstrDesc bit to indicate that a given instruction is a conditional move.
Not intended functionality change, as nothing uses this yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114702 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
73739d0bf19af3944aff6afaea2c4eda61061652 08-Aug-2010 Bill Wendling <isanbard@gmail.com> Add back in r109901, which adds a Compare flag to the target instructions. It's
useful after all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110531 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
5b55ff0c1555031c1c85f88d67c3b566750a9319 06-Aug-2010 Bill Wendling <isanbard@gmail.com> Revert r109901. The implementation of <rdar://problem/7405933> (r110423) doesn't
need the Compare flag after all.

--- Reverse-merging r109901 into '.':
U include/llvm/Target/TargetInstrDesc.h
U include/llvm/Target/Target.td
U utils/TableGen/InstrInfoEmitter.cpp
U utils/TableGen/CodeGenInstruction.cpp
U utils/TableGen/CodeGenInstruction.h



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110424 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
1844b1a5a483b8f01f29500a8d0d552447cbb7e5 31-Jul-2010 Bill Wendling <isanbard@gmail.com> Add a "Compare" flag to the target instruction descriptor. This will be used
later to identify and possibly remove superfluous compare instructions -- those
that are testing for and setting a status flag that should already be set.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109901 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
1f4a1493fb1f60547f84d2f3454c8ccd02895f83 21-Jun-2010 Eric Christopher <echristo@apple.com> Remove isTwoAddress from llvm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106470 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
9414ae52911f1d62cabd5108e0381b9d17476157 27-Mar-2010 Chris Lattner <sabre@nondot.org> hoist some funky logic into CodeGenInstruction
from two places in CodeGenDAGPatterns.cpp, and
use it in DAGISelMatcherGen.cpp instead of using
an incorrect predicate that happened to get lucky
on our current targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99726 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
f506b6b4718d8343c1133daca468e767cd5fb7ab 18-Mar-2010 Chris Lattner <sabre@nondot.org> capture implicit uses and defs in CodeGenInstruction


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98879 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
f55eed299b84a9312c3c112d59ff4e6cb048b795 18-Mar-2010 Chris Lattner <sabre@nondot.org> rewrite this to not artificially force concat the ins/outs list.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98870 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
b0be4d261b1ebd0e364e3e8b5e5f124c1e7b96b5 18-Mar-2010 Chris Lattner <sabre@nondot.org> eliminate support for "ops" in the input/output list of an
instruction. Instructions must use 'ins' and 'outs' now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98868 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
cedef1ccf0d53693b5e62d524e7ba6b2122231c7 18-Mar-2010 Chris Lattner <sabre@nondot.org> remove some code that was working around old sparc v9 backend bugs.
Add checking that the input/output operand list in spelled right.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98865 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
bc9d98b52d008d857c7423d7b43fb32022b926a2 28-Feb-2010 Dan Gohman <gohman@apple.com> The mayHaveSideEffects flag is no longer used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97348 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
a7d479c7bd9723cabdd7c9e1e9a1e6e482f78e7e 10-Feb-2010 Chris Lattner <sabre@nondot.org> Introduce a new CodeGenInstruction::ConstraintInfo class
for representing constraint info semantically instead of
as a c expression that will be blatted out to the .inc
file. Fix X86RecognizableInstr to use this instead of
parsing C code :).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95753 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
d4f195999a7774611e5f9e457a86f14d5e257324 11-Jan-2010 Benjamin Kramer <benny.kra@googlemail.com> Reimplement getToken and SplitString as "StringRef helper functions"

- getToken is modeled after StringRef::split but it can split on multiple
separator chars and skips leading seperators.
- SplitString is a StringRef::split variant for more than 2 elements with the
same behaviour as getToken.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93161 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
06801722a43c697eff0acee905de6b50257ce19b 16-Dec-2009 Jim Grosbach <grosbach@apple.com> Add @earlyclobber TableGen constraint

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91554 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
f0a4fad9957bf5c088d61ff78067d83d23fae19c 15-Dec-2009 Jim Grosbach <grosbach@apple.com> whitespace

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91442 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
533297b58da8c74bec65551e1aface9801fc2259 29-Oct-2009 Dan Gohman <gohman@apple.com> Rename usesCustomDAGSchedInserter to usesCustomInserter, and update a
bunch of associated comments, because it doesn't have anything to do
with DAGs or scheduling. This is another step in decoupling MachineInstr
emitting from scheduling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85517 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
799d697bf8d45ec404d0d105fc788ea5cf81c841 01-Oct-2009 Evan Cheng <evan.cheng@apple.com> Add instruction flags: hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. When
set, these flags indicate the instructions source / def operands have special
register allocation requirement that are not captured in their register classes.
Post-allocation passes (e.g. post-alloc scheduler) should not change their
allocations. e.g. ARM::LDRD require the two definitions to be allocated
even / odd register pair.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83196 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
fd87e6a7aabfb9f813313c0eaa90302fd2f6d93c 27-Aug-2009 Bob Wilson <bob.wilson@apple.com> Fix bad length argument to substr calls. Apparently I'm the first one to
attempt more than 2 constraints on an instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80169 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
e8cf21e8e3db64dd49777d6bf6c867d47e9f5407 23-Apr-2009 David Greene <greened@obbligato.org> Make BinOps typed and require a type specifier for !nameconcat. This
allows binops to be used in typed contexts such as when passing
arguments to classes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69921 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
c7cafcd815519b06318629b424abe746437e1389 22-Apr-2009 David Greene <greened@obbligato.org> Implement !nameconcat to concatenate strings and look up the resulting
name in the symbol table, returning an object.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69822 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
15511cf1660cfd6bb8b8e8fca2db9450f50430ee 03-Dec-2008 Dan Gohman <gohman@apple.com> Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60487 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
677fbfa45091c94a96287856cbac2eb3f5877c1e 27-Oct-2008 Matthijs Kooijman <matthijs@stdin.nl> Remove redundant word in tblgen error message.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58250 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
48c1bc2ace6481d3272ab5c18e1f19352c563be8 02-Oct-2008 Dale Johannesen <dalej@apple.com> Handle some 64-bit atomics on x86-32, some of the time.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56963 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
e4c67cdab4a2ad2ff53183ad32e77e8608c9262d 31-May-2008 Dan Gohman <gohman@apple.com> Teach the DAGISelEmitter to not compute the variable_ops operand
index for the input pattern in terms of the output pattern. Instead
keep track of how many fixed operands the input pattern actually
has, and have the input matching code pass the output-emitting
function that index value. This simplifies the code, disentangles
variables_ops from the support for predication operations, and
makes variable_ops more robust.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51808 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
d35121ad00667d93ea779a722dbee7d022410815 29-May-2008 Dan Gohman <gohman@apple.com> Fix a tblgen problem handling variable_ops in tblgen instruction
definitions. This adds a new construct, "discard", for indicating
that a named node in the input matching pattern is to be discarded,
instead of corresponding to a node in the output pattern. This
allows tblgen to know where the arguments for the varaible_ops are
supposed to begin.

This fixes "rdar://5791600", whatever that is ;-).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51699 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
8370d38adee63b3a4d87bfe81be4aacc55fe7cda 29-May-2008 Bill Wendling <isanbard@gmail.com> Add a flag to indicate that an instruction is as cheap (or cheaper) than a move
instruction to execute. This can be used for transformations (like two-address
conversion) to remat an instruction instead of generating a "move"
instruction. The idea is to decrease the live ranges and register pressure and
all that jazz.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51660 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
20ccded7dec5b90e58f649f4fb95b166a642b8cb 15-Mar-2008 Evan Cheng <evan.cheng@apple.com> Remove isImplicitDef TargetInstrDesc flag.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48381 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
5b4153710e0b94b0af10d4838216ee112d4b37bc 11-Mar-2008 Christopher Lamb <christopher.lamb@gmail.com> Recommitting changes after more testing. These appear to cause no problems.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48222 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
4499e495eabe8de7d595416a03c56af4688df507 10-Mar-2008 Evan Cheng <evan.cheng@apple.com> Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48167 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
620d7412508ae63378462df73d75706f19582646 10-Mar-2008 Christopher Lamb <christopher.lamb@gmail.com> Add support in TableGen for unknown operands that infer their type from the pattern their used in. This will be used to allow insert/extract subreg patterns in .td files!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48125 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
ba7e756c22446a17a72632b8d4ac66cbdaab33f7 10-Jan-2008 Chris Lattner <sabre@nondot.org> Start inferring side effect information more aggressively, and fix many bugs in the
x86 backend where instructions were not marked maystore/mayload, and perf issues where
instructions were not marked neverHasSideEffects. It would be really nice if we could
write patterns for copy instructions.

I have audited all the x86 instructions down to MOVDQAmr. The flags on others and on
other targets are probably not right in all cases, but no clients currently use this
info that are enabled by default.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45829 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
dcc8b4f5d3f62ae84aae100638085dedeee91588 08-Jan-2008 Chris Lattner <sabre@nondot.org> add a mayLoad property for machine instructions, a correlary to mayStore.
This is currently not set by anything.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45748 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
8f707e15fbd09ca948b86419bcb0c92470827ac9 07-Jan-2008 Chris Lattner <sabre@nondot.org> rename hasVariableOperands() -> isVariadic(). Add some comments.
Evan, please review the comments I added to getNumDefs to make sure
that they are accurate, thx.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45687 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
af3eb7c7583555ea5fd08e99f28b0042811e4dc2 07-Jan-2008 Chris Lattner <sabre@nondot.org> the name field of instructions is never set to a non-empty string,
just unconditionally use the def name of the instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45684 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
834f1ce0312e3d00d836f9560cb63182c2c4570f 07-Jan-2008 Chris Lattner <sabre@nondot.org> rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45667 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
2e48a70b35635165703838fc8d3796b664207aa1 06-Jan-2008 Chris Lattner <sabre@nondot.org> rename isStore -> mayStore to more accurately reflect what it captures.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45656 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp
6cc654b27a9d392ac7660afcb23e3c8136e9ab28 06-Jan-2008 Chris Lattner <sabre@nondot.org> Split the impl of CodeGenInstruction out to its own .cpp file, add a getName() accessor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45645 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/utils/TableGen/CodeGenInstruction.cpp