/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXFrameLowering.cpp | 35 MachineBasicBlock::iterator MBBI = MBB.begin(); local 47 MBB, MBBI, dl, tm.getInstrInfo()->get(NVPTX::cvta_local_yes_64), 54 MBB, MBBI, dl, tm.getInstrInfo()->get(NVPTX::cvta_local_yes),
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/external/llvm/lib/Target/ARM/ |
H A D | Thumb2RegisterInfo.cpp | 35 MachineBasicBlock::iterator &MBBI, 48 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2LDRpci)) 34 emitLoadConstPool(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned SubIdx, int Val, ARMCC::CondCodes Pred, unsigned PredReg, unsigned MIFlags) const argument
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H A D | ARMInstrInfo.cpp | 120 MachineBasicBlock::iterator MBBI = FirstMBB.begin(); local 121 DebugLoc DL = FirstMBB.findDebugLoc(MBBI); 126 MachineInstrBuilder MIB = BuildMI(FirstMBB, MBBI, DL,
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H A D | Thumb2InstrInfo.cpp | 63 MachineBasicBlock::iterator MBBI = Tail; local 66 --MBBI; 75 while (Count && MBBI != E) { 76 if (MBBI->isDebugValue()) { 77 --MBBI; 80 if (MBBI->getOpcode() == ARM::t2IT) { 81 unsigned Mask = MBBI->getOperand(1).getImm(); 83 MBBI->eraseFromParent(); 87 MBBI->getOperand(1).setImm((Mask & MaskOff) | MaskOn); 91 --MBBI; 212 emitT2RegPlusImmediate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned BaseReg, int NumBytes, ARMCC::CondCodes Pred, unsigned PredReg, const ARMBaseInstrInfo &TII, unsigned MIFlags) argument [all...] |
H A D | Thumb1FrameLowering.cpp | 38 MachineBasicBlock::iterator &MBBI, 42 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes, TII, 83 MachineBasicBlock::iterator MBBI = MBB.begin(); local 95 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); 109 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -ArgRegsSaveSize, 114 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes, 153 if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tPUSH) { 154 ++MBBI; 37 emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const TargetInstrInfo &TII, DebugLoc dl, const Thumb1RegisterInfo &MRI, int NumBytes, unsigned MIFlags = MachineInstr::NoFlags) argument 241 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); local [all...] |
H A D | Thumb1RegisterInfo.cpp | 65 MachineBasicBlock::iterator &MBBI, 78 BuildMI(MBB, MBBI, dl, TII.get(ARM::tLDRpci)) 91 MachineBasicBlock::iterator &MBBI, 117 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVi8), LdReg)) 120 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVi8), LdReg)) 122 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tRSB), LdReg)) 125 MRI.emitLoadConstPool(MBB, MBBI, dl, LdReg, 0, NumBytes, 131 BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg); 168 MachineBasicBlock::iterator &MBBI, 229 emitThumbRegPlusImmInReg(MBB, MBBI, d 64 emitLoadConstPool(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned SubIdx, int Val, ARMCC::CondCodes Pred, unsigned PredReg, unsigned MIFlags) const argument 90 emitThumbRegPlusImmInReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned BaseReg, int NumBytes, bool CanChangeCC, const TargetInstrInfo &TII, const ARMBaseRegisterInfo& MRI, unsigned MIFlags = MachineInstr::NoFlags) argument 167 emitThumbRegPlusImmediate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned BaseReg, int NumBytes, const TargetInstrInfo &TII, const ARMBaseRegisterInfo& MRI, unsigned MIFlags) argument 301 emitThumbConstant(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, unsigned DestReg, int Imm, const TargetInstrInfo &TII, const Thumb1RegisterInfo& MRI, DebugLoc dl) argument [all...] |
H A D | Thumb2ITBlockPass.cpp | 165 MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end(); local 166 while (MBBI != E) { 167 MachineInstr *MI = &*MBBI; 172 ++MBBI; 181 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(ARM::t2IT)) 190 ++MBBI; 197 for (; MBBI != E && Pos && 198 (!MI->isBranch() && !MI->isReturn()) ; ++MBBI) { 199 if (MBBI->isDebugValue()) 202 MachineInstr *NMI = &*MBBI; [all...] |
/external/llvm/lib/Target/Mips/ |
H A D | MipsInstrInfo.h | 86 MachineBasicBlock::iterator MBBI, 90 storeRegToStack(MBB, MBBI, SrcReg, isKill, FrameIndex, RC, TRI, 0); 94 MachineBasicBlock::iterator MBBI, 98 loadRegFromStack(MBB, MBBI, DestReg, FrameIndex, RC, TRI, 0); 85 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 93 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
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H A D | Mips16FrameLowering.cpp | 35 MachineBasicBlock::iterator MBBI = MBB.begin(); local 36 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); 47 TII.makeFrame(Mips::SP, StackSize, MBB, MBBI); 51 BuildMI(MBB, MBBI, dl, 57 BuildMI(MBB, MBBI, dl, 72 BuildMI(MBB, MBBI, dl, TII.get(Mips::MoveR3216), Mips::S0) 79 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); local 83 DebugLoc dl = MBBI->getDebugLoc(); 90 BuildMI(MBB, MBBI, d [all...] |
/external/llvm/lib/Target/Sparc/ |
H A D | SparcFrameLowering.cpp | 43 MachineBasicBlock::iterator MBBI = MBB.begin(); local 44 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); 60 BuildMI(MBB, MBBI, dl, TII.get(SAVEri), SP::O6) 66 BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1).addImm(OffHi); 68 BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1) 70 BuildMI(MBB, MBBI, dl, TII.get(SAVErr), SP::O6) 97 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); local 100 DebugLoc dl = MBBI->getDebugLoc(); 101 assert(MBBI [all...] |
H A D | DelaySlotFiller.cpp | 85 MachineBasicBlock::iterator MBBI); 461 MachineBasicBlock::iterator MBBI) 464 if (MBBI == MBB.begin()) 467 // assert that MBBI is a "restore %g0, %g0, %g0". 468 assert(MBBI->getOpcode() == SP::RESTORErr 469 && MBBI->getOperand(0).getReg() == SP::G0 470 && MBBI->getOperand(1).getReg() == SP::G0 471 && MBBI->getOperand(2).getReg() == SP::G0); 473 MachineBasicBlock::iterator PrevInst = MBBI; --PrevInst; 484 case SP::ADDri: return combineRestoreADD(MBBI, PrevIns 460 tryCombineRestoreWithPrevInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI) argument [all...] |
H A D | SparcInstrInfo.cpp | 381 MachineBasicBlock::iterator MBBI = FirstMBB.begin(); local 389 BuildMI(FirstMBB, MBBI, dl, get(SP::GETPCX), GlobalBaseReg);
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/external/llvm/include/llvm/CodeGen/ |
H A D | RegisterScavenging.h | 36 MachineBasicBlock::iterator MBBI; member in class:llvm::RegScavenger 66 /// before MBBI. One bit per physical register. If bit is set that means it's 93 while (MBBI != I) forward(); 102 while (MBBI != I) unprocess(); 109 MBBI = I; 113 return MBBI; 157 return scavengeRegister(RegClass, MBBI, SPAdj);
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/external/llvm/lib/CodeGen/ |
H A D | SlotIndexes.cpp | 177 MachineBasicBlock::iterator MBBI = End; local 179 while (ListI != ListB || MBBI != Begin || (includeStart && !pastStart)) { 185 MachineInstr *MI = (MBBI != MBB->end() && !pastStart) ? MBBI : 0; 186 bool MBBIAtBegin = MBBI == Begin && (!includeStart || pastStart); 190 if (MBBI != Begin) 191 --MBBI; 195 if (MBBI != Begin) 196 --MBBI;
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64RegisterInfo.cpp | 80 AArch64RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MBBI, argument 85 MachineInstr &MI = *MBBI; 142 emitRegUpdate(MBB, MBBI, MBBI->getDebugLoc(), TII,
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H A D | AArch64BranchFixupPass.cpp | 164 for (MachineFunction::iterator MBBI = MF->begin(), E = MF->end(); 165 MBBI != E; ++MBBI) { 166 MachineBasicBlock *MBB = MBBI; 239 MachineFunction::iterator MBBI = MBB; local 241 if (llvm::next(MBBI) == MBB->getParent()->end()) 244 MachineBasicBlock *NextBB = llvm::next(MBBI); 274 for (MachineFunction::iterator MBBI = MF->begin(), E = MF->end(); 275 MBBI != E; ++MBBI) { 366 MachineFunction::iterator MBBI = OrigBB; ++MBBI; local 552 MachineBasicBlock::iterator MBBI = MI; ++MBBI; local [all...] |
H A D | AArch64FrameLowering.cpp | 51 MachineBasicBlock::iterator MBBI = MBB.begin(); local 54 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); 89 emitSPUpdate(MBB, MBBI, DL, TII, AArch64::X16, -NumInitialBytes, 96 BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::PROLOG_LABEL)) 109 for (; MBBI != MBB.end(); ++MBBI) { 114 if (FPNeedsSetting && MBBI->getOpcode() == AArch64::LSPair64_STR 115 && MBBI->getOperand(0).getReg() == AArch64::X29) { 116 int64_t X29FrameIdx = MBBI 198 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); local 424 emitFrameMemOps(bool isPrologue, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI, const LoadStoreMethod PossClasses[], unsigned NumClasses) const argument 524 spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) const argument 544 restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const std::vector<CalleeSavedInfo> &CSI, const TargetRegisterInfo *TRI) const argument [all...] |
/external/llvm/lib/Target/MSP430/ |
H A D | MSP430FrameLowering.cpp | 48 MachineBasicBlock::iterator MBBI = MBB.begin(); local 49 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); 66 BuildMI(MBB, MBBI, DL, TII.get(MSP430::PUSH16r)) 70 BuildMI(MBB, MBBI, DL, TII.get(MSP430::MOV16rr), MSP430::FPW) 82 while (MBBI != MBB.end() && (MBBI->getOpcode() == MSP430::PUSH16r)) 83 ++MBBI; 85 if (MBBI != MBB.end()) 86 DL = MBBI 113 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); local [all...] |
/external/llvm/lib/Target/X86/ |
H A D | X86FrameLowering.cpp | 90 MachineBasicBlock::iterator &MBBI, 107 unsigned Opc = MBBI->getOpcode(); 121 for (unsigned i = 0, e = MBBI->getNumOperands(); i != e; ++i) { 122 MachineOperand &MO = MBBI->getOperand(i); 146 void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, argument 161 DebugLoc DL = MBB.findDebugLoc(MBBI); 169 : findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit); 174 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc)) 186 MI = addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr), 189 MI = BuildMI(MBB, MBBI, D 89 findDeadCallerSavedReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const TargetRegisterInfo &TRI, bool Is64Bit) argument [all...] |
H A D | X86PadShortFunction.cpp | 68 MachineBasicBlock::iterator &MBBI, 181 for (MachineBasicBlock::iterator MBBI = MBB->begin(); 182 MBBI != MBB->end(); ++MBBI) { 183 MachineInstr *MI = MBBI; 202 /// just prior to the return at MBBI 204 MachineBasicBlock::iterator &MBBI, 206 DebugLoc DL = MBBI->getDebugLoc(); 209 BuildMI(*MBB, MBBI, DL, TII->get(X86::NOOP)); 210 BuildMI(*MBB, MBBI, D 203 addPadding(MachineBasicBlock *MBB, MachineBasicBlock::iterator &MBBI, unsigned int NOOPsToAdd) argument [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
H A D | AMDGPUInstrInfo.cpp | 80 MachineBasicBlock::iterator &MBBI, 79 convertToThreeAddress(MachineFunction::iterator &MFI, MachineBasicBlock::iterator &MBBI, LiveVariables *LV) const argument
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonFrameLowering.cpp | 79 MachineBasicBlock::iterator MBBI = MBB.begin(); local 82 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); 139 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); local 140 unsigned RetOpcode = MBBI->getOpcode(); 147 MachineBasicBlock::iterator MBBI = prior(MBB.end()); local 148 DebugLoc dl = MBBI->getDebugLoc(); 154 MachineBasicBlock::iterator MBBI = prior(MBB.end()); local 159 if (MBBI->getOpcode() == Hexagon::EH_RETURN_JMPR) { 160 assert(MBBI [all...] |
/external/llvm/lib/Target/R600/ |
H A D | AMDGPUInstrInfo.cpp | 81 MachineBasicBlock::iterator &MBBI, 80 convertToThreeAddress(MachineFunction::iterator &MFI, MachineBasicBlock::iterator &MBBI, LiveVariables *LV) const argument
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/external/llvm/lib/Target/XCore/ |
H A D | XCoreFrameLowering.cpp | 92 MachineBasicBlock::iterator MBBI = MBB.begin(); local 98 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); 104 loadFromStack(MBB, MBBI, XCore::R11, 0, dl, TII); 130 BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(FrameSize); 136 BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(FrameLabel); 141 storeToStack(MBB, MBBI, XCore::LR, LRSpillOffset + FrameSize*4, dl, TII); 146 BuildMI(MBB, MBBI, dl, TII.get(XCore::PROLOG_LABEL)).addSym(SaveLRLabel); 153 storeToStack(MBB, MBBI, XCore::R10, FPSpillOffset + FrameSize*4, dl, TII); 158 BuildMI(MBB, MBBI, d 175 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); local [all...] |
/external/mesa3d/src/gallium/drivers/radeon/ |
H A D | AMDGPUInstrInfo.cpp | 80 MachineBasicBlock::iterator &MBBI, 79 convertToThreeAddress(MachineFunction::iterator &MFI, MachineBasicBlock::iterator &MBBI, LiveVariables *LV) const argument
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