Searched defs:OpReg (Results 1 - 6 of 6) sorted by relevance

/external/llvm/lib/Target/ARM/
H A DA15SDOptimizer.cpp310 unsigned OpReg = MI->getOperand(I).getReg(); local
312 if (!TRI->isVirtualRegister(OpReg))
315 MachineInstr *Def = MRI->getVRegDef(OpReg);
H A DARMFastISel.cpp1335 unsigned OpReg = getRegForValue(TI->getOperand(0)); local
1338 .addReg(OpReg).addImm(1));
/external/llvm/lib/CodeGen/SelectionDAG/
H A DFastISel.cpp896 unsigned OpReg = getRegForValue(BinaryOperator::getFNegArgument(I)); local
897 if (OpReg == 0) return false;
904 ISD::FNEG, OpReg, OpRegIsKill);
918 ISD::BITCAST, OpReg, OpRegIsKill);
/external/llvm/lib/CodeGen/
H A DMachineInstr.cpp1699 unsigned OpReg = MO.getReg(); local
1700 if (OpReg == Reg || (RegInfo && RegInfo->isSuperRegister(Reg, OpReg)))
/external/llvm/lib/Target/X86/
H A DX86FastISel.cpp1164 unsigned OpReg = getRegForValue(TI->getOperand(0)); local
1165 if (OpReg == 0) return false;
1167 .addReg(OpReg).addImm(1);
1187 unsigned OpReg = getRegForValue(BI->getCondition()); local
1188 if (OpReg == 0) return false;
1191 .addReg(OpReg).addImm(1);
1200 unsigned CReg = 0, OpReg = 0; local
1206 case Instruction::LShr: OpReg = X86::SHR8rCL; break;
1207 case Instruction::AShr: OpReg = X86::SAR8rCL; break;
1208 case Instruction::Shl: OpReg
1477 unsigned OpReg = getRegForValue(V); local
1496 unsigned OpReg = getRegForValue(V); local
[all...]
/external/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp5182 unsigned OpReg = Inst.getOperand(i).getReg(); local
5183 if (OpReg == Reg)
5186 if (!isARMLowRegister(OpReg) && (!HiReg || OpReg != HiReg))
5196 unsigned OpReg = Inst.getOperand(i).getReg(); local
5197 if (OpReg == Reg)

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