/external/llvm/lib/CodeGen/ |
H A D | IntrinsicLowering.cpp | 178 Value *Tmp2 = Builder.CreateLShr(V, ConstantInt::get(V->getType(), 8), local 180 V = Builder.CreateOr(Tmp1, Tmp2, "bswap.i16"); 188 Value *Tmp2 = Builder.CreateLShr(V, ConstantInt::get(V->getType(), 8), local 195 Tmp2 = Builder.CreateAnd(Tmp2, 199 Tmp2 = Builder.CreateOr(Tmp2, Tmp1, "bswap.or2"); 200 V = Builder.CreateOr(Tmp4, Tmp2, "bswap.i32"); 217 Value* Tmp2 = Builder.CreateLShr(V, local 243 Tmp2 [all...] |
/external/clang/lib/StaticAnalyzer/Core/ |
H A D | ExprEngineC.cpp | 31 ExplodedNodeSet Tmp2; local 55 evalStore(Tmp2, B, LHS, *it, state->BindExpr(B, LCtx, ExprVal), 61 StmtNodeBuilder Bldr(*it, Tmp2, *currBldrCtx); 172 evalStore(Tmp2, B, LHS, *I, state, location, LHSVal); 177 getCheckerManager().runCheckersForPostStmt(Dst, Tmp2, B, *this);
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H A D | CheckerManager.cpp | 108 ExplodedNodeSet Tmp1, Tmp2; local 116 CurrSet = (PrevSet == &Tmp1) ? &Tmp2 : &Tmp1;
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeDAG.cpp | 579 SDValue Tmp2 = Val; local 609 Ch = DAG.getTruncStore(Ch, dl, Tmp2, StackPtr2, MachinePointerInfo(), EltVT, 1503 SDValue Tmp2 = Node->getOperand(1); 1508 EVT FloatVT = Tmp2.getValueType(); 1512 SignBit = DAG.getNode(ISD::BITCAST, dl, IVT, Tmp2); 1520 DAG.getStore(DAG.getEntryNode(), dl, Tmp2, StackPtr, MachinePointerInfo(), 1569 SDValue Tmp2 = SDValue(Node, 1); 1578 SDValue Size = Tmp2.getOperand(1); 1589 Tmp2 = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(0, true), 1594 Results.push_back(Tmp2); [all...] |
H A D | LegalizeFloatTypes.cpp | 1295 SDValue Tmp1, Tmp2, Tmp3; local 1298 Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSLo.getValueType()), 1300 Tmp3 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2); 1303 Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()), 1305 Tmp1 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2);
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H A D | LegalizeIntegerTypes.cpp | 2564 // Tmp2 = hi(op1) < hi(op2) // Signedness depends on operands 2565 // dest = hi(op1) == hi(op2) ? Tmp1 : Tmp2; 2570 SDValue Tmp1, Tmp2; local 2576 Tmp2 = TLI.SimplifySetCC(getSetCCResultType(LHSHi.getValueType()), 2578 if (!Tmp2.getNode()) 2579 Tmp2 = DAG.getNode(ISD::SETCC, dl, 2584 ConstantSDNode *Tmp2C = dyn_cast<ConstantSDNode>(Tmp2.getNode()); 2595 NewLHS = Tmp2; 2607 NewLHS, Tmp1, Tmp2);
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H A D | SelectionDAG.cpp | 2132 unsigned Tmp, Tmp2; local 2162 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2163 return std::max(Tmp, Tmp2); 2188 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2189 FirstAnswer = std::min(Tmp, Tmp2); 2199 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2200 return std::min(Tmp, Tmp2); 2255 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2256 if (Tmp2 == 1) return 1; 2257 return std::min(Tmp, Tmp2) [all...] |
/external/llvm/lib/Transforms/Utils/ |
H A D | IntegerDivision.cpp | 107 Value *Tmp2 = Builder.CreateXor(Tmp, Dividend); local 108 Value *U_Dvnd = Builder.CreateSub(Tmp2, Tmp); 230 Value *Tmp2 = Builder.CreateSub(ThirtyOne, SR); local 231 Value *Q = Builder.CreateShl(Dividend, Tmp2);
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/external/llvm/lib/Analysis/ |
H A D | ValueTracking.cpp | 1131 unsigned Tmp, Tmp2; local 1162 Tmp2 = ShAmt->getZExtValue(); 1163 if (Tmp2 >= TyBits || // Bad shift. 1164 Tmp2 >= Tmp) break; // Shifted all sign bits out. 1165 return Tmp - Tmp2; 1175 Tmp2 = ComputeNumSignBits(U->getOperand(1), TD, Depth+1); 1176 FirstAnswer = std::min(Tmp, Tmp2); 1186 Tmp2 = ComputeNumSignBits(U->getOperand(2), TD, Depth+1); 1187 return std::min(Tmp, Tmp2); 1212 Tmp2 [all...] |
/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelDAGToDAG.cpp | 442 SDValue Tmp1, Tmp2; local 1359 SDNode *Tmp2 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); local 1361 SDValue(Tmp2, 0)); 1373 SDNode *Tmp2 = CurDAG->getMachineNode(Opc1, dl, VT, EltVal); local 1375 SDValue(Tmp2, 0));
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H A D | PPCISelLowering.cpp | 5021 SDValue Tmp2 = DAG.getNode(PPCISD::SHL, dl, VT, Hi, Amt); local 5023 SDValue Tmp4 = DAG.getNode(ISD::OR , dl, VT, Tmp2, Tmp3); 5050 SDValue Tmp2 = DAG.getNode(PPCISD::SRL, dl, VT, Lo, Amt); local 5052 SDValue Tmp4 = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp3); 5078 SDValue Tmp2 = DAG.getNode(PPCISD::SRL, dl, VT, Lo, Amt); local 5080 SDValue Tmp4 = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp3);
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/external/clang/lib/CodeGen/ |
H A D | CGExprComplex.cpp | 580 llvm::Value *Tmp2 = Builder.CreateFMul(LHSi, RHSi); // b*d local 581 llvm::Value *Tmp3 = Builder.CreateFAdd(Tmp1, Tmp2); // ac+bd 596 llvm::Value *Tmp2 = Builder.CreateMul(LHSi, RHSi); // b*d local 597 llvm::Value *Tmp3 = Builder.CreateAdd(Tmp1, Tmp2); // ac+bd
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonHardwareLoops.cpp | 1516 SmallVector<MachineOperand,1> Tmp2; local 1524 Tmp2.clear(); 1525 bool NotAnalyzed = TII->AnalyzeBranch(*PB, TB, FB, Tmp2, false); 1528 if (TB != Header && (Tmp2.empty() || FB != Header)) 1537 bool LatchNotAnalyzed = TII->AnalyzeBranch(*Latch, TB, FB, Tmp2, false);
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/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 1295 SDValue Tmp2 = ST->getBasePtr(); local 1302 SDValue Result = DAG.getTruncStore(Tmp1, dl, Tmp3, Tmp2,
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/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 1946 unsigned Tmp2 = MRI.createVirtualRegister(RC); local 1947 BuildMI(MBB, DL, TII->get(SystemZ::LCGR), Tmp2).addReg(Tmp); 1949 .addReg(Tmp2).addImm(-1);
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/external/webrtc/src/modules/audio_coding/codecs/isac/main/source/ |
H A D | structs.h | 252 double Tmp2[MAXFFTSIZE]; member in struct:__anon28982
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/external/llvm/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 2502 SDValue Tmp2 = CurDAG->getTargetConstant(CCVal, MVT::i32); local 2503 SDValue Ops[] = { FalseVal, TrueVal, Tmp2, CCR, InFlag }; 2870 SDValue Tmp2 = CurDAG->getTargetConstant(((unsigned) local 2873 SDValue Ops[] = { N1, Tmp2, N3, Chain, InFlag };
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H A D | ARMISelLowering.cpp | 3745 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, RevShAmt); local 3746 SDValue FalseVal = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); 3779 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); local 3782 SDValue FalseVal = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2);
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/external/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 1567 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; local 1568 if (!SelectAddr(Node, In1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) 1572 const SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, In2L, In2H, Chain}; 1768 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; local 1769 if (!SelectAddr(Node, Ptr, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) 1841 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Chain }; 1844 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Val, Chain }; 2317 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; local 2318 bool foldedLoad = TryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4); 2321 foldedLoad = TryFoldLoad(Node, N0, Tmp0, Tmp1, Tmp2, Tmp 2458 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; local 2466 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Move, Chain; local [all...] |
H A D | X86ISelLowering.cpp | 8312 SDValue Tmp2, Tmp3; local 8314 Tmp2 = DAG.getNode(X86ISD::SHLD, dl, VT, ShOpHi, ShOpLo, ShAmt); 8317 Tmp2 = DAG.getNode(X86ISD::SHRD, dl, VT, ShOpLo, ShOpHi, ShAmt); 8328 SDValue Ops0[4] = { Tmp2, Tmp3, CC, Cond };
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