| /external/llvm/include/llvm/MC/ |
| H A D | MCInstrItineraries.h | 168 unsigned Latency = 0, StartCycle = 0; local
171 Latency = std::max(Latency, StartCycle + IS->getCycles());
174 return Latency;
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| /external/llvm/lib/CodeGen/ |
| H A D | TargetSchedule.cpp | 195 unsigned Latency = capLatency(WLEntry->Cycles); local
197 return Latency;
202 return Latency;
205 if (Advance > 0 && (unsigned)Advance > Latency) // unsigned wrap
207 return Latency - Advance;
236 unsigned Latency = 0; local
242 Latency = std::max(Latency, capLatency(WLEntry->Cycles));
244 return Latency;
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| H A D | MachineScheduler.cpp | 1271 // MOps * getMicroOpFactor and Latency * getLatencyFactor.
1517 unsigned Latency = I->getLatency(); local
1519 Top.MaxObservedLatency = std::max(Latency, Top.MaxObservedLatency);
1521 if (SU->TopReadyCycle < PredReadyCycle + Latency)
1522 SU->TopReadyCycle = PredReadyCycle + Latency;
1538 unsigned Latency = I->getLatency(); local
1540 Bot.MaxObservedLatency = std::max(Latency, Bot.MaxObservedLatency);
1542 if (SU->BotReadyCycle < SuccReadyCycle + Latency)
1543 SU->BotReadyCycle = SuccReadyCycle + Latency;
1686 dbgs() << " Latency limite
2238 unsigned Latency = 0; local
[all...] |
| H A D | CriticalAntiDepBreaker.cpp | 426 if (!Max || SU->getDepth() + SU->Latency > Max->getDepth() + Max->Latency)
433 << (Max->getDepth() + Max->Latency) << "\n");
|
| H A D | ScheduleDAGInstrs.cpp | 680 // Assign the Latency field of SU using target-provided information.
681 SU->Latency = SchedModel.computeInstrLatency(SU->getInstr());
778 if (SU->NumSuccs == 0 && SU->Latency > 1
781 Dep.setLatency(SU->Latency - 1);
962 adjustChainDeps(AA, MFI, SU, &ExitSU, RejectMemNodes, /*Latency=*/0);
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| H A D | AggressiveAntiDepBreaker.cpp | 733 ((SU->getDepth() + SU->Latency) >
734 (CriticalPathSU->getDepth() + CriticalPathSU->Latency))) {
|
| H A D | ScheduleDAG.cpp | 331 dbgs() << " Latency : " << Latency << "\n";
349 dbgs() << ": Latency=" << I->getLatency();
369 dbgs() << ": Latency=" << I->getLatency();
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| /external/llvm/include/llvm/CodeGen/ |
| H A D | ScheduleDAG.h | 89 /// Latency - The time associated with this edge. Often this is just
90 /// the value of the Latency field of the predecessor, however advanced
92 unsigned Latency; member in class:llvm::SDep
111 Latency = 0;
115 Latency = 1;
120 : Dep(S, Order), Contents(), Latency(0) {
139 return overlaps(Other) && Latency == Other.Latency;
151 return Latency;
156 Latency
280 unsigned short Latency; // Node latency. member in class:llvm::SUnit
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGSDNodes.cpp | 92 SU->Latency = Old->Latency;
402 // Assign the Latency field of NodeSUnit using target-provided information.
483 unsigned OpLatency = isChain ? 1 : OpSU->Latency;
592 SU->Latency = 0;
598 SU->Latency = 1;
605 SU->Latency = HighLatencyCycles;
607 SU->Latency = 1;
613 SU->Latency = 0;
616 SU->Latency
[all...] |
| H A D | ScheduleDAGVLIW.cpp | 244 if (FoundSUnit->Latency) // Don't increment CurCycle for pseudo-ops!
|
| H A D | ScheduleDAGFast.cpp | 340 D.setLatency(LoadSU->Latency);
418 FromDep.setLatency(SU->Latency);
421 ToDep.setLatency(CopyFromSU->Latency);
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| H A D | ScheduleDAGRRList.cpp | 1082 D.setLatency(LoadSU->Latency);
1172 FromDep.setLatency(SU->Latency);
1175 ToDep.setLatency(CopyFromSU->Latency);
2388 if (left->Latency != right->Latency)
2389 return left->Latency > right->Latency ? 1 : -1;
|
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 3328 unsigned Latency = getInstrLatency(ItinData, DefMI); local
3334 if (Latency > 0 && Subtarget.isThumb2()) {
3339 --Latency;
3341 return Latency;
3353 int Latency = getOperandLatency(ItinData, *DefMCID, DefIdx, DefAlign, local
3356 if (Latency < 0)
3357 return Latency;
3364 if (Adj >= 0 || (int)Latency > -Adj) {
3365 return Latency + Adj;
3368 return Latency;
3387 int Latency = ItinData->getOperandCycle(DefMCID.getSchedClass(), DefIdx); local
3401 int Latency = getOperandLatency(ItinData, DefMCID, DefIdx, DefAlign, local
3595 unsigned Latency = 0; local
3623 unsigned Latency = ItinData->getStageLatency(Class); local
3666 int Latency = computeOperandLatency(ItinData, DefMI, DefIdx, UseMI, UseIdx); local
[all...] |
| /external/oprofile/events/mips/1004K/ |
| H A D | events | 95 event:0x3d counters:0 um:zero minimum:500 name:SELF_INTERVENTION_LATENCY : 61-0 Latency from miss detection to self intervention
|
| /external/blktrace/btt/doc/ |
| H A D | btt.tex | 463 \item[iostat] Latency information -- both Q2d, D2c and Q2C --
676 \newpage\section{\label{sec:lat}\label{sec:lat-q2d}\label{sec:lat-q2c}\label{sec:lat-d2c}Latency Data Files}
|