1//===-- llvm/CodeGen/Spiller.cpp - Spiller -------------------------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9 10#define DEBUG_TYPE "spiller" 11 12#include "Spiller.h" 13#include "llvm/CodeGen/LiveIntervalAnalysis.h" 14#include "llvm/CodeGen/LiveRangeEdit.h" 15#include "llvm/CodeGen/LiveStackAnalysis.h" 16#include "llvm/CodeGen/MachineFrameInfo.h" 17#include "llvm/CodeGen/MachineFunction.h" 18#include "llvm/CodeGen/MachineInstrBuilder.h" 19#include "llvm/CodeGen/MachineLoopInfo.h" 20#include "llvm/CodeGen/MachineRegisterInfo.h" 21#include "llvm/CodeGen/VirtRegMap.h" 22#include "llvm/Support/CommandLine.h" 23#include "llvm/Support/Debug.h" 24#include "llvm/Support/ErrorHandling.h" 25#include "llvm/Support/raw_ostream.h" 26#include "llvm/Target/TargetInstrInfo.h" 27#include "llvm/Target/TargetMachine.h" 28 29using namespace llvm; 30 31namespace { 32 enum SpillerName { trivial, inline_ }; 33} 34 35static cl::opt<SpillerName> 36spillerOpt("spiller", 37 cl::desc("Spiller to use: (default: standard)"), 38 cl::Prefix, 39 cl::values(clEnumVal(trivial, "trivial spiller"), 40 clEnumValN(inline_, "inline", "inline spiller"), 41 clEnumValEnd), 42 cl::init(trivial)); 43 44// Spiller virtual destructor implementation. 45Spiller::~Spiller() {} 46 47namespace { 48 49/// Utility class for spillers. 50class SpillerBase : public Spiller { 51protected: 52 MachineFunctionPass *pass; 53 MachineFunction *mf; 54 VirtRegMap *vrm; 55 LiveIntervals *lis; 56 MachineFrameInfo *mfi; 57 MachineRegisterInfo *mri; 58 const TargetInstrInfo *tii; 59 const TargetRegisterInfo *tri; 60 61 /// Construct a spiller base. 62 SpillerBase(MachineFunctionPass &pass, MachineFunction &mf, VirtRegMap &vrm) 63 : pass(&pass), mf(&mf), vrm(&vrm) 64 { 65 lis = &pass.getAnalysis<LiveIntervals>(); 66 mfi = mf.getFrameInfo(); 67 mri = &mf.getRegInfo(); 68 tii = mf.getTarget().getInstrInfo(); 69 tri = mf.getTarget().getRegisterInfo(); 70 } 71 72 /// Add spill ranges for every use/def of the live interval, inserting loads 73 /// immediately before each use, and stores after each def. No folding or 74 /// remat is attempted. 75 void trivialSpillEverywhere(LiveRangeEdit& LRE) { 76 LiveInterval* li = &LRE.getParent(); 77 78 DEBUG(dbgs() << "Spilling everywhere " << *li << "\n"); 79 80 assert(li->weight != HUGE_VALF && 81 "Attempting to spill already spilled value."); 82 83 assert(!TargetRegisterInfo::isStackSlot(li->reg) && 84 "Trying to spill a stack slot."); 85 86 DEBUG(dbgs() << "Trivial spill everywhere of reg" << li->reg << "\n"); 87 88 const TargetRegisterClass *trc = mri->getRegClass(li->reg); 89 unsigned ss = vrm->assignVirt2StackSlot(li->reg); 90 91 // Iterate over reg uses/defs. 92 for (MachineRegisterInfo::reg_iterator 93 regItr = mri->reg_begin(li->reg); regItr != mri->reg_end();) { 94 95 // Grab the use/def instr. 96 MachineInstr *mi = &*regItr; 97 98 DEBUG(dbgs() << " Processing " << *mi); 99 100 // Step regItr to the next use/def instr. 101 do { 102 ++regItr; 103 } while (regItr != mri->reg_end() && (&*regItr == mi)); 104 105 // Collect uses & defs for this instr. 106 SmallVector<unsigned, 2> indices; 107 bool hasUse = false; 108 bool hasDef = false; 109 for (unsigned i = 0; i != mi->getNumOperands(); ++i) { 110 MachineOperand &op = mi->getOperand(i); 111 if (!op.isReg() || op.getReg() != li->reg) 112 continue; 113 hasUse |= mi->getOperand(i).isUse(); 114 hasDef |= mi->getOperand(i).isDef(); 115 indices.push_back(i); 116 } 117 118 // Create a new vreg & interval for this instr. 119 LiveInterval *newLI = &LRE.create(); 120 newLI->weight = HUGE_VALF; 121 122 // Update the reg operands & kill flags. 123 for (unsigned i = 0; i < indices.size(); ++i) { 124 unsigned mopIdx = indices[i]; 125 MachineOperand &mop = mi->getOperand(mopIdx); 126 mop.setReg(newLI->reg); 127 if (mop.isUse() && !mi->isRegTiedToDefOperand(mopIdx)) { 128 mop.setIsKill(true); 129 } 130 } 131 assert(hasUse || hasDef); 132 133 // Insert reload if necessary. 134 MachineBasicBlock::iterator miItr(mi); 135 if (hasUse) { 136 tii->loadRegFromStackSlot(*mi->getParent(), miItr, newLI->reg, ss, trc, 137 tri); 138 MachineInstr *loadInstr(prior(miItr)); 139 SlotIndex loadIndex = 140 lis->InsertMachineInstrInMaps(loadInstr).getRegSlot(); 141 SlotIndex endIndex = loadIndex.getNextIndex(); 142 VNInfo *loadVNI = 143 newLI->getNextValue(loadIndex, lis->getVNInfoAllocator()); 144 newLI->addRange(LiveRange(loadIndex, endIndex, loadVNI)); 145 } 146 147 // Insert store if necessary. 148 if (hasDef) { 149 tii->storeRegToStackSlot(*mi->getParent(), llvm::next(miItr),newLI->reg, 150 true, ss, trc, tri); 151 MachineInstr *storeInstr(llvm::next(miItr)); 152 SlotIndex storeIndex = 153 lis->InsertMachineInstrInMaps(storeInstr).getRegSlot(); 154 SlotIndex beginIndex = storeIndex.getPrevIndex(); 155 VNInfo *storeVNI = 156 newLI->getNextValue(beginIndex, lis->getVNInfoAllocator()); 157 newLI->addRange(LiveRange(beginIndex, storeIndex, storeVNI)); 158 } 159 } 160 } 161}; 162 163} // end anonymous namespace 164 165namespace { 166 167/// Spills any live range using the spill-everywhere method with no attempt at 168/// folding. 169class TrivialSpiller : public SpillerBase { 170public: 171 172 TrivialSpiller(MachineFunctionPass &pass, MachineFunction &mf, 173 VirtRegMap &vrm) 174 : SpillerBase(pass, mf, vrm) {} 175 176 void spill(LiveRangeEdit &LRE) { 177 // Ignore spillIs - we don't use it. 178 trivialSpillEverywhere(LRE); 179 } 180}; 181 182} // end anonymous namespace 183 184void Spiller::anchor() { } 185 186llvm::Spiller* llvm::createSpiller(MachineFunctionPass &pass, 187 MachineFunction &mf, 188 VirtRegMap &vrm) { 189 switch (spillerOpt) { 190 case trivial: return new TrivialSpiller(pass, mf, vrm); 191 case inline_: return createInlineSpiller(pass, mf, vrm); 192 } 193 llvm_unreachable("Invalid spiller optimization"); 194} 195