1/* 2Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved. 3 4The Weather Channel (TM) funded Tungsten Graphics to develop the 5initial release of the Radeon 8500 driver under the XFree86 license. 6This notice must be preserved. 7 8Permission is hereby granted, free of charge, to any person obtaining 9a copy of this software and associated documentation files (the 10"Software"), to deal in the Software without restriction, including 11without limitation the rights to use, copy, modify, merge, publish, 12distribute, sublicense, and/or sell copies of the Software, and to 13permit persons to whom the Software is furnished to do so, subject to 14the following conditions: 15 16The above copyright notice and this permission notice (including the 17next paragraph) shall be included in all copies or substantial 18portions of the Software. 19 20THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 21EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 22MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 23IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 24LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 25OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 26WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 27 28**************************************************************************/ 29 30/* 31 * Authors: 32 * Keith Whitwell <keith@tungstengraphics.com> 33 */ 34 35#ifndef __R200_IOCTL_H__ 36#define __R200_IOCTL_H__ 37 38#include "main/simple_list.h" 39#include "radeon_dri.h" 40 41#include "radeon_bo_gem.h" 42#include "radeon_cs_gem.h" 43 44#include "xf86drm.h" 45#include "drm.h" 46#include "radeon_drm.h" 47 48extern void r200EmitMaxVtxIndex(r200ContextPtr rmesa, int count); 49extern void r200EmitVertexAOS( r200ContextPtr rmesa, 50 GLuint vertex_size, 51 struct radeon_bo *bo, 52 GLuint offset ); 53 54extern void r200EmitVbufPrim( r200ContextPtr rmesa, 55 GLuint primitive, 56 GLuint vertex_nr ); 57 58extern void r200FlushElts(struct gl_context *ctx); 59 60extern GLushort *r200AllocEltsOpenEnded( r200ContextPtr rmesa, 61 GLuint primitive, 62 GLuint min_nr ); 63 64extern void r200EmitAOS(r200ContextPtr rmesa, GLuint nr, GLuint offset); 65 66extern void r200InitIoctlFuncs( struct dd_function_table *functions ); 67 68void r200SetUpAtomList( r200ContextPtr rmesa ); 69 70/* ================================================================ 71 * Helper macros: 72 */ 73 74/* Close off the last primitive, if it exists. 75 */ 76#define R200_NEWPRIM( rmesa ) \ 77do { \ 78 if ( rmesa->radeon.dma.flush ) \ 79 rmesa->radeon.dma.flush( rmesa->radeon.glCtx ); \ 80} while (0) 81 82/* Can accomodate several state changes and primitive changes without 83 * actually firing the buffer. 84 */ 85#define R200_STATECHANGE( rmesa, ATOM ) \ 86do { \ 87 R200_NEWPRIM( rmesa ); \ 88 rmesa->hw.ATOM.dirty = GL_TRUE; \ 89 rmesa->radeon.hw.is_dirty = GL_TRUE; \ 90} while (0) 91 92#define R200_SET_STATE( rmesa, ATOM, index, newvalue ) \ 93 do { \ 94 uint32_t __index = (index); \ 95 uint32_t __dword = (newvalue); \ 96 if (__dword != (rmesa)->hw.ATOM.cmd[__index]) { \ 97 R200_STATECHANGE( (rmesa), ATOM ); \ 98 (rmesa)->hw.ATOM.cmd[__index] = __dword; \ 99 } \ 100 } while(0) 101 102#define R200_DB_STATE( ATOM ) \ 103 memcpy( rmesa->hw.ATOM.lastcmd, rmesa->hw.ATOM.cmd, \ 104 rmesa->hw.ATOM.cmd_size * 4) 105 106static INLINE int R200_DB_STATECHANGE( 107 r200ContextPtr rmesa, 108 struct radeon_state_atom *atom ) 109{ 110 if (memcmp(atom->cmd, atom->lastcmd, atom->cmd_size*4)) { 111 GLuint *tmp; 112 R200_NEWPRIM( rmesa ); 113 atom->dirty = GL_TRUE; 114 rmesa->radeon.hw.is_dirty = GL_TRUE; 115 tmp = atom->cmd; 116 atom->cmd = atom->lastcmd; 117 atom->lastcmd = tmp; 118 return 1; 119 } 120 else 121 return 0; 122} 123 124 125/* Command lengths. Note that any time you ensure ELTS_BUFSZ or VBUF_BUFSZ 126 * are available, you will also be adding an rmesa->state.max_state_size because 127 * r200EmitState is called from within r200EmitVbufPrim and r200FlushElts. 128 */ 129#define AOS_BUFSZ(nr) ((3 + ((nr / 2) * 3) + ((nr & 1) * 2) + nr*2)) 130#define VERT_AOS_BUFSZ (5) 131#define ELTS_BUFSZ(nr) (12 + nr * 2) 132#define VBUF_BUFSZ (3) 133#define SCISSOR_BUFSZ (8) 134#define INDEX_BUFSZ (8+2) 135 136static inline uint32_t cmdpacket3(int cmd_type) 137{ 138 drm_radeon_cmd_header_t cmd; 139 140 cmd.i = 0; 141 cmd.header.cmd_type = cmd_type; 142 143 return (uint32_t)cmd.i; 144 145} 146 147#define OUT_BATCH_PACKET3(packet, num_extra) do { \ 148 OUT_BATCH(CP_PACKET2); \ 149 OUT_BATCH(CP_PACKET3((packet), (num_extra))); \ 150 } while(0) 151 152#define OUT_BATCH_PACKET3_CLIP(packet, num_extra) do { \ 153 OUT_BATCH(CP_PACKET2); \ 154 OUT_BATCH(CP_PACKET3((packet), (num_extra))); \ 155 } while(0) 156 157 158#endif /* __R200_IOCTL_H__ */ 159