| b793f0d3448a15277cd6b6cc4ba558ded39a8084 |
|
01-Aug-2013 |
Tim Northover <tnorthover@apple.com> |
AArch64: initial NEON support
Patch by Ana Pazos
- Completed implementation of instruction formats:
AdvSIMD three same
AdvSIMD modified immediate
AdvSIMD scalar pairwise
- Completed implementation of instruction classes
(some of the instructions in these classes
belong to yet unfinished instruction formats):
Vector Arithmetic
Vector Immediate
Vector Pairwise Arithmetic
- Initial implementation of instruction formats:
AdvSIMD scalar two-reg misc
AdvSIMD scalar three same
- Intial implementation of instruction class:
Scalar Arithmetic
- Initial clang changes to support arm v8 intrinsics.
Note: no clang changes for scalar intrinsics function name mangling yet.
- Comprehensive test cases for added instructions
To verify auto codegen, encoding, decoding, diagnosis, intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@187568 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| 8da1dd629613beb1c476043fb6e3f9992b205183 |
|
16-Apr-2013 |
Michael Gottesman <mgottesman@apple.com> |
[1/6] ARM Neon Intrinsic Tablegen Test Generator.
Changes necessary to arm_neon.td for the generation of Neon tests.
This is the first of six patches to add to the arm neon tablegen
generator the capability of generating tests to verify that the various
ARM intrinsics are implemented properly.
The changes include such items as:
1. Adding attributes to the Inst record so that additional metadata that is only
needed for the tests can be specified in TableGen.
2. Adding wrapper classes for operator (i.e. ``Op'') intrinsics which before
were simply notates as Inst. This allows us to classify what sort of test
to generate for said intrinsic and further since the classes do not effect
the behavior of the Inst base class, allow for normal functioning.
Reviewed by Bob Wilson.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@179624 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| 02262662b4550d0227038470f2d7b3db7ada2b87 |
|
30-Sep-2012 |
Bob Wilson <bob.wilson@apple.com> |
Add an FMA intrinsic for ARM Neon.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@164904 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| 4c919eb0c022be30d6130446cb8d50a7e8da9f46 |
|
21-Sep-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM: Use a dedicated intrinsic for vector bitwise select.
The expression based expansion too often results in IR level optimizations
splitting the intermediate values into separate basic blocks, preventing
the formation of the VBSL instruction as the code author intended. In
particular, LICM would often hoist part of the computation out of a loop.
rdar://11011471
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@164342 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| 667381b21f75d6964bbdf6af143308a02b9198a8 |
|
09-May-2012 |
Jim Grosbach <grosbach@apple.com> |
ARM: Support marking intrinsic definitions as 'unavailable'
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@156490 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| f58de90e209eac7159a52e75dcd6e99b3a6311a6 |
|
24-Jun-2011 |
Bob Wilson <bob.wilson@apple.com> |
Fix comments.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@133805 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| d7bc7a210993fc4f67cdf5764ce4ef33f2a8ede3 |
|
09-Jun-2011 |
Bob Wilson <bob.wilson@apple.com> |
Add isVCVT_N flag to identify Neon VCVT_N intrinsics, which require special
range checking for immediate operands. Radar 9558930.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@132783 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| 2d33e423d5091b7d2cb8618952752abd55bba965 |
|
31-Mar-2011 |
Bob Wilson <bob.wilson@apple.com> |
Use intrinsics for Neon vmull operations. Radar 9208957.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@128590 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| 46e392ae6d09979b087d7b1aca3b816ba4199b89 |
|
16-Dec-2010 |
Bob Wilson <bob.wilson@apple.com> |
Implement builtins for Neon half-precision float conversions.
Also tweak the VCVT_F32_F16 entry in arm_neon.td to be more consistent with
the other floating-point conversion builtins. Radar 8068427.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@121916 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| c3dcdc1d5d2e9f33fd7f7209fe62e1e87193b3ac |
|
10-Dec-2010 |
Bob Wilson <bob.wilson@apple.com> |
Add Neon vreinterpret intrinsics for half-float (f16) types.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@121433 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| 2427dbfa880a72fa3dcba700cf587fb5d8b3cf57 |
|
09-Dec-2010 |
Bob Wilson <bob.wilson@apple.com> |
Fix type of last vector operand of Neon quad-register multiple-lane intrinsics.
The sensible thing would be to have these intrinsics take all quad-register
vector operands, but that's not what ARM did. They made the last vector
operand always be a double-register type. Since the lane number
must be a constant, the user can know which half of a quad-register contains
that lane, extract the high or low half of the vector, and adjust the lane
number accordingly. The only advantage I can see for this is that it works
better when you want to multiply a quad-register value by a lane from a
double-register value, but I wouldn't have expected that to be the common
case. Oh well -- at this point we just need to follow the spec.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@121397 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| c9ccad380f858c511756e2d8cd55058d8fc6fbcb |
|
09-Dec-2010 |
Bob Wilson <bob.wilson@apple.com> |
Fix the names of the v[r]addhn and v[r]subhn Neon intrinsics.
Their suffixes are supposed to reflect the source operand element type,
not the destination element type. Radar 8746481.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@121392 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| c66b516707a73b026cd34f3c0bfcaaf4409155c7 |
|
09-Dec-2010 |
Bob Wilson <bob.wilson@apple.com> |
Add missing "s32" and "u32" variants of Neon vzip intrinsic.
Radar 8446277.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@121360 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| 327ce7064bed7e37ae9902ffbaf043463a914a82 |
|
09-Dec-2010 |
Bob Wilson <bob.wilson@apple.com> |
Add missing "p16" type variants for the Neon VREV32 intrinsics.
Radar 8446277.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@121359 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| db3d4d036037f379f12643e067b229862d61e932 |
|
08-Dec-2010 |
Bob Wilson <bob.wilson@apple.com> |
Stop using builtins for the "_lane" variants of saturating multiply intrinsics.
Remove the "splat" parameter from the EmitNeonCall function, since it is no
longer needed.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@121300 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| a4cc79994b2f12663143dc31ceaf198e703fb914 |
|
08-Dec-2010 |
Bob Wilson <bob.wilson@apple.com> |
Stop using clang builtins for Neon vabdl and vabal intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@121288 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| a8b988f6ec8e2355c7081b31578843be33027033 |
|
08-Dec-2010 |
Bob Wilson <bob.wilson@apple.com> |
Stop using clang builtins for Neon vaba intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@121277 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| f203344728f604b7b95cbc093854d97da411dc6f |
|
08-Dec-2010 |
Bob Wilson <bob.wilson@apple.com> |
Stop using clang builtins for Neon vadd[lw] and vsub[lw] intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@121214 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| 4064127e722070967289d02f27ee6a6d42cdba63 |
|
08-Dec-2010 |
Bob Wilson <bob.wilson@apple.com> |
Stop using clang builtins for Neon vmlal{_n,_lane} and vmlsl{_n,_lane}.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@121210 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| cf55652cf668c1402eee0b12edd2e5a1bc34d7a1 |
|
07-Dec-2010 |
Bob Wilson <bob.wilson@apple.com> |
Stop using a clang builtin for Neon vdup_lane intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@121191 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| c92b7721603484ddf337034c6f291d1b419a0528 |
|
07-Dec-2010 |
Bob Wilson <bob.wilson@apple.com> |
Stop using a clang builtin for Neon vmull_lane intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@121189 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| 468acf9e29b8b9bcefd227d0a0e65356678b43cd |
|
07-Dec-2010 |
Bob Wilson <bob.wilson@apple.com> |
Implement vmull and vmull_n intrinsics without using clang builtins.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@121174 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| 9407444a159731b85b3d6d54f3a158d7341fc9f8 |
|
07-Dec-2010 |
Bob Wilson <bob.wilson@apple.com> |
Add Neon vreinterpret intrinsics.
Radar 8681774.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@121089 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| 0d3f3ffe0b8567501c27ef6963d9335ecbc6e249 |
|
07-Dec-2010 |
Bob Wilson <bob.wilson@apple.com> |
Make whitespace more consistent.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@121088 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| 4740dabd14c8660d641228d75ed91bf7e6753b77 |
|
03-Dec-2010 |
Bob Wilson <bob.wilson@apple.com> |
Add missing vext_f32 and vextq_f32 Neon intrinsics (Radar 8592601).
For some reason these were not included in the list of Neon intrinsics in
ARM's documentation, so they didn't make it into Clang either.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@120815 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| 953d513c7ee79b3d9e37597e64317e75c0fbf7f6 |
|
03-Dec-2010 |
Bob Wilson <bob.wilson@apple.com> |
Add support for vmul_p8 Neon intrinsic. Radar 8446141.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@120812 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| 96bfa6249fe65eaaaba795845c0f92f94d2b8a0d |
|
03-Dec-2010 |
Bob Wilson <bob.wilson@apple.com> |
Add a separate name field to the Neon intrinsic table.
This is currently the same as a lowercase version of the record name, but
it will allow us to have multiple records with the same name, which is
needed for intrinsics (e.g., vmul and vmull) that are implemented
differently depending on the type.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@120807 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| 96c105c8c3f4a9f39fdd4f967226f14c8e3face8 |
|
03-Dec-2010 |
Bob Wilson <bob.wilson@apple.com> |
Add support for "_lane" variants of VMUL, VMLA, and VMLS Neon intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@120765 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| e343583370ba7465273645a300b9a829e3a95d82 |
|
01-Dec-2010 |
Bob Wilson <bob.wilson@apple.com> |
Add some comments.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@120598 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| bce8d4b0abc22c59d8a5d1537df22b0d13f25db8 |
|
18-Nov-2010 |
Bob Wilson <bob.wilson@apple.com> |
Use a signed vector type for the shift amount operand of unsigned shifts.
Neon shifts allow a mix of positive and negative shift amounts to shift
left or right, respectively, so the shift amount vector should always be
signed. PR8482 (Radar 8603521).
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@119748 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| cd480ad90ff4c144084805761d2dfa52ee9e1c92 |
|
06-Aug-2010 |
Nate Begeman <natebegeman@mac.com> |
vdup_lane was missing
<rdar://problem/8278732>
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@110420 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| 4be54302da40d3e7cba3d93115f312d2fcca1879 |
|
21-Jun-2010 |
Nate Begeman <natebegeman@mac.com> |
Implement remaining codegen for NEON, all operations should now work.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@106407 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|
| a23326b5c244a03bf61ebb86db60a777ea26f926 |
|
17-Jun-2010 |
Nate Begeman <natebegeman@mac.com> |
Generate arm_neon.inc in include/clang/Basic, which provides:
1. builtins definitions for BuiltinsARM.def
2. intrinsic validation code for SemaChecking
Unsure as to whether this is the best way to handle the make dependencies or not.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@106208 91177308-0d34-0410-b5e6-96231b3b80d8
/external/clang/include/clang/Basic/arm_neon.td
|