| 4b40375c438f9a10231dabedcf72bf6f27bbe327 |
|
06-Aug-2012 |
Paulo Zanoni <paulo.r.zanoni@intel.com> |
i965: add more Haswell PCI IDs
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| a45247fb1b8c30c5be21c3baf84943920ae17bfb |
|
31-Mar-2012 |
Eugeni Dodonov <eugeni.dodonov@intel.com> |
intel: add PCI IDs for Ivy Bridge GT2 server variant
Those IDs are used by Bromolow.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| bd2410b48df261251f75c2c69785c8cc3182d94d |
|
19-Mar-2012 |
Kenneth Graunke <kenneth@whitecape.org> |
intel: Add some PCI IDs for Haswell.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| 180aecb6dce1df55eae674f0f72adbc6f4d872b9 |
|
13-Aug-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Add initial IS_HASWELL() macros.
For now, these all return 0, as I don't yet want to enable Haswell
support. Eventually they will be filled in with proper PCI IDs.
Also add an is_haswell field similar to is_g4x to make it easy to
distinguish Gen7 and Gen7.5.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| 6d894f68af7ebbb861594c35c25680ac3633a494 |
|
06-Jun-2011 |
Eric Anholt <eric@anholt.net> |
intel: Update intel-decode.c from intel-gpu-tools.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| 3e0bb02358d627e784a2b7041d6e2e23e3dfd2c5 |
|
18-May-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Rename IS_GT1 and IS_GT2 to IS_SNB_GT1 and IS_SNB_GT2.
This should help distinguish Sandybridge GT1/GT2 from Ivybridge GT1/GT2.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| 1b3d354743269ac1da80984da55d7545974f7345 |
|
23-Mar-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
intel: Recognize new Ivybridge PCI IDs.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| 89a82d72cafc1efbcf099e5229ba9b1cb53504f0 |
|
17-May-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
intel: Initial IS_GEN7 plumbing.
Currently, IS_GEN7, IS_IVYBRIDGE, IS_IVB_GT1, and IS_IVB_GT2 all return
false. This allows me to write the code for them before actually adding
the PCI IDs and thus enabling the hardware.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| ee8d182426d4ecda7b9f5089d19d36f7de2a4dfe |
|
30-Mar-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
intel: Add IS_GT2 macro for recognizing Sandybridge GT2 systems.
Also, refactor IS_GEN6 to use the IS_GT1 and IS_GT2 macros.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| 118ecb1a2226494929a87c36b7802b64451ca004 |
|
03-Mar-2011 |
Zou Nan hai <nanhai.zou@intel.com> |
i965: SNB GT1 has only 32k urb and max 128 urb entries.
Signed-off-by: Zou Nan hai <nanhai.zou@intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| e8b2d367234f554dafa968455b8d0d3e332058eb |
|
21-Oct-2010 |
Robert Hooker <robert.hooker@canonical.com> |
intel: Add a new B43 pci id.
Signed-off-by: Robert Hooker <robert.hooker@canonical.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| c8033f1b1ea118f3f47b7f3de557b7a8dcf11082 |
|
16-Sep-2010 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
i965: Add all device ids for sandybridge
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| 8a537b2fb856d27f49235d9f5684901f1213214c |
|
23-Aug-2010 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
i965: Add sandybridge D0 pci ids
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| e72b87736d8453e79bb6da48ba4cfcc2e97c8e14 |
|
08-Jul-2010 |
Eric Anholt <eric@anholt.net> |
intel: Update intel_decode.c from intel-gpu-tools.
This came from commit cf255e382d147fe3ca450f0dcec3525190e7dcbc
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| 82abbca69220b12453e161076481a46b836ebf18 |
|
19-Apr-2010 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
intel: Add Sandybridge mobile chipset id
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| cdcef6cbf4dd80047819e9098e34a3b98bd502a4 |
|
19-Apr-2010 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
intel: Clean up chipset name and gen num for Ironlake
Rename old IGDNG to Ironlake, and set 'gen' number for
Ironlake as 5, so tracking the features with generation num
instead of special is_ironlake flag.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| 554a8f4026459406e7d3ed4e7017a88a57492ddf |
|
03-Nov-2009 |
Eric Anholt <eric@anholt.net> |
intel: Start adding defines and some bits for sandybridge bringup.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| ca246dd186f9590f6d67038832faceb522138c20 |
|
07-Sep-2009 |
Zhenyu Wang <zhenyuw@linux.intel.com> |
intel: add B43 chipset support
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| 2995bf0d68f1b28ba68b81e9dc79e3ab52bc2795 |
|
13-Jul-2009 |
Xiang, Haihao <haihao.xiang@intel.com> |
i965: add support for new chipsets
1. new PCI ids
2. fix some 3D commands on new chipset
3. fix send instruction on new chipset
4. new VUE vertex header
5. ff_sync message (added by Zou Nan Hai <nanhai.zou@intel.com>)
6. the offset in JMPI is in unit of 64bits on new chipset
7. new cube map layout
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| 40290745ea645b52d30f866abfe25ac5d58a755c |
|
23-Feb-2009 |
Shaohua Li <shaohua.li@intel.com> |
i915: Add support for a new G33-like chipset.
Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| 34b1776e8d965605d12807884c9c447214d57281 |
|
02-Nov-2008 |
Eric Anholt <eric@anholt.net> |
i965: Merge GM45 into the G4X chipset define.
The mobile and desktop chipsets are the same, and having them separate is
more typing and more chances to screw up.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| b2e083eba2668517e40bc94e3a19cd15824ce93c |
|
12-Sep-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
i965: Add support for G41 chipset which is another 4 series.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| 92c075eeb7c330ea420400d1c2bae57356b19f03 |
|
08-Jul-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
i965: official name for GM45 chipset
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| 3e8aadee8beffaabd4e0c60c289b98124e288dcd |
|
18-Jun-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
i965: add support for Intel 4 series chipsets
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| cf0d91ae1d627381b632de63e5cb85494b277eb4 |
|
15-Feb-2008 |
Adam Jackson <ajax@redhat.com> |
Add IS_915(), simplify IS_9XX() a bit.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| 39bcbe0921e8a31b55ebee8726d2091fc5e0dd22 |
|
15-Feb-2008 |
Adam Jackson <ajax@redhat.com> |
Add E7221 variant to i915.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| 8e444fb9e2685e3eac42beb848b08e91dc20c88a |
|
29-Jan-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
i965: new integrated graphics chipset support
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| d913a15898fc8edc68ee673e2ae038cf2d7e8af9 |
|
16-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[i915] Fix missing symbol from 965 changes.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| a66413874dd50512daf10ce6254bbafd14b61ac7 |
|
17-Nov-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Fix typos in intel_chipset.h macros.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|
| 35331a511fcd023a7b6f0eb298098d872b856a9f |
|
28-Sep-2007 |
Eric Anholt <eric@anholt.net> |
[965] Add batchbuffer dumping under INTEL_DEBUG=bat, like 915.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_chipset.h
|