| 1ab1b15e9d0da1c5215a20770735b5477f5313df |
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23-Oct-2011 |
Chia-I Wu <olv@lunarg.com> |
mesa, i965: prepare for more than 8 texture targets
3-bit fields are used store texture target in several places. That will fail
when TEXTURE_EXTERNAL_INDEX, which happends to be the 9th texture target, is
added. Make them 4-bit fields.
Reviewed-by: Brian Paul <brianp@vmware.com>
Acked-by: Jakob Bornecrantz <jakob@vmware.com>
/external/mesa3d/src/mesa/program/prog_instruction.h
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| 801fbdf286bed58435ca3a9008104b098717ed9b |
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09-May-2011 |
Marek Olšák <maraeo@gmail.com> |
mesa: document instructions ir_to_mesa emits
GLSL stopped using:
BRA, EXP, LOG, LRP, NRM3, NRM4, XPD.
GLSL started using:
KIL, SCS, SSG, SWZ.
(omg why SWZ? isn't proc_src_register flexible enough?)
GLSL doesn't use these opcodes some Radeons do support:
ARR, DP2A, DST, LRP, XPD.
These opcodes are now unused:
AND, NOT, NRM3, NRM4, OR, XOR.
(plus maybe the NV extensions which are unused by Gallium)
In addition to that, we don't use two-dimensional indirect addressing,
which the Mesa IR can do.
/external/mesa3d/src/mesa/program/prog_instruction.h
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| 41208bf047888f5633befc5bcfac1c9132920492 |
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02-Mar-2011 |
Brian Paul <brianp@vmware.com> |
mesa: increase INST_INDEX_BITS to 12
For more info see fd.o bug 29418.
/external/mesa3d/src/mesa/program/prog_instruction.h
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| a9fa0f3a2f318a7c57163491abe931e86b2cd4c3 |
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06-Dec-2010 |
José Fonseca <jfonseca@vmware.com> |
mesa: Bump the number of bits in the register index.
More than 1023 temporaries were being used for a Cinebench shader before
doing temporary optimization, causing the index value to wrap around to
-1024.
/external/mesa3d/src/mesa/program/prog_instruction.h
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| 6c03c576cc49bbb008de66d374f4302ff0fe0390 |
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17-Aug-2010 |
Ian Romanick <ian.d.romanick@intel.com> |
Merge branch 'glsl2'
Conflicts:
src/mesa/program/prog_optimize.c
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| 443a7e4e9a360acbc3e662c098be436f180bf81d |
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14-Aug-2010 |
Ian Romanick <ian.d.romanick@intel.com> |
Merge branch 'master' into glsl2
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| f36a4b3c9eee20dcae40ecc578401eaae1658898 |
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11-Aug-2010 |
Vinson Lee <vlee@vmware.com> |
mesa: Clean up header file inclusion in prog_instruction.h.
Remove mfeatures.h.
Include glheader.h for GL symbols.
/external/mesa3d/src/mesa/program/prog_instruction.h
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| 275bae875da228b82a6d61fdab5dbe487f557580 |
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29-Jul-2010 |
Brian Paul <brianp@vmware.com> |
mesa: update table of opcodes used by GLSL
/external/mesa3d/src/mesa/program/prog_instruction.h
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| afe125e0a18ac3886c45c7e6b02b122fb2d327b5 |
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27-Jul-2010 |
Eric Anholt <eric@anholt.net> |
Merge remote branch 'origin/master' into glsl2
This pulls in multiple i965 driver fixes which will help ensure better
testing coverage during development, and also gets past the conflicts
of the src/mesa/shader -> src/mesa/program move.
Conflicts:
src/mesa/Makefile
src/mesa/main/shaderapi.c
src/mesa/main/shaderobj.h
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| 1491c6aa2de17760ab157a3fe71e45006e4eecf6 |
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14-Jul-2010 |
Zack Rusin <zackr@vmware.com> |
mesa: add comments and change Index2D to just Index2
/external/mesa3d/src/mesa/program/prog_instruction.h
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| b4855288e4de9001b4107d3d4c2f7aff4a4680f9 |
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10-Jul-2010 |
Zack Rusin <zackr@vmware.com> |
mesa: add basic support for 2D register arrays to mesa
just like in Gallium it's a basic functionality needed by a lot
of modern graphcis extensions
/external/mesa3d/src/mesa/program/prog_instruction.h
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| 7cc58c1992ca7f8af13801ea430452e590755e32 |
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02-Jul-2010 |
Brian Paul <brianp@vmware.com> |
mesa: updated instruction comments
/external/mesa3d/src/mesa/program/prog_instruction.h
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| da7bd6a90e1fee5c16327338fd251c0f6be34e36 |
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28-Jun-2010 |
Zack Rusin <zackr@vmware.com> |
mesa: initial support for ARB_geometry_shader4
laying down the foundation for everything and implementing most of the
stuff.
linking, gl_VerticesIn and multidimensional inputs are left.
/external/mesa3d/src/mesa/program/prog_instruction.h
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| ec2b92f98c2e7f161521b447cc1d9a36bce3707c |
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11-Jun-2010 |
Brian Paul <brianp@vmware.com> |
mesa: rename src/mesa/shader/ to src/mesa/program/
/external/mesa3d/src/mesa/program/prog_instruction.h
|