Lines Matching refs:DAG
1 //===-- AArch64ISelLowering.cpp - AArch64 DAG Lowering Implementation -----===//
11 // selection DAG.
878 AArch64TargetLowering::SaveVarArgRegisters(CCState &CCInfo, SelectionDAG &DAG,
880 MachineFunction &MF = DAG.getMachineFunction();
897 SDValue FIN = DAG.getFrameIndex(GPRIdx, getPointerTy());
901 SDValue Val = DAG.getCopyFromReg(Chain, DL, VReg, MVT::i64);
902 SDValue Store = DAG.getStore(Val.getValue(1), DL, Val, FIN,
906 FIN = DAG.getNode(ISD::ADD, DL, getPointerTy(), FIN,
907 DAG.getConstant(8, getPointerTy()));
916 SDValue FIN = DAG.getFrameIndex(FPRIdx, getPointerTy());
921 SDValue Val = DAG.getCopyFromReg(Chain, DL, VReg, MVT::f128);
922 SDValue Store = DAG.getStore(Val.getValue(1), DL, Val, FIN,
926 FIN = DAG.getNode(ISD::ADD, DL, getPointerTy(), FIN,
927 DAG.getConstant(16, getPointerTy()));
940 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, &MemOps[0],
950 SDLoc dl, SelectionDAG &DAG,
952 MachineFunction &MF = DAG.getMachineFunction();
959 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
960 getTargetMachine(), ArgLocs, *DAG.getContext());
980 SDValue FrameIdxN = DAG.getFrameIndex(FrameIdx, PtrTy);
989 ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT);
996 SDValue FIN = DAG.getFrameIndex(FI, getPointerTy());
997 ArgValue = DAG.getLoad(VA.getLocVT(), dl, Chain, FIN,
1008 ArgValue = DAG.getNode(ISD::BITCAST,dl, VA.getValVT(), ArgValue);
1024 ArgValue = SDValue(DAG.getMachineNode(TargetOpcode::EXTRACT_SUBREG, dl,
1026 DAG.getTargetConstant(DestSubReg, MVT::i32)),
1036 SaveVarArgRegisters(CCInfo, DAG, dl, Chain);
1065 SDLoc dl, SelectionDAG &DAG) const {
1070 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
1071 getTargetMachine(), RVLocs, *DAG.getContext());
1112 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg);
1115 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg);
1119 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), Arg, Flag);
1121 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
1130 return DAG.getNode(AArch64ISD::Ret, dl, MVT::Other,
1137 SelectionDAG &DAG = CLI.DAG;
1148 MachineFunction &MF = DAG.getMachineFunction();
1158 Outs, OutVals, Ins, DAG);
1167 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(),
1168 getTargetMachine(), ArgLocs, *DAG.getContext());
1204 Chain = DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true),
1207 SDValue StackPtr = DAG.getCopyFromReg(Chain, dl, AArch64::XSP,
1239 Arg = SDValue(DAG.getMachineNode(TargetOpcode::INSERT_SUBREG, dl,
1241 DAG.getUNDEF(VA.getLocVT()),
1243 DAG.getTargetConstant(SrcSubReg, MVT::i32)),
1249 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg);
1272 DstAddr = DAG.getFrameIndex(FI, getPointerTy());
1277 Chain = addTokenForArgument(Chain, DAG, MF.getFrameInfo(), FI);
1279 SDValue PtrOff = DAG.getIntPtrConstant(VA.getLocMemOffset());
1281 DstAddr = DAG.getNode(ISD::ADD, dl, getPointerTy(), StackPtr, PtrOff);
1286 SDValue SizeNode = DAG.getConstant(Flags.getByValSize(), MVT::i64);
1287 SDValue Cpy = DAG.getMemcpy(Chain, dl, DstAddr, Arg, SizeNode,
1295 SDValue Store = DAG.getStore(Chain, dl, Arg, DstAddr, DstInfo,
1305 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
1314 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
1324 Callee = DAG.getTargetGlobalAddress(GV, dl, getPointerTy());
1327 Callee = DAG.getTargetExternalSymbol(Sym, getPointerTy());
1335 Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, true),
1336 DAG.getIntPtrConstant(0, true), InFlag, dl);
1340 // We produce the following DAG scheme for the actual call instruction:
1354 Ops.push_back(DAG.getTargetConstant(FPDiff, MVT::i32));
1358 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
1367 Ops.push_back(DAG.getRegisterMask(Mask));
1373 SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
1376 return DAG.getNode(AArch64ISD::TC_RETURN, dl, NodeTys, &Ops[0], Ops.size());
1379 Chain = DAG.getNode(AArch64ISD::Call, dl, NodeTys, &Ops[0], Ops.size());
1388 Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, true),
1389 DAG.getIntPtrConstant(CalleePopBytes, true),
1395 IsVarArg, Ins, dl, DAG, InVals);
1402 SDLoc dl, SelectionDAG &DAG,
1406 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(),
1407 getTargetMachine(), RVLocs, *DAG.getContext());
1417 SDValue Val = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getLocVT(),
1426 Val = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), Val);
1433 Val = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), Val);
1452 SelectionDAG& DAG) const {
1460 const MachineFunction &MF = DAG.getMachineFunction();
1496 CCState CCInfo(CalleeCC, IsVarArg, DAG.getMachineFunction(),
1497 getTargetMachine(), ArgLocs, *DAG.getContext());
1509 CCState CCInfo1(CalleeCC, false, DAG.getMachineFunction(),
1510 getTargetMachine(), RVLocs1, *DAG.getContext());
1514 CCState CCInfo2(CallerCC, false, DAG.getMachineFunction(),
1515 getTargetMachine(), RVLocs2, *DAG.getContext());
1540 CCState CCInfo(CalleeCC, IsVarArg, DAG.getMachineFunction(),
1541 getTargetMachine(), ArgLocs, *DAG.getContext());
1563 SelectionDAG &DAG,
1576 for (SDNode::use_iterator U = DAG.getEntryNode().getNode()->use_begin(),
1577 UE = DAG.getEntryNode().getNode()->use_end(); U != UE; ++U)
1591 return DAG.getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other,
1624 SelectionDAG &DAG, SDLoc &dl) const {
1650 RHS = DAG.getConstant(C-1, VT);
1657 RHS = DAG.getConstant(C-1, VT);
1664 RHS = DAG.getConstant(C+1, VT);
1671 RHS = DAG.getConstant(C+1, VT);
1679 A64cc = DAG.getConstant(CondCode, MVT::i32);
1680 return DAG.getNode(AArch64ISD::SETCC, dl, MVT::i32, LHS, RHS,
1681 DAG.getCondCode(CC));
1716 AArch64TargetLowering::LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const {
1725 return DAG.getNode(AArch64ISD::WrapperSmall, DL, PtrVT,
1726 DAG.getTargetBlockAddress(BA, PtrVT, 0,
1728 DAG.getTargetBlockAddress(BA, PtrVT, 0,
1730 DAG.getConstant(/*Alignment=*/ 4, MVT::i32));
1732 return DAG.getNode(
1734 DAG.getTargetBlockAddress(BA, PtrVT, 0, AArch64II::MO_ABS_G3),
1735 DAG.getTargetBlockAddress(BA, PtrVT, 0, AArch64II::MO_ABS_G2_NC),
1736 DAG.getTargetBlockAddress(BA, PtrVT, 0, AArch64II::MO_ABS_G1_NC),
1737 DAG.getTargetBlockAddress(BA, PtrVT, 0, AArch64II::MO_ABS_G0_NC));
1746 AArch64TargetLowering::LowerBRCOND(SDValue Op, SelectionDAG &DAG) const {
1755 TheBit = DAG.getNode(ISD::AND, dl, MVT::i32, TheBit,
1756 DAG.getConstant(1, MVT::i32));
1758 SDValue A64CMP = DAG.getNode(AArch64ISD::SETCC, dl, MVT::i32, TheBit,
1759 DAG.getConstant(0, TheBit.getValueType()),
1760 DAG.getCondCode(ISD::SETNE));
1762 return DAG.getNode(AArch64ISD::BR_CC, dl, MVT::Other, Chain,
1763 A64CMP, DAG.getConstant(A64CC::NE, MVT::i32),
1769 AArch64TargetLowering::LowerBR_CC(SDValue Op, SelectionDAG &DAG) const {
1780 softenSetCCOperands(DAG, MVT::f128, LHS, RHS, CC, dl);
1785 RHS = DAG.getConstant(0, LHS.getValueType());
1795 SDValue CmpOp = getSelectableIntSetCC(LHS, RHS, CC, A64cc, DAG, dl);
1797 return DAG.getNode(AArch64ISD::BR_CC, dl, MVT::Other,
1806 SDValue A64cc = DAG.getConstant(CondCode, MVT::i32);
1807 SDValue SetCC = DAG.getNode(AArch64ISD::SETCC, dl, MVT::i32, LHS, RHS,
1808 DAG.getCondCode(CC));
1809 SDValue A64BR_CC = DAG.getNode(AArch64ISD::BR_CC, dl, MVT::Other,
1813 A64cc = DAG.getConstant(Alternative, MVT::i32);
1814 A64BR_CC = DAG.getNode(AArch64ISD::BR_CC, dl, MVT::Other,
1823 AArch64TargetLowering::LowerF128ToCall(SDValue Op, SelectionDAG &DAG,
1829 Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext());
1835 SDValue Callee = DAG.getExternalSymbol(getLibcallName(Call), getPointerTy());
1837 Type *RetTy = Op.getValueType().getTypeForEVT(*DAG.getContext());
1843 SDValue InChain = DAG.getEntryNode();
1848 bool isTailCall = isInTailCallPosition(DAG, Op.getNode(), TCChain);
1856 Callee, Args, DAG, SDLoc(Op));
1860 // It's a tailcall, return the chain (which is the DAG root).
1861 return DAG.getRoot();
1867 AArch64TargetLowering::LowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const {
1877 return makeLibCall(DAG, LC, Op.getValueType(), &SrcVal, 1,
1882 AArch64TargetLowering::LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const {
1888 return LowerF128ToCall(Op, DAG, LC);
1892 AArch64TargetLowering::LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG,
1905 return LowerF128ToCall(Op, DAG, LC);
1910 SelectionDAG &DAG) const {
1919 SDValue GlobalAddr = DAG.getNode(
1921 DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, AArch64II::MO_ABS_G3),
1922 DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, AArch64II::MO_ABS_G2_NC),
1923 DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, AArch64II::MO_ABS_G1_NC),
1924 DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, AArch64II::MO_ABS_G0_NC));
1927 return DAG.getNode(ISD::ADD, dl, PtrVT, GlobalAddr,
1928 DAG.getConstant(GN->getOffset(), PtrVT));
1935 SelectionDAG &DAG) const {
1949 PoolAddr = DAG.getNode(AArch64ISD::WrapperSmall, dl, PtrVT,
1950 DAG.getTargetConstantPool(GV, PtrVT, 0, 0,
1952 DAG.getTargetConstantPool(GV, PtrVT, 0, 0,
1954 DAG.getConstant(8, MVT::i32));
1955 SDValue GlobalAddr = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), PoolAddr,
1961 return DAG.getNode(ISD::ADD, dl, PtrVT, GlobalAddr,
1962 DAG.getConstant(GN->getOffset(), PtrVT));
1995 SDValue GlobalRef = DAG.getNode(AArch64ISD::WrapperSmall, dl, PtrVT,
1996 DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0,
1998 DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0,
2000 DAG.getConstant(Alignment, MVT::i32));
2003 GlobalRef = DAG.getNode(AArch64ISD::GOTLoad, dl, PtrVT, DAG.getEntryNode(),
2008 return DAG.getNode(ISD::ADD, dl, PtrVT, GlobalRef,
2009 DAG.getConstant(GN->getOffset(), PtrVT));
2016 SelectionDAG &DAG) const {
2022 return LowerGlobalAddressELFSmall(Op, DAG);
2024 return LowerGlobalAddressELFLarge(Op, DAG);
2033 SelectionDAG &DAG) const {
2039 Func = DAG.getNode(AArch64ISD::GOTLoad, DL, PtrVT, DAG.getEntryNode(),
2045 Chain = DAG.getCopyToReg(DAG.getEntryNode(), DL, AArch64::X0, DescAddr, Glue);
2060 Ops.push_back(DAG.getRegister(AArch64::X0, PtrVT));
2061 Ops.push_back(DAG.getRegisterMask(Mask));
2064 SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
2065 Chain = DAG.getNode(AArch64ISD::TLSDESCCALL, DL, NodeTys, &Ops[0],
2071 return DAG.getCopyFromReg(Chain, DL, AArch64::X0, PtrVT, Glue);
2076 SelectionDAG &DAG) const {
2090 SDValue ThreadBase = DAG.getNode(AArch64ISD::THREAD_POINTER, DL, PtrVT);
2093 TPOff = DAG.getNode(AArch64ISD::WrapperSmall, DL, PtrVT,
2094 DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0,
2096 DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0,
2098 DAG.getConstant(8, MVT::i32));
2099 TPOff = DAG.getNode(AArch64ISD::GOTLoad, DL, PtrVT, DAG.getEntryNode(),
2102 SDValue HiVar = DAG.getTargetGlobalAddress(GV, DL, MVT::i64, 0,
2104 SDValue LoVar = DAG.getTargetGlobalAddress(GV, DL, MVT::i64, 0,
2107 TPOff = SDValue(DAG.getMachineNode(AArch64::MOVZxii, DL, PtrVT, HiVar,
2108 DAG.getTargetConstant(1, MVT::i32)), 0);
2109 TPOff = SDValue(DAG.getMachineNode(AArch64::MOVKxii, DL, PtrVT,
2111 DAG.getTargetConstant(0, MVT::i32)), 0);
2115 SDValue HiDesc = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0,
2117 SDValue LoDesc = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0,
2119 SDValue DescAddr = DAG.getNode(AArch64ISD::WrapperSmall, DL, PtrVT,
2121 DAG.getConstant(8, MVT::i32));
2122 SDValue SymAddr = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0);
2124 TPOff = LowerTLSDescCall(SymAddr, DescAddr, DL, DAG);
2132 AArch64MachineFunctionInfo* MFI = DAG.getMachineFunction()
2138 SDValue HiDesc = DAG.getTargetExternalSymbol("_TLS_MODULE_BASE_", PtrVT,
2140 SDValue LoDesc = DAG.getTargetExternalSymbol("_TLS_MODULE_BASE_", PtrVT,
2142 SDValue DescAddr = DAG.getNode(AArch64ISD::WrapperSmall, DL, PtrVT,
2144 DAG.getConstant(8, MVT::i32));
2145 SDValue SymAddr = DAG.getTargetExternalSymbol("_TLS_MODULE_BASE_", PtrVT);
2147 ThreadBase = LowerTLSDescCall(SymAddr, DescAddr, DL, DAG);
2150 SDValue HiVar = DAG.getTargetGlobalAddress(GV, DL, MVT::i64, 0,
2152 SDValue LoVar = DAG.getTargetGlobalAddress(GV, DL, MVT::i64, 0,
2155 TPOff = SDValue(DAG.getMachineNode(AArch64::MOVZxii, DL, PtrVT, HiVar,
2156 DAG.getTargetConstant(0, MVT::i32)), 0);
2157 TPOff = SDValue(DAG.getMachineNode(AArch64::MOVKxii, DL, PtrVT,
2159 DAG.getTargetConstant(0, MVT::i32)), 0);
2164 return DAG.getNode(ISD::ADD, DL, PtrVT, ThreadBase, TPOff);
2168 AArch64TargetLowering::LowerINT_TO_FP(SDValue Op, SelectionDAG &DAG,
2181 return LowerF128ToCall(Op, DAG, LC);
2186 AArch64TargetLowering::LowerJumpTable(SDValue Op, SelectionDAG &DAG) const {
2195 return DAG.getNode(AArch64ISD::WrapperSmall, dl, PtrVT,
2196 DAG.getTargetJumpTable(JT->getIndex(), PtrVT),
2197 DAG.getTargetJumpTable(JT->getIndex(), PtrVT,
2199 DAG.getConstant(1, MVT::i32));
2201 return DAG.getNode(
2203 DAG.getTargetJumpTable(JT->getIndex(), PtrVT, AArch64II::MO_ABS_G3),
2204 DAG.getTargetJumpTable(JT->getIndex(), PtrVT, AArch64II::MO_ABS_G2_NC),
2205 DAG.getTargetJumpTable(JT->getIndex(), PtrVT, AArch64II::MO_ABS_G1_NC),
2206 DAG.getTargetJumpTable(JT->getIndex(), PtrVT, AArch64II::MO_ABS_G0_NC));
2214 AArch64TargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const {
2225 softenSetCCOperands(DAG, MVT::f128, LHS, RHS, CC, dl);
2230 RHS = DAG.getConstant(0, LHS.getValueType());
2240 SDValue CmpOp = getSelectableIntSetCC(LHS, RHS, CC, A64cc, DAG, dl);
2242 return DAG.getNode(AArch64ISD::SELECT_CC, dl, Op.getValueType(),
2251 SDValue A64cc = DAG.getConstant(CondCode, MVT::i32);
2252 SDValue SetCC = DAG.getNode(AArch64ISD::SETCC, dl, MVT::i32, LHS, RHS,
2253 DAG.getCondCode(CC));
2254 SDValue A64SELECT_CC = DAG.getNode(AArch64ISD::SELECT_CC, dl,
2259 A64cc = DAG.getConstant(Alternative, MVT::i32);
2260 A64SELECT_CC = DAG.getNode(AArch64ISD::SELECT_CC, dl, Op.getValueType(),
2270 AArch64TargetLowering::LowerSELECT(SDValue Op, SelectionDAG &DAG) const {
2279 TheBit = DAG.getNode(ISD::AND, dl, MVT::i32, TheBit,
2280 DAG.getConstant(1, MVT::i32));
2281 SDValue A64CMP = DAG.getNode(AArch64ISD::SETCC, dl, MVT::i32, TheBit,
2282 DAG.getConstant(0, TheBit.getValueType()),
2283 DAG.getCondCode(ISD::SETNE));
2285 return DAG.getNode(AArch64ISD::SELECT_CC, dl, Op.getValueType(),
2287 DAG.getConstant(A64CC::NE, MVT::i32));
2290 static SDValue LowerVectorSETCC(SDValue Op, SelectionDAG &DAG) {
2311 SDValue NewLHS = DAG.getNode(ISD::BITCAST, DL, VT, AndOp.getOperand(0));
2312 SDValue NewRHS = DAG.getNode(ISD::BITCAST, DL, VT, AndOp.getOperand(1));
2313 return DAG.getNode(AArch64ISD::NEON_TST, DL, VT, NewLHS, NewRHS);
2338 Op1 = DAG.getConstant(0, MVT::i32);
2376 DAG.getNode(Opcode, DL, VT, Op0, Op1, DAG.getCondCode(CC));
2379 NeonCmp = DAG.getNOT(DL, NeonCmp, VT);
2397 Op1 = DAG.getConstantFP(0, MVT::f32);
2465 DAG.getNode(Opcode, DL, VT, Op0, Op1, DAG.getCondCode(ISD::SETGT));
2474 DAG.getNode(Opcode, DL, VT, Op0, Op1, DAG.getCondCode(ISD::SETGE));
2486 SDValue NeonCmp = DAG.getNode(Opcode, DL, VT, Op0, Op1, DAG.getCondCode(CC));
2489 NeonCmp = DAG.getNode(ISD::OR, DL, VT, NeonCmp, NeonCmpAlt);
2492 NeonCmp = DAG.getNOT(DL, NeonCmp, VT);
2499 AArch64TargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const {
2507 return LowerVectorSETCC(Op, DAG);
2512 softenSetCCOperands(DAG, MVT::f128, LHS, RHS, CC, dl);
2527 SDValue CmpOp = getSelectableIntSetCC(LHS, RHS, CC, A64cc, DAG, dl);
2529 return DAG.getNode(AArch64ISD::SELECT_CC, dl, VT,
2530 CmpOp, DAG.getConstant(1, VT), DAG.getConstant(0, VT),
2539 SDValue A64cc = DAG.getConstant(CondCode, MVT::i32);
2540 SDValue CmpOp = DAG.getNode(AArch64ISD::SETCC, dl, MVT::i32, LHS, RHS,
2541 DAG.getCondCode(CC));
2542 SDValue A64SELECT_CC = DAG.getNode(AArch64ISD::SELECT_CC, dl, VT,
2543 CmpOp, DAG.getConstant(1, VT),
2544 DAG.getConstant(0, VT), A64cc);
2547 A64cc = DAG.getConstant(Alternative, MVT::i32);
2548 A64SELECT_CC = DAG.getNode(AArch64ISD::SELECT_CC, dl, VT, CmpOp,
2549 DAG.getConstant(1, VT), A64SELECT_CC, A64cc);
2556 AArch64TargetLowering::LowerVACOPY(SDValue Op, SelectionDAG &DAG) const {
2562 return DAG.getMemcpy(Op.getOperand(0), SDLoc(Op),
2564 DAG.getConstant(32, MVT::i32), 8, false, false,
2569 AArch64TargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) const {
2572 MachineFunction &MF = DAG.getMachineFunction();
2583 SDValue Stack = DAG.getFrameIndex(FuncInfo->getVariadicStackIdx(),
2585 MemOps.push_back(DAG.getStore(Chain, DL, Stack, VAList,
2593 GRTopAddr = DAG.getNode(ISD::ADD, DL, getPointerTy(), VAList,
2594 DAG.getConstant(8, getPointerTy()));
2596 GRTop = DAG.getFrameIndex(FuncInfo->getVariadicGPRIdx(), getPointerTy());
2597 GRTop = DAG.getNode(ISD::ADD, DL, getPointerTy(), GRTop,
2598 DAG.getConstant(GPRSize, getPointerTy()));
2600 MemOps.push_back(DAG.getStore(Chain, DL, GRTop, GRTopAddr,
2609 VRTopAddr = DAG.getNode(ISD::ADD, DL, getPointerTy(), VAList,
2610 DAG.getConstant(16, getPointerTy()));
2612 VRTop = DAG.getFrameIndex(FuncInfo->getVariadicFPRIdx(), getPointerTy());
2613 VRTop = DAG.getNode(ISD::ADD, DL, getPointerTy(), VRTop,
2614 DAG.getConstant(FPRSize, getPointerTy()));
2616 MemOps.push_back(DAG.getStore(Chain, DL, VRTop, VRTopAddr,
2622 SDValue GROffsAddr = DAG.getNode(ISD::ADD, DL, getPointerTy(), VAList,
2623 DAG.getConstant(24, getPointerTy()));
2624 MemOps.push_back(DAG.getStore(Chain, DL, DAG.getConstant(-GPRSize, MVT::i32),
2629 SDValue VROffsAddr = DAG.getNode(ISD::ADD, DL, getPointerTy(), VAList,
2630 DAG.getConstant(28, getPointerTy()));
2631 MemOps.push_back(DAG.getStore(Chain, DL, DAG.getConstant(-FPRSize, MVT::i32),
2635 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, &MemOps[0],
2640 AArch64TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
2643 case ISD::FADD: return LowerF128ToCall(Op, DAG, RTLIB::ADD_F128);
2644 case ISD::FSUB: return LowerF128ToCall(Op, DAG, RTLIB::SUB_F128);
2645 case ISD::FMUL: return LowerF128ToCall(Op, DAG, RTLIB::MUL_F128);
2646 case ISD::FDIV: return LowerF128ToCall(Op, DAG, RTLIB::DIV_F128);
2647 case ISD::FP_TO_SINT: return LowerFP_TO_INT(Op, DAG, true);
2648 case ISD::FP_TO_UINT: return LowerFP_TO_INT(Op, DAG, false);
2649 case ISD::SINT_TO_FP: return LowerINT_TO_FP(Op, DAG, true);
2650 case ISD::UINT_TO_FP: return LowerINT_TO_FP(Op, DAG, false);
2651 case ISD::FP_ROUND: return LowerFP_ROUND(Op, DAG);
2652 case ISD::FP_EXTEND: return LowerFP_EXTEND(Op, DAG);
2654 case ISD::BlockAddress: return LowerBlockAddress(Op, DAG);
2655 case ISD::BRCOND: return LowerBRCOND(Op, DAG);
2656 case ISD::BR_CC: return LowerBR_CC(Op, DAG);
2657 case ISD::GlobalAddress: return LowerGlobalAddressELF(Op, DAG);
2658 case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG);
2659 case ISD::JumpTable: return LowerJumpTable(Op, DAG);
2660 case ISD::SELECT: return LowerSELECT(Op, DAG);
2661 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
2662 case ISD::SETCC: return LowerSETCC(Op, DAG);
2663 case ISD::VACOPY: return LowerVACOPY(Op, DAG);
2664 case ISD::VASTART: return LowerVASTART(Op, DAG);
2666 return LowerBUILD_VECTOR(Op, DAG, getSubtarget());
2677 unsigned SplatBitSize, SelectionDAG &DAG,
2817 SelectionDAG &DAG = DCI.DAG;
2846 return DAG.getNode(AArch64ISD::UBFX, DL, VT, Shift.getOperand(0),
2847 DAG.getConstant(LSB, MVT::i64),
2848 DAG.getConstant(LSB + Width - 1, MVT::i64));
2856 static int32_t getLSBForBFI(SelectionDAG &DAG, SDLoc DL, EVT VT,
2885 MaskedVal = DAG.getNode(ISD::SRL, DL, VT, MaskedVal,
2886 DAG.getConstant(ShiftRightRequired, MVT::i64));
2890 MaskedVal = DAG.getNode(ISD::SHL, DL, VT, MaskedVal,
2891 DAG.getConstant(-ShiftRightRequired, MVT::i64));
2931 SelectionDAG &DAG = DCI.DAG;
2968 if (getLSBForBFI(DAG, DL, VT, Bitfield, LHSMask) != -1) {
2978 int32_t LSB = getLSBForBFI(DAG, DL, VT, Bitfield, RHSMask);
2985 SDValue BFI = DAG.getNode(AArch64ISD::BFI, DL, VT,
2987 DAG.getConstant(LSB, MVT::i64),
2988 DAG.getConstant(Width, MVT::i64));
2994 return DAG.getNode(ISD::AND, DL, VT, BFI,
2995 DAG.getConstant(LHSMask | RHSMask, VT));
3012 SelectionDAG &DAG = DCI.DAG;
3048 OldBFIVal = DAG.getNode(ISD::ANY_EXTEND, DL, VT, OldBFIVal);
3049 NewBFIVal = DAG.getNode(ISD::ANY_EXTEND, DL, VT, NewBFIVal);
3056 BFI = DAG.getNode(AArch64ISD::BFI, DL, VT,
3064 return DAG.getNode(ISD::AND, DL, VT, BFI,
3065 DAG.getConstant(ExtraMask | ExistingMask, VT));
3094 SelectionDAG &DAG = DCI.DAG;
3128 return DAG.getNode(AArch64ISD::EXTR, DL, VT,
3130 DAG.getConstant(ShiftRHS, MVT::i64));
3138 SelectionDAG &DAG = DCI.DAG;
3142 if(!DAG.getTargetLoweringInfo().isTypeLegal(VT))
3174 if (VT.isVector() && DAG.getTargetLoweringInfo().isTypeLegal(VT)) {
3190 SDValue Result = DAG.getNode(AArch64ISD::NEON_BSL, DL, CanonicalVT,
3193 return DAG.getNode(ISD::BITCAST, DL, VT, Result);
3205 SelectionDAG &DAG = DCI.DAG;
3233 return DAG.getNode(AArch64ISD::SBFX, DL, VT, Shift.getOperand(0),
3234 DAG.getConstant(LSB, MVT::i64),
3235 DAG.getConstant(LSB + Width - 1, MVT::i64));
3275 AArch64TargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG,
3299 SplatBitSize, DAG, VT.is128BitVector(),
3301 SDValue ImmVal = DAG.getTargetConstant(Imm, MVT::i32);
3302 SDValue OpCmodeVal = DAG.getConstant(OpCmode, MVT::i32);
3305 SDValue NeonMov = DAG.getNode(AArch64ISD::NEON_MOVIMM, DL, NeonMovVT,
3307 return DAG.getNode(ISD::BITCAST, DL, VT, NeonMov);
3314 DAG, VT.is128BitVector(), Neon_Mvn_Imm, NeonMovVT,
3316 SDValue ImmVal = DAG.getTargetConstant(Imm, MVT::i32);
3317 SDValue OpCmodeVal = DAG.getConstant(OpCmode, MVT::i32);
3319 SDValue NeonMov = DAG.getNode(AArch64ISD::NEON_MVNIMM, DL, NeonMovVT,
3321 return DAG.getNode(ISD::BITCAST, DL, VT, NeonMov);
3333 SDValue Val = DAG.getTargetConstant(ImmVal, MVT::i32);
3334 return DAG.getNode(AArch64ISD::NEON_FMOVIMM, DL, VT, Val);
3388 SelectionDAG &DAG) const {
3431 Result = DAG.getTargetConstant(CVal, Op.getValueType());
3437 Result = DAG.getTargetGlobalAddress(GA->getGlobal(), SDLoc(Op),
3441 Result = DAG.getTargetBlockAddress(BA->getBlockAddress(),
3445 Result = DAG.getTargetExternalSymbol(ES->getSymbol(),
3454 Result = DAG.getTargetConstantFP(0.0, CFP->getValueType(0));
3467 TargetLowering::LowerAsmOperandForConstraint(Op, Constraint, Ops, DAG);