Searched defs:cond (Results 1 - 7 of 7) sorted by relevance

/art/compiler/dex/quick/mips/
H A Dint_mips.cc64 LIR* MipsMir2Lir::OpCmpBranch(ConditionCode cond, int src1, int src2, argument
71 switch (cond) {
112 LOG(FATAL) << "No support for ConditionCode: " << cond;
131 LIR* MipsMir2Lir::OpCmpImmBranch(ConditionCode cond, int reg, argument
138 branch = OpCmpBranch(cond, reg, t_reg, target);
143 switch (cond) {
155 branch = OpCmpBranch(cond, reg, t_reg, target);
323 LIR* MipsMir2Lir::OpIT(ConditionCode cond, const char* guide) { argument
/art/compiler/dex/quick/x86/
H A Dint_x86.cc66 X86ConditionCode X86ConditionEncoding(ConditionCode cond) { argument
67 switch (cond) {
88 LIR* X86Mir2Lir::OpCmpBranch(ConditionCode cond, int src1, int src2, argument
91 X86ConditionCode cc = X86ConditionEncoding(cond);
98 LIR* X86Mir2Lir::OpCmpImmBranch(ConditionCode cond, int reg, argument
100 if ((check_value == 0) && (cond == kCondEq || cond == kCondNe)) {
106 X86ConditionCode cc = X86ConditionEncoding(cond);
304 LIR* X86Mir2Lir::OpIT(ConditionCode cond, const char* guide) { argument
/art/compiler/llvm/
H A Dir_builder.h186 ::llvm::BranchInst* CreateCondBr(::llvm::Value *cond, argument
190 ::llvm::BranchInst* branch_inst = CreateCondBr(cond, true_bb, false_bb);
/art/compiler/dex/quick/
H A Dgen_common.cc89 ConditionCode cond; local
92 cond = kCondEq;
95 cond = kCondNe;
98 cond = kCondLt;
101 cond = kCondGe;
104 cond = kCondGt;
107 cond = kCondLe;
110 cond = static_cast<ConditionCode>(0);
119 cond = FlipComparisonOrder(cond);
142 ConditionCode cond; local
[all...]
/art/runtime/
H A Ddisassembler_arm.cc76 void DisassemblerArm::DumpCond(std::ostream& os, uint32_t cond) { argument
77 if (cond < 15) {
78 os << kConditionCodeNames[cond];
80 os << "Unexpected condition: " << cond; local
181 uint32_t cond = (instruction >> 28) & 0xf; local
275 opcode += kConditionCodeNames[cond];
747 // |111|10|S|cond| imm6 |1|0|J1|0|J2| imm11 |
753 uint32_t cond = (instr >> 22) & 0xF; local
757 DumpCond(opcode, cond);
786 // |111|10|S|cond| imm
789 uint32_t cond = (instr >> 22) & 0xF; local
1227 uint32_t cond = (instr >> 8) & 0xF; local
[all...]
/art/compiler/dex/quick/arm/
H A Dint_arm.cc27 LIR* ArmMir2Lir::OpCmpBranch(ConditionCode cond, int src1, argument
30 return OpCondBranch(cond, target);
311 LIR* ArmMir2Lir::OpCmpImmBranch(ConditionCode cond, int reg, int check_value, argument
315 ArmConditionCode arm_cond = ArmConditionEncoding(cond);
/art/compiler/utils/arm/
H A Dassembler_arm.cc137 void ArmAssembler::EmitType01(Condition cond, argument
145 CHECK_NE(cond, kNoCondition);
146 int32_t encoding = static_cast<int32_t>(cond) << kConditionShift |
157 void ArmAssembler::EmitType5(Condition cond, int offset, bool link) { argument
158 CHECK_NE(cond, kNoCondition);
159 int32_t encoding = static_cast<int32_t>(cond) << kConditionShift |
166 void ArmAssembler::EmitMemOp(Condition cond, argument
172 CHECK_NE(cond, kNoCondition);
173 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) |
183 void ArmAssembler::EmitMemOpAddressMode3(Condition cond, argument
198 EmitMultiMemOp(Condition cond, BlockAddressMode am, bool load, Register base, RegList regs) argument
215 EmitShiftImmediate(Condition cond, Shift opcode, Register rd, Register rm, ShifterOperand so) argument
232 EmitShiftRegister(Condition cond, Shift opcode, Register rd, Register rm, ShifterOperand so) argument
250 EmitBranch(Condition cond, Label* label, bool link) argument
261 and_(Register rd, Register rn, ShifterOperand so, Condition cond) argument
267 eor(Register rd, Register rn, ShifterOperand so, Condition cond) argument
273 sub(Register rd, Register rn, ShifterOperand so, Condition cond) argument
278 rsb(Register rd, Register rn, ShifterOperand so, Condition cond) argument
283 rsbs(Register rd, Register rn, ShifterOperand so, Condition cond) argument
289 add(Register rd, Register rn, ShifterOperand so, Condition cond) argument
295 adds(Register rd, Register rn, ShifterOperand so, Condition cond) argument
301 subs(Register rd, Register rn, ShifterOperand so, Condition cond) argument
307 adc(Register rd, Register rn, ShifterOperand so, Condition cond) argument
313 sbc(Register rd, Register rn, ShifterOperand so, Condition cond) argument
319 rsc(Register rd, Register rn, ShifterOperand so, Condition cond) argument
325 tst(Register rn, ShifterOperand so, Condition cond) argument
331 teq(Register rn, ShifterOperand so, Condition cond) argument
337 cmp(Register rn, ShifterOperand so, Condition cond) argument
342 cmn(Register rn, ShifterOperand so, Condition cond) argument
347 orr(Register rd, Register rn, ShifterOperand so, Condition cond) argument
353 orrs(Register rd, Register rn, ShifterOperand so, Condition cond) argument
359 mov(Register rd, ShifterOperand so, Condition cond) argument
364 movs(Register rd, ShifterOperand so, Condition cond) argument
369 bic(Register rd, Register rn, ShifterOperand so, Condition cond) argument
375 mvn(Register rd, ShifterOperand so, Condition cond) argument
380 mvns(Register rd, ShifterOperand so, Condition cond) argument
385 clz(Register rd, Register rm, Condition cond) argument
399 movw(Register rd, uint16_t imm16, Condition cond) argument
408 movt(Register rd, uint16_t imm16, Condition cond) argument
417 EmitMulOp(Condition cond, int32_t opcode, Register rd, Register rn, Register rm, Register rs) argument
436 mul(Register rd, Register rn, Register rm, Condition cond) argument
442 mla(Register rd, Register rn, Register rm, Register ra, Condition cond) argument
449 mls(Register rd, Register rn, Register rm, Register ra, Condition cond) argument
456 umull(Register rd_lo, Register rd_hi, Register rn, Register rm, Condition cond) argument
463 ldr(Register rd, Address ad, Condition cond) argument
468 str(Register rd, Address ad, Condition cond) argument
473 ldrb(Register rd, Address ad, Condition cond) argument
478 strb(Register rd, Address ad, Condition cond) argument
483 ldrh(Register rd, Address ad, Condition cond) argument
488 strh(Register rd, Address ad, Condition cond) argument
493 ldrsb(Register rd, Address ad, Condition cond) argument
498 ldrsh(Register rd, Address ad, Condition cond) argument
503 ldrd(Register rd, Address ad, Condition cond) argument
509 strd(Register rd, Address ad, Condition cond) argument
515 ldm(BlockAddressMode am, Register base, RegList regs, Condition cond) argument
523 stm(BlockAddressMode am, Register base, RegList regs, Condition cond) argument
531 ldrex(Register rt, Register rn, Condition cond) argument
546 strex(Register rd, Register rt, Register rn, Condition cond) argument
572 nop(Condition cond) argument
580 vmovsr(SRegister sn, Register rt, Condition cond) argument
595 vmovrs(Register rt, SRegister sn, Condition cond) argument
610 vmovsrr(SRegister sm, Register rt, Register rt2, Condition cond) argument
631 vmovrrs(Register rt, Register rt2, SRegister sm, Condition cond) argument
653 vmovdrr(DRegister dm, Register rt, Register rt2, Condition cond) argument
673 vmovrrd(Register rt, Register rt2, DRegister dm, Condition cond) argument
694 vldrs(SRegister sd, Address ad, Condition cond) argument
706 vstrs(SRegister sd, Address ad, Condition cond) argument
719 vldrd(DRegister dd, Address ad, Condition cond) argument
731 vstrd(DRegister dd, Address ad, Condition cond) argument
744 EmitVFPsss(Condition cond, int32_t opcode, SRegister sd, SRegister sn, SRegister sm) argument
762 EmitVFPddd(Condition cond, int32_t opcode, DRegister dd, DRegister dn, DRegister dm) argument
780 vmovs(SRegister sd, SRegister sm, Condition cond) argument
785 vmovd(DRegister dd, DRegister dm, Condition cond) argument
790 vmovs(SRegister sd, float s_imm, Condition cond) argument
805 vmovd(DRegister dd, double d_imm, Condition cond) argument
820 vadds(SRegister sd, SRegister sn, SRegister sm, Condition cond) argument
826 vaddd(DRegister dd, DRegister dn, DRegister dm, Condition cond) argument
832 vsubs(SRegister sd, SRegister sn, SRegister sm, Condition cond) argument
838 vsubd(DRegister dd, DRegister dn, DRegister dm, Condition cond) argument
844 vmuls(SRegister sd, SRegister sn, SRegister sm, Condition cond) argument
850 vmuld(DRegister dd, DRegister dn, DRegister dm, Condition cond) argument
856 vmlas(SRegister sd, SRegister sn, SRegister sm, Condition cond) argument
862 vmlad(DRegister dd, DRegister dn, DRegister dm, Condition cond) argument
868 vmlss(SRegister sd, SRegister sn, SRegister sm, Condition cond) argument
874 vmlsd(DRegister dd, DRegister dn, DRegister dm, Condition cond) argument
880 vdivs(SRegister sd, SRegister sn, SRegister sm, Condition cond) argument
886 vdivd(DRegister dd, DRegister dn, DRegister dm, Condition cond) argument
892 vabss(SRegister sd, SRegister sm, Condition cond) argument
897 vabsd(DRegister dd, DRegister dm, Condition cond) argument
902 vnegs(SRegister sd, SRegister sm, Condition cond) argument
907 vnegd(DRegister dd, DRegister dm, Condition cond) argument
912 vsqrts(SRegister sd, SRegister sm, Condition cond) argument
916 vsqrtd(DRegister dd, DRegister dm, Condition cond) argument
921 EmitVFPsd(Condition cond, int32_t opcode, SRegister sd, DRegister dm) argument
936 EmitVFPds(Condition cond, int32_t opcode, DRegister dd, SRegister sm) argument
951 vcvtsd(SRegister sd, DRegister dm, Condition cond) argument
956 vcvtds(DRegister dd, SRegister sm, Condition cond) argument
961 vcvtis(SRegister sd, SRegister sm, Condition cond) argument
966 vcvtid(SRegister sd, DRegister dm, Condition cond) argument
971 vcvtsi(SRegister sd, SRegister sm, Condition cond) argument
976 vcvtdi(DRegister dd, SRegister sm, Condition cond) argument
981 vcvtus(SRegister sd, SRegister sm, Condition cond) argument
986 vcvtud(SRegister sd, DRegister dm, Condition cond) argument
991 vcvtsu(SRegister sd, SRegister sm, Condition cond) argument
996 vcvtdu(DRegister dd, SRegister sm, Condition cond) argument
1001 vcmps(SRegister sd, SRegister sm, Condition cond) argument
1006 vcmpd(DRegister dd, DRegister dm, Condition cond) argument
1011 vcmpsz(SRegister sd, Condition cond) argument
1016 vcmpdz(DRegister dd, Condition cond) argument
1021 vmstat(Condition cond) argument
1045 b(Label* label, Condition cond) argument
1050 bl(Label* label, Condition cond) argument
1055 blx(Register rm, Condition cond) argument
1064 bx(Register rm, Condition cond) argument
1124 AddConstant(Register rd, int32_t value, Condition cond) argument
1129 AddConstant(Register rd, Register rn, int32_t value, Condition cond) argument
1165 AddConstantSetFlags(Register rd, Register rn, int32_t value, Condition cond) argument
1192 LoadImmediate(Register rd, int32_t value, Condition cond) argument
1248 LoadFromOffset(LoadOperandType type, Register reg, Register base, int32_t offset, Condition cond) argument
1287 LoadSFromOffset(SRegister reg, Register base, int32_t offset, Condition cond) argument
1304 LoadDFromOffset(DRegister reg, Register base, int32_t offset, Condition cond) argument
1321 StoreToOffset(StoreOperandType type, Register reg, Register base, int32_t offset, Condition cond) argument
1355 StoreSToOffset(SRegister reg, Register base, int32_t offset, Condition cond) argument
1372 StoreDToOffset(DRegister reg, Register base, int32_t offset, Condition cond) argument
1387 Push(Register rd, Condition cond) argument
1391 Pop(Register rd, Condition cond) argument
1395 PushList(RegList regs, Condition cond) argument
1399 PopList(RegList regs, Condition cond) argument
1403 Mov(Register rd, Register rm, Condition cond) argument
1409 Lsl(Register rd, Register rm, uint32_t shift_imm, Condition cond) argument
1415 Lsr(Register rd, Register rm, uint32_t shift_imm, Condition cond) argument
1422 Asr(Register rd, Register rm, uint32_t shift_imm, Condition cond) argument
1429 Ror(Register rd, Register rm, uint32_t shift_imm, Condition cond) argument
1435 Rrx(Register rd, Register rm, Condition cond) argument
[all...]

Completed in 155 milliseconds