/dalvik/vm/compiler/ |
H A D | Ralloc.cpp | 29 MIR *mir; local 33 for (mir = bb->firstMIRInsn; mir; mir = mir->next) { 34 SSARepresentation *ssaRep = mir->ssaRep;
|
H A D | IntermediateRep.cpp | 32 void dvmCompilerAppendMIR(BasicBlock *bb, MIR *mir) argument 36 bb->lastMIRInsn = bb->firstMIRInsn = mir; 37 mir->prev = mir->next = NULL; 39 bb->lastMIRInsn->next = mir; 40 mir->prev = bb->lastMIRInsn; 41 mir->next = NULL; 42 bb->lastMIRInsn = mir; 47 void dvmCompilerPrependMIR(BasicBlock *bb, MIR *mir) argument 51 bb->lastMIRInsn = bb->firstMIRInsn = mir; [all...] |
H A D | Loop.cpp | 346 MIR *mir; local 349 for (mir = loopBody->firstMIRInsn; mir; mir = mir->next) { 350 DecodedInstruction *dInsn = &mir->dalvikInsn; 352 dvmCompilerDataFlowAttributes[mir->dalvikInsn.opcode]; 400 dvmConvertSSARegToDalvik(cUnit, mir->ssaRep->uses[refIdx]); 417 mir->ssaRep->uses[useIdx])) { 418 mir [all...] |
H A D | Dataflow.cpp | 922 const MIR *mir) 926 const DecodedInstruction *insn = &mir->dalvikInsn; 937 getSSAName(cUnit, mir->ssaRep->defs[0], operand0), 938 getSSAName(cUnit, mir->ssaRep->uses[0], operand1)); 940 for (i = 1; i < mir->ssaRep->numUses; i++) { 942 getSSAName(cUnit, mir->ssaRep->uses[i], operand0)); 962 getSSAName(cUnit, mir->ssaRep->uses[0], operand0)); 967 getSSAName(cUnit, mir->ssaRep->uses[0], operand0), 968 getSSAName(cUnit, mir->ssaRep->uses[1], operand1)); 982 mir 921 dvmCompilerFullDisassembler(const CompilationUnit *cUnit, const MIR *mir) argument 1110 MIR *mir; local 1185 dataFlowSSAFormat35C(CompilationUnit *cUnit, MIR *mir) argument 1200 dataFlowSSAFormat3RC(CompilationUnit *cUnit, MIR *mir) argument 1217 MIR *mir; local 1348 MIR *mir; local 1425 MIR *mir; local [all...] |
H A D | SSATransformation.cpp | 506 MIR *mir; local 509 for (mir = bb->firstMIRInsn; mir; mir = mir->next) { 510 if (mir->dalvikInsn.opcode != (Opcode)kMirOpPhi) 512 int ssaReg = mir->ssaRep->defs[0]; 534 mir->ssaRep->numUses = numUses; 535 mir->ssaRep->uses = 537 mir [all...] |
H A D | Frontend.cpp | 689 const MIR *mir; local 692 for (mir = bb->firstMIRInsn; mir; mir = mir->next) { 693 fprintf(file, " {%04x %s\\l}%s\\\n", mir->offset, 694 mir->ssaRep ? 695 dvmCompilerFullDisassembler(cUnit, mir) : 696 dexGetOpcodeName(mir->dalvikInsn.opcode), 697 mir [all...] |
/dalvik/vm/compiler/codegen/ |
H A D | Ralloc.h | 73 static inline int dvmCompilerSSASrc(MIR *mir, int num) argument 75 assert(mir->ssaRep->numUses > num); 76 return mir->ssaRep->uses[num]; 125 extern RegLocation dvmCompilerGetSrcWide(CompilationUnit *cUnit, MIR *mir, 128 extern RegLocation dvmCompilerGetDestWide(CompilationUnit *cUnit, MIR *mir, 131 extern RegLocation dvmCompilerGetSrc(CompilationUnit *cUnit, MIR *mir, int num); 134 extern RegLocation dvmCompilerGetDest(CompilationUnit *cUnit, MIR *mir,
|
H A D | RallocUtil.cpp | 829 static inline int getDestSSAName(MIR *mir, int num) argument 831 assert(mir->ssaRep->numDefs > num); 832 return mir->ssaRep->defs[num]; 836 extern RegLocation dvmCompilerGetSrc(CompilationUnit *cUnit, MIR *mir, int num) argument 839 SREG(cUnit, dvmCompilerSSASrc(mir, num))]; 840 loc.fp = cUnit->regLocation[dvmCompilerSSASrc(mir, num)].fp; 846 extern RegLocation dvmCompilerGetDest(CompilationUnit *cUnit, MIR *mir, argument 849 RegLocation loc = cUnit->regLocation[SREG(cUnit, getDestSSAName(mir, num))]; 850 loc.fp = cUnit->regLocation[getDestSSAName(mir, num)].fp; 855 static RegLocation getLocWide(CompilationUnit *cUnit, MIR *mir, argument 879 dvmCompilerGetDestWide(CompilationUnit *cUnit, MIR *mir, int low, int high) argument 885 dvmCompilerGetSrcWide(CompilationUnit *cUnit, MIR *mir, int low, int high) argument [all...] |
/dalvik/vm/compiler/codegen/arm/FP/ |
H A D | ThumbPortableFP.cpp | 18 static bool genArithOpFloatPortable(CompilationUnit *cUnit, MIR *mir, 22 static bool genArithOpDoublePortable(CompilationUnit *cUnit, MIR *mir, 26 static bool genConversionPortable(CompilationUnit *cUnit, MIR *mir); 28 static bool handleExecuteInlineC(CompilationUnit *cUnit, MIR *mir); 30 static bool genConversion(CompilationUnit *cUnit, MIR *mir) argument 32 return genConversionPortable(cUnit, mir); 35 static bool genArithOpFloat(CompilationUnit *cUnit, MIR *mir, argument 39 return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1, rlSrc2); 42 static bool genArithOpDouble(CompilationUnit *cUnit, MIR *mir, argument 46 return genArithOpDoublePortable(cUnit, mir, rlDes 49 genInlineSqrt(CompilationUnit *cUnit, MIR *mir) argument 54 genCmpFP(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument [all...] |
H A D | ThumbVFP.cpp | 45 static bool genInlineSqrt(CompilationUnit *cUnit, MIR *mir) argument 47 RegLocation rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1); 64 static bool genArithOpFloat(CompilationUnit *cUnit, MIR *mir, argument 74 switch (mir->dalvikInsn.opcode) { 94 return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1, rlSrc2); 110 static bool genArithOpDouble(CompilationUnit *cUnit, MIR *mir, argument 116 switch (mir->dalvikInsn.opcode) { 136 return genArithOpDoublePortable(cUnit, mir, rlDest, rlSrc1, 154 static bool genConversion(CompilationUnit *cUnit, MIR *mir) argument 156 Opcode opcode = mir 226 genCmpFP(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument [all...] |
H A D | Thumb2VFP.cpp | 17 static bool genArithOpFloat(CompilationUnit *cUnit, MIR *mir, argument 28 switch (mir->dalvikInsn.opcode) { 48 return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1, 63 static bool genArithOpDouble(CompilationUnit *cUnit, MIR *mir, argument 70 switch (mir->dalvikInsn.opcode) { 90 return genArithOpDoublePortable(cUnit, mir, rlDest, rlSrc1, 111 static bool genConversion(CompilationUnit *cUnit, MIR *mir) argument 113 Opcode opcode = mir->dalvikInsn.opcode; 157 return genConversionPortable(cUnit, mir); 162 rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 185 genInlineSqrt(CompilationUnit *cUnit, MIR *mir) argument 211 genCmpFP(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument [all...] |
/dalvik/vm/compiler/codegen/mips/ |
H A D | Ralloc.h | 77 static inline int dvmCompilerSSASrc(MIR *mir, int num) argument 79 assert(mir->ssaRep->numUses > num); 80 return mir->ssaRep->uses[num]; 129 extern RegLocation dvmCompilerGetSrcWide(CompilationUnit *cUnit, MIR *mir, 132 extern RegLocation dvmCompilerGetDestWide(CompilationUnit *cUnit, MIR *mir, 135 extern RegLocation dvmCompilerGetSrc(CompilationUnit *cUnit, MIR *mir, int num); 138 extern RegLocation dvmCompilerGetDest(CompilationUnit *cUnit, MIR *mir,
|
H A D | RallocUtil.cpp | 901 static inline int getDestSSAName(MIR *mir, int num) argument 903 assert(mir->ssaRep->numDefs > num); 904 return mir->ssaRep->defs[num]; 908 extern RegLocation dvmCompilerGetSrc(CompilationUnit *cUnit, MIR *mir, int num) argument 911 SREG(cUnit, dvmCompilerSSASrc(mir, num))]; 912 loc.fp = cUnit->regLocation[dvmCompilerSSASrc(mir, num)].fp; 918 extern RegLocation dvmCompilerGetDest(CompilationUnit *cUnit, MIR *mir, argument 921 RegLocation loc = cUnit->regLocation[SREG(cUnit, getDestSSAName(mir, num))]; 922 loc.fp = cUnit->regLocation[getDestSSAName(mir, num)].fp; 927 static RegLocation getLocWide(CompilationUnit *cUnit, MIR *mir, argument 951 dvmCompilerGetDestWide(CompilationUnit *cUnit, MIR *mir, int low, int high) argument 957 dvmCompilerGetSrcWide(CompilationUnit *cUnit, MIR *mir, int low, int high) argument [all...] |
/dalvik/vm/compiler/codegen/mips/FP/ |
H A D | MipsFP.cpp | 44 static bool genInlineSqrt(CompilationUnit *cUnit, MIR *mir) argument 46 RegLocation rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1); 67 static bool genArithOpFloat(CompilationUnit *cUnit, MIR *mir, argument 79 switch (mir->dalvikInsn.opcode) { 99 return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1, rlSrc2); 118 switch (mir->dalvikInsn.opcode) { 138 return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1, rlSrc2); 157 static bool genArithOpDouble(CompilationUnit *cUnit, MIR *mir, argument 165 switch (mir->dalvikInsn.opcode) { 185 return genArithOpDoublePortable(cUnit, mir, rlDes 246 genConversion(CompilationUnit *cUnit, MIR *mir) argument 378 genCmpFP(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument [all...] |
/dalvik/vm/compiler/codegen/arm/ |
H A D | CodegenCommon.cpp | 341 static RegLocation inlinedTarget(CompilationUnit *cUnit, MIR *mir, argument 344 if (mir->next && 345 ((mir->next->dalvikInsn.opcode == OP_MOVE_RESULT) || 346 (mir->next->dalvikInsn.opcode == OP_MOVE_RESULT_OBJECT))) { 347 mir->next->dalvikInsn.opcode = OP_NOP; 348 return dvmCompilerGetDest(cUnit, mir->next, 0); 422 static RegLocation inlinedTargetWide(CompilationUnit *cUnit, MIR *mir, argument 425 if (mir->next && 426 (mir->next->dalvikInsn.opcode == OP_MOVE_RESULT_WIDE)) { 427 mir [all...] |
/dalvik/vm/compiler/codegen/arm/Thumb/ |
H A D | Gen.cpp | 124 static void genLong3Addr(CompilationUnit *cUnit, MIR *mir, OpKind firstOp, argument 133 genInterpSingleStep(cUnit, mir); 186 static ArmLIR *genExportPC(CompilationUnit *cUnit, MIR *mir) argument 192 res = loadConstant(cUnit, rDPC, (int) (cUnit->method->insns + mir->offset)); 199 static void genMonitor(CompilationUnit *cUnit, MIR *mir) argument 201 genMonitorPortable(cUnit, mir); 204 static void genCmpLong(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, argument 215 static bool genInlinedAbsFloat(CompilationUnit *cUnit, MIR *mir) argument 218 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0); 230 static bool genInlinedAbsDouble(CompilationUnit *cUnit, MIR *mir) argument 249 genInlinedMinMaxInt(CompilationUnit *cUnit, MIR *mir, bool isMin) argument [all...] |
H A D | Factory.cpp | 575 static ArmLIR *loadBaseDispBody(CompilationUnit *cUnit, MIR *mir, int rBase, argument 697 static ArmLIR *loadBaseDisp(CompilationUnit *cUnit, MIR *mir, int rBase, argument 701 return loadBaseDispBody(cUnit, mir, rBase, displacement, rDest, -1, 705 static ArmLIR *loadBaseDispWide(CompilationUnit *cUnit, MIR *mir, int rBase, argument 709 return loadBaseDispBody(cUnit, mir, rBase, displacement, rDestLo, rDestHi,
|
/dalvik/vm/compiler/codegen/arm/Thumb2/ |
H A D | Gen.cpp | 125 static void genLong3Addr(CompilationUnit *cUnit, MIR *mir, OpKind firstOp, argument 198 static ArmLIR *genExportPC(CompilationUnit *cUnit, MIR *mir) argument 203 res = loadConstant(cUnit, rDPC, (int) (cUnit->method->insns + mir->offset)); 237 static void genMonitorEnter(CompilationUnit *cUnit, MIR *mir) argument 239 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0); 249 genNullCheck(cUnit, rlSrc.sRegLow, r1, mir->offset, NULL); 268 loadConstant(cUnit, r3, (int) (cUnit->method->insns + mir->offset)); 271 loadConstant(cUnit, r4PC, (int)(cUnit->method->insns + mir->offset + 292 static void genMonitorExit(CompilationUnit *cUnit, MIR *mir) argument 294 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 347 genMonitor(CompilationUnit *cUnit, MIR *mir) argument 370 genCmpLong(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2) argument 406 genInlinedAbsFloat(CompilationUnit *cUnit, MIR *mir) argument 417 genInlinedAbsDouble(CompilationUnit *cUnit, MIR *mir) argument 429 genInlinedMinMaxInt(CompilationUnit *cUnit, MIR *mir, bool isMin) argument [all...] |
H A D | Factory.cpp | 875 static ArmLIR *loadBaseDispBody(CompilationUnit *cUnit, MIR *mir, int rBase, argument 901 res = loadBaseDispBody(cUnit, mir, rBase, displacement, rDest, 992 static ArmLIR *loadBaseDisp(CompilationUnit *cUnit, MIR *mir, int rBase, argument 996 return loadBaseDispBody(cUnit, mir, rBase, displacement, rDest, -1, 1000 static ArmLIR *loadBaseDispWide(CompilationUnit *cUnit, MIR *mir, int rBase, argument 1004 return loadBaseDispBody(cUnit, mir, rBase, displacement, rDestLo, rDestHi,
|
/dalvik/vm/compiler/codegen/mips/Mips32/ |
H A D | Gen.cpp | 132 static void genLong3Addr(CompilationUnit *cUnit, MIR *mir, OpKind firstOp, argument 143 genInterpSingleStep(cUnit, mir); 218 static MipsLIR *genExportPC(CompilationUnit *cUnit, MIR *mir) argument 224 res = loadConstant(cUnit, rDPC, (int) (cUnit->method->insns + mir->offset)); 230 static void genMonitor(CompilationUnit *cUnit, MIR *mir) argument 232 genMonitorPortable(cUnit, mir); 235 static void genCmpLong(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest, argument 246 static bool genInlinedAbsFloat(CompilationUnit *cUnit, MIR *mir) argument 249 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0); 263 static bool genInlinedAbsDouble(CompilationUnit *cUnit, MIR *mir) argument 284 genInlinedMinMaxInt(CompilationUnit *cUnit, MIR *mir, bool isMin) argument [all...] |
H A D | Factory.cpp | 592 static MipsLIR *loadBaseDispBody(CompilationUnit *cUnit, MIR *mir, int rBase, argument 702 static MipsLIR *loadBaseDisp(CompilationUnit *cUnit, MIR *mir, int rBase, argument 706 return loadBaseDispBody(cUnit, mir, rBase, displacement, rDest, -1, 710 static MipsLIR *loadBaseDispWide(CompilationUnit *cUnit, MIR *mir, int rBase, argument 714 return loadBaseDispBody(cUnit, mir, rBase, displacement, rDestLo, rDestHi,
|
/dalvik/vm/compiler/codegen/x86/ |
H A D | Lower.cpp | 411 bool lowerByteCodeJit(const Method* method, const u2* codePtr, MIR* mir) { argument 414 traceCurrentMIR = mir;
|
H A D | LowerInvoke.cpp | 58 static void genLandingPadForMispredictedCallee(MIR* mir) { argument 86 genLandingPadForMispredictedCallee(); //cUnit, mir, bb, labelList); 275 genLandingPadForMispredictedCallee(); //cUnit, mir, bb, labelList); 1207 genLandingPadForMispredictedCallee(); //cUnit, mir, bb, labelList);
|
H A D | CodegenInterface.cpp | 788 static void genHoistedChecksForCountUpLoop(CompilationUnit *cUnit, MIR *mir) argument 796 DecodedInstruction *dInsn = &mir->dalvikInsn; 800 get_virtual_reg(mir->dalvikInsn.vA, OpndSize_32, P_GPR_1, true); 802 get_virtual_reg(mir->dalvikInsn.vC, OpndSize_32, P_GPR_2, true); 833 static void genHoistedChecksForCountDownLoop(CompilationUnit *cUnit, MIR *mir) argument 835 DecodedInstruction *dInsn = &mir->dalvikInsn; 839 get_virtual_reg(mir->dalvikInsn.vA, OpndSize_32, P_GPR_1, true); 841 get_virtual_reg(mir->dalvikInsn.vB, OpndSize_32, P_GPR_2, true); 864 static void genHoistedLowerBoundCheck(CompilationUnit *cUnit, MIR *mir) argument 866 DecodedInstruction *dInsn = &mir 876 genValidationForPredictedInline(CompilationUnit *cUnit, MIR *mir) argument 902 handleExtendedMIR(CompilationUnit *cUnit, MIR *mir) argument 1129 MIR *mir; local [all...] |
H A D | AnalysisO1.cpp | 662 MIR* mir; local 666 for(mir = bb->jitBasicBlock->firstMIRInsn; mir; mir = mir->next) { 668 mir->seqNum = seqNum++; 669 rPC = rPC_start + mir->offset; 671 if(mir->dalvikInsn.opcode >= kMirOpFirst && 672 mir->dalvikInsn.opcode != kMirOpCheckInlinePrediction) continue; 676 if(mir 774 MIR* mir; local [all...] |