/external/llvm/lib/CodeGen/ |
H A D | RegAllocFast.cpp | 63 MachineBasicBlock *MBB; member in class:__anon22120::RAFast 290 TII->storeRegToStackSlot(*MBB, MI, LR.PhysReg, SpillKill, FI, RC, TRI); 304 if (MI == MBB->end()) { 310 MachineBasicBlock *MBB = DBG->getParent(); local 312 BuildMI(*MBB, MI, DL, TII->get(TargetOpcode::DBG_VALUE)) 626 TII->loadRegFromStackSlot(*MBB, MI, LRI->PhysReg, FrameIndex, RC, TRI); 783 DEBUG(dbgs() << "\nAllocating " << *MBB); 788 MachineBasicBlock::iterator MII = MBB->begin(); 791 for (MachineBasicBlock::livein_iterator I = MBB->livein_begin(), 792 E = MBB 864 MachineBasicBlock *MBB = MI->getParent(); local [all...] |
H A D | TwoAddressInstructionPass.cpp | 81 MachineBasicBlock *MBB; member in class:__anon22163::TwoAddressInstructionPass 220 SlotIndex MBBEndIdx = LIS->getMBBEndIdx(MBB).getPrevSlot(); 243 if (!KillMI || KillMI->getParent() != MBB || KillMI == MI || 300 MBB->remove(MI); 301 MBB->insert(KillPos, MI); 311 /// last instruction in the MBB that defines the specified register and the 322 if (MI->getParent() != MBB || MI->isDebugValue()) 452 MachineInstr *findOnlyInterestingUse(unsigned Reg, MachineBasicBlock *MBB, argument 461 if (UseMI.getParent() != MBB) 626 MachineFunction::iterator MFI = MBB; [all...] |
H A D | MachineBasicBlock.cpp | 65 raw_ostream &llvm::operator<<(raw_ostream &OS, const MachineBasicBlock &MBB) { argument 66 MBB.print(OS); 70 /// addNodeToList (MBB) - When an MBB is added to an MF, we need to update the 71 /// parent pointer of the MBB, the MBB numbering, and any instructions in the 72 /// MBB to be on the right operand list for registers. 74 /// MBBs start out as #-1. When a MBB is added to a MachineFunction, it 75 /// gets the next available unique MBB number. If it is removed from a 128 /// MBB lis 1077 const MachineBasicBlock *MBB = *SI; local 1214 WriteAsOperand(raw_ostream &OS, const MachineBasicBlock *MBB, bool t) argument [all...] |
H A D | StackColoring.cpp | 397 for (MachineFunction::iterator MBB = MF->begin(), MBBe = MF->end(); 398 MBB != MBBe; ++MBB) { 408 if (MI->getParent() != MBB) 432 BlockLifetimeInfo &MBBLiveness = BlockLiveness[MBB]; 435 Starts[pos] = Indexes->getMBBStartIdx(MBB); 439 Finishes[pos] = Indexes->getMBBEndIdx(MBB); 457 SlotIndex NewStart = Indexes->getMBBStartIdx(MBB); 458 SlotIndex NewFin = Indexes->getMBBEndIdx(MBB);
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H A D | MachineFunction.cpp | 49 void ilist_traits<MachineBasicBlock>::deleteNode(MachineBasicBlock *MBB) { argument 50 MBB->getParent()->DeleteMachineBasicBlock(MBB); 128 /// recomputes them. This guarantees that the MBB numbers are sequential, 132 void MachineFunction::RenumberBlocks(MachineBasicBlock *MBB) { argument 135 if (MBB == 0) 138 MBBI = MBB; 150 "MBB number mismatch!"); 217 MachineFunction::DeleteMachineBasicBlock(MachineBasicBlock *MBB) { argument 218 assert(MBB [all...] |
H A D | MachineLICM.cpp | 86 bool isExitBlock(const MachineBasicBlock *MBB) const { 87 return std::find(ExitBlocks.begin(), ExitBlocks.end(), MBB) != 111 // If a MBB does not dominate loop exiting blocks then it may not safe 223 void EnterScope(MachineBasicBlock *MBB); 225 void ExitScope(MachineBasicBlock *MBB); 227 /// ExitScopeIfDone - Destroy scope for the MBB that corresponds to given 617 MachineBasicBlock *MBB = MI->getParent(); local 618 Preheader->splice(Preheader->getFirstTerminator(), MBB, MI); 650 void MachineLICM::EnterScope(MachineBasicBlock *MBB) { argument 651 DEBUG(dbgs() << "Entering: " << MBB 657 ExitScope(MachineBasicBlock *MBB) argument 748 MachineBasicBlock *MBB = Node->getBlock(); local 1279 MachineBasicBlock *MBB = MI->getParent(); local [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | InstrEmitter.h | 37 MachineBasicBlock *MBB; member in class:llvm::InstrEmitter 128 MachineBasicBlock *getBlock() { return MBB; }
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/external/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 228 addFullAddress(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, 248 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, 288 addFullAddress(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, 317 addFullAddress(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, 357 FuncInfo.MBBMap[I->getParent()] == FuncInfo.MBB) { 447 == FuncInfo.MBB) && 573 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc), LoadReg); 579 // Prevent loading GV stub multiple times in same MBB. 818 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::COPY), 835 BuildMI(*FuncInfo.MBB, FuncInf [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | ARMBaseInstrInfo.cpp | 271 ARMBaseInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, argument 278 MachineBasicBlock::iterator I = MBB.end(); 279 if (I == MBB.begin()) 294 if (I == MBB.begin()) 339 while (DI != MBB.end()) { 350 if (I == MBB.begin()) 362 unsigned ARMBaseInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const { 363 MachineBasicBlock::iterator I = MBB.end(); 364 if (I == MBB.begin()) return 0; 367 if (I == MBB 391 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument 643 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument 757 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 948 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 1250 reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, unsigned SubIdx, const MachineInstr *Orig, const TargetRegisterInfo &TRI) const argument 1484 isSchedulingBoundary(const MachineInstr *MI, const MachineBasicBlock *MBB, const MachineFunction &MF) const argument 1528 isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, unsigned ExtraPredCycles, const BranchProbability &Probability) const argument 1779 emitARMRegPlusImmediate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned BaseReg, int NumBytes, ARMCC::CondCodes Pred, unsigned PredReg, const ARMBaseInstrInfo &TII, unsigned MIFlags) argument 2248 MachineBasicBlock *MBB = CmpInstr->getParent(); local [all...] |
H A D | ARMBaseRegisterInfo.h | 139 void materializeFrameBaseRegister(MachineBasicBlock *MBB, 161 virtual void emitLoadConstPool(MachineBasicBlock &MBB,
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/external/llvm/include/llvm/CodeGen/ |
H A D | SlotIndexes.h | 349 /// MBBRanges - Map MBB number to (start, stop) indexes. 353 /// and MBB id. 392 void repairIndexesInRange(MachineBasicBlock *MBB, 443 const MachineBasicBlock *MBB = MI->getParent(); local 444 assert(MBB && "MI must be inserted inna basic block"); 445 MachineBasicBlock::const_iterator I = MI, B = MBB->begin(); 448 return getMBBStartIdx(MBB); 460 const MachineBasicBlock *MBB = MI->getParent(); local 461 assert(MBB && "MI must be inserted inna basic block"); 462 MachineBasicBlock::const_iterator I = MI, E = MBB [all...] |
H A D | LiveIntervalAnalysis.h | 135 /// adds a live range from that instruction to the end of its MBB. 217 void insertMBBInMaps(MachineBasicBlock *MBB) { argument 218 Indexes->insertMBBInMaps(MBB); 219 assert(unsigned(MBB->getNumber()) == RegMaskBlocks.size() && 294 void repairIntervalsInRange(MachineBasicBlock *MBB,
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H A D | MachineOperand.h | 152 MachineBasicBlock *MBB; // For MO_MachineBasicBlock. member in union:llvm::MachineOperand::__anon21843 419 return Contents.MBB; 506 void setMBB(MachineBasicBlock *MBB) { 508 Contents.MBB = MBB; 583 static MachineOperand CreateMBB(MachineBasicBlock *MBB, 586 Op.setMBB(MBB);
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H A D | MachineDominators.h | 27 inline void DominatorTreeBase<MachineBasicBlock>::addRoot(MachineBasicBlock* MBB) { argument 28 this->Roots.push_back(MBB);
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H A D | MachineInstrBundle.h | 28 void finalizeBundle(MachineBasicBlock &MBB, 35 /// with 'InsideBundle' marker. It returns the MBB instruction iterator that 37 MachineBasicBlock::instr_iterator finalizeBundle(MachineBasicBlock &MBB,
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/external/llvm/lib/ExecutionEngine/JIT/ |
H A D | JITEmitter.cpp | 299 /// MBBLocations - This vector is a mapping from MBB ID's to their address. 407 virtual void StartMachineBasicBlock(MachineBasicBlock *MBB) { argument 408 if (MBBLocations.size() <= (unsigned)MBB->getNumber()) 409 MBBLocations.resize((MBB->getNumber()+1)*2); 410 MBBLocations[MBB->getNumber()] = getCurrentPCValue(); 411 if (MBB->hasAddressTaken()) 412 TheJIT->addPointerToBasicBlock(MBB->getBasicBlock(), 414 DEBUG(dbgs() << "JIT: Emitting BB" << MBB->getNumber() << " at [" 421 virtual uintptr_t getMachineBasicBlockAddress(MachineBasicBlock *MBB) const{ 422 assert(MBBLocations.size() > (unsigned)MBB [all...] |
/external/llvm/lib/Target/MSP430/ |
H A D | MSP430RegisterInfo.cpp | 110 MachineBasicBlock &MBB = *MI.getParent(); local 111 MachineFunction &MF = *MBB.getParent(); 145 BuildMI(MBB, llvm::next(II), dl, TII.get(MSP430::SUB16ri), DstReg) 148 BuildMI(MBB, llvm::next(II), dl, TII.get(MSP430::ADD16ri), DstReg)
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/external/llvm/lib/Target/Mips/ |
H A D | Mips16ISelLowering.h | 27 EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *MBB) const;
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H A D | MipsSEISelLowering.h | 32 EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *MBB) const;
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H A D | MipsAsmPrinter.cpp | 293 MBB) const { 295 const MachineBasicBlock *Pred = *MBB->pred_begin(); 305 if (MBB->isLandingPad() || MBB->pred_empty()) 309 MachineBasicBlock::const_pred_iterator PI = MBB->pred_begin(), PI2 = PI; 312 if (PI2 != MBB->pred_end()) 316 if (!Pred->isLayoutSuccessor(MBB))
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCFrameLowering.h | 42 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; 54 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, 60 MachineBasicBlock &MBB, 63 bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
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H A D | PPCCodeEmitter.cpp | 84 void emitBasicBlock(MachineBasicBlock &MBB); 114 void PPCCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) { argument 115 MCE.StartMachineBasicBlock(&MBB); 117 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I){
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/external/llvm/lib/Target/R600/ |
H A D | R600OptimizeVectorRegisters.cpp | 178 MachineBasicBlock &MBB = *Pos->getParent(); local 191 MachineInstr *Tmp = BuildMI(MBB, Pos, DL, TII->get(AMDGPU::INSERT_SUBREG), 208 Pos = BuildMI(MBB, Pos, DL, TII->get(AMDGPU::COPY), Reg) 315 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end(); 316 MBB != MBBe; ++MBB) { 317 MachineBasicBlock *MB = MBB;
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 594 MachineBasicBlock *MBB) const { 619 MachineFunction *MF = MBB->getParent(); 620 const BasicBlock *LLVM_BB = MBB->getBasicBlock(); 622 MachineFunction::iterator It = MBB; 637 EndBB->splice(EndBB->begin(), MBB, 639 MBB->end()); 640 EndBB->transferSuccessorsAndUpdatePHIs(MBB); 645 // [... start of incoming MBB ...] 649 BuildMI(MBB, DL, TII->get(AArch64::LSFP128_STR)) 653 BuildMI(MBB, D [all...] |
/external/llvm/lib/CodeGen/AsmPrinter/ |
H A D | AsmPrinter.cpp | 1132 const MachineBasicBlock *MBB = JTBBs[ii]; local 1133 if (!EmittedSets.insert(MBB)) continue; 1137 MCSymbolRefExpr::Create(MBB->getSymbol(), OutContext); 1138 OutStreamer.EmitAssignment(GetJTSetSymbol(JTI, MBB->getNumber()), 1161 /// EmitJumpTableEntry - Emit a jump table entry for the specified MBB to the 1164 const MachineBasicBlock *MBB, 1166 assert(MBB && MBB->getNumber() >= 0 && "Invalid basic block"); 1172 Value = TM.getTargetLowering()->LowerCustomJumpTableEntry(MJTI, MBB, UID, 1178 Value = MCSymbolRefExpr::Create(MBB 1163 EmitJumpTableEntry(const MachineJumpTableInfo *MJTI, const MachineBasicBlock *MBB, unsigned UID) const argument 2050 emitBasicBlockLoopComments(const MachineBasicBlock &MBB, const MachineLoopInfo *LI, const AsmPrinter &AP) argument [all...] |