Searched refs:MFOCRF (Results 1 - 7 of 7) sorted by relevance

/external/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCMCCodeEmitter.cpp232 MI.getOpcode() == PPC::MFOCRF || MI.getOpcode() == PPC::MFOCRF8) &&
242 // MTOCRF/MFOCRF should go through get_crbitm_encoding for the CR operand.
245 MI.getOpcode() != PPC::MFOCRF && MI.getOpcode() != PPC::MFOCRF8) ||
/external/llvm/lib/Target/PowerPC/
H A DPPCCodeEmitter.cpp146 MI.getOpcode() == PPC::MFOCRF || MI.getOpcode() == PPC::MFOCRF8) &&
277 // MTOCRF/MFOCRF should go through get_crbitm_encoding for the CR operand.
280 MI.getOpcode() != PPC::MFOCRF && MI.getOpcode() != PPC::MFOCRF8) ||
H A DPPCISelDAGToDAG.cpp860 IntCR = SDValue(CurDAG->getMachineNode(PPC::MFOCRF, dl, MVT::i32, CR7Reg,
976 case PPCISD::MFOCRF: {
978 return CurDAG->getMachineNode(PPC::MFOCRF, dl, MVT::i32,
H A DPPCISelLowering.h119 /// R32 = MFOCRF(CRREG, INFLAG) - Represents the MFOCRF instruction.
122 MFOCRF, enumerator in enum:llvm::PPCISD::NodeType
H A DPPCAsmPrinter.cpp667 case PPC::MFOCRF:
670 // Transform: %R3 = MFOCRF %CR7
673 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8;
H A DPPCRegisterInfo.cpp386 // an MFOCRF to save all of the CRBits and, if needed, kill the SrcReg.
387 BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MFOCRF8 : PPC::MFOCRF), Reg)
H A DPPCISelLowering.cpp633 case PPCISD::MFOCRF: return "PPCISD::MFOCRF";
5602 SDValue Flags = DAG.getNode(PPCISD::MFOCRF, dl, MVT::i32,
7389 // If the user is a MFOCRF instruction, we know this is safe.
7391 if (FlagUser->getOpcode() == PPCISD::MFOCRF)
7398 // that we don't have to do a MFOCRF: instead, branch directly on CR6. This

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