Searched refs:NumRegs (Results 1 - 25 of 33) sorted by relevance

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/external/llvm/include/llvm/CodeGen/
H A DRegisterClassInfo.h30 unsigned NumRegs; member in struct:llvm::RegisterClassInfo::RCInfo
37 : Tag(0), NumRegs(0), ProperSubClass(false), MinCost(0),
41 return makeArrayRef(Order.get(), NumRegs);
88 return get(RC).NumRegs;
H A DCallingConvLower.h280 /// NumRegs if they are all allocated.
281 unsigned getFirstUnallocated(const uint16_t *Regs, unsigned NumRegs) const {
282 for (unsigned i = 0; i != NumRegs; ++i)
285 return NumRegs;
308 unsigned AllocateReg(const uint16_t *Regs, unsigned NumRegs) { argument
309 unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
310 if (FirstUnalloc == NumRegs)
321 unsigned NumRegs) {
322 unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
323 if (FirstUnalloc == NumRegs)
320 AllocateReg(const uint16_t *Regs, const uint16_t *ShadowRegs, unsigned NumRegs) argument
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H A DFastISel.h342 void UpdateValueMap(const Value* I, unsigned Reg, unsigned NumRegs = 1);
/external/llvm/lib/CodeGen/
H A DRegisterClassInfo.cpp82 unsigned NumRegs = RC->getNumRegs(); local
85 RCI.Order.reset(new MCPhysReg[NumRegs]);
114 RCI.NumRegs = N + CSRAlias.size();
115 assert (RCI.NumRegs <= NumRegs && "Allocation order larger than regclass");
128 if (StressRA && RCI.NumRegs > StressRA)
129 RCI.NumRegs = StressRA;
133 if (Super != RC && getNumAllocatableRegs(Super) > RCI.NumRegs)
141 for (unsigned I = 0; I != RCI.NumRegs; ++I)
H A DExecutionDepsFix.cpp134 const unsigned NumRegs; member in class:__anon22074::ExeDepsFix
149 : MachineFunctionPass(ID), RC(rc), NumRegs(RC->getNumRegs()) {}
251 assert(unsigned(rx) < NumRegs && "Invalid index");
263 assert(unsigned(rx) < NumRegs && "Invalid index");
274 assert(unsigned(rx) < NumRegs && "Invalid index");
306 for (unsigned rx = 0; rx != NumRegs; ++rx)
330 for (unsigned rx = 0; rx != NumRegs; ++rx)
346 LiveRegs = new LiveReg[NumRegs];
349 for (unsigned rx = 0; rx != NumRegs; ++rx) {
380 for (unsigned rx = 0; rx != NumRegs;
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H A DVirtRegMap.cpp67 unsigned NumRegs = MF->getRegInfo().getNumVirtRegs(); local
68 Virt2PhysMap.resize(NumRegs);
69 Virt2StackSlotMap.resize(NumRegs);
70 Virt2SplitMap.resize(NumRegs);
H A DLiveVariables.cpp426 for (unsigned Reg = 1, NumRegs = TRI->getNumRegs(); Reg != NumRegs; ++Reg) {
505 unsigned NumRegs = TRI->getNumRegs(); local
506 PhysRegDef = new MachineInstr*[NumRegs];
507 PhysRegUse = new MachineInstr*[NumRegs];
509 std::fill(PhysRegDef, PhysRegDef + NumRegs, (MachineInstr*)0);
510 std::fill(PhysRegUse, PhysRegUse + NumRegs, (MachineInstr*)0);
640 for (unsigned i = 0; i != NumRegs; ++i)
644 std::fill(PhysRegDef, PhysRegDef + NumRegs, (MachineInstr*)0);
645 std::fill(PhysRegUse, PhysRegUse + NumRegs, (MachineInst
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H A DMachineLICM.cpp496 unsigned NumRegs = TRI->getNumRegs(); local
497 BitVector PhysRegDefs(NumRegs); // Regs defined once in the loop.
498 BitVector PhysRegClobbers(NumRegs); // Regs defined more than once.
533 BitVector TermRegs(NumRegs);
/external/llvm/lib/Target/Hexagon/
H A DHexagonCallingConvLower.h109 /// NumRegs if they are all allocated.
110 unsigned getFirstUnallocated(const unsigned *Regs, unsigned NumRegs) const {
111 for (unsigned i = 0; i != NumRegs; ++i)
114 return NumRegs;
137 unsigned AllocateReg(const unsigned *Regs, unsigned NumRegs) { argument
138 unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
139 if (FirstUnalloc == NumRegs)
150 unsigned NumRegs) {
151 unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
152 if (FirstUnalloc == NumRegs)
149 AllocateReg(const unsigned *Regs, const unsigned *ShadowRegs, unsigned NumRegs) argument
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/external/llvm/include/llvm/MC/
H A DMCRegisterInfo.h156 unsigned NumRegs; // Number of entries in the array member in class:llvm::MCRegisterInfo
251 NumRegs = NR;
315 assert(RegNo < NumRegs &&
360 return NumRegs;
406 assert(RegNo < NumRegs &&
/external/llvm/lib/Target/ARM/
H A DARMExpandPseudoInsts.cpp107 uint8_t NumRegs; // D registers loaded or stored member in struct:__anon22282::NEONLdStTableEntry
381 unsigned NumRegs = TableEntry->NumRegs; local
392 if (NumRegs > 1 && TableEntry->copyAllListRegs)
394 if (NumRegs > 2 && TableEntry->copyAllListRegs)
396 if (NumRegs > 3 && TableEntry->copyAllListRegs)
446 unsigned NumRegs = TableEntry->NumRegs; local
467 if (NumRegs > 1 && TableEntry->copyAllListRegs)
469 if (NumRegs >
497 unsigned NumRegs = TableEntry->NumRegs; local
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H A DThumb1FrameLowering.cpp386 bool NumRegs = false; local
399 NumRegs = true;
403 if (NumRegs)
H A DARMBaseInstrInfo.cpp2689 unsigned NumRegs = MI->getNumOperands() - Desc.getNumOperands(); local
2690 return (NumRegs / 2) + (NumRegs % 2) + 1;
2725 unsigned NumRegs = MI->getNumOperands() - Desc.getNumOperands() + 1; local
2727 int UOps = 1 + NumRegs; // One for address computation, one for each ld / st.
2762 if (NumRegs < 4)
2766 int A8UOps = (NumRegs / 2);
2767 if (NumRegs % 2)
2771 int A9UOps = (NumRegs / 2);
2774 if ((NumRegs
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H A DARMLoadStoreOptimizer.cpp290 unsigned NumRegs = Regs.size(); local
291 if (NumRegs <= 1)
300 else if (Offset == -4 * (int)NumRegs + 4 && haveIBAndDA)
302 else if (Offset == -4 * (int)NumRegs && isNotVFP)
313 if (NumRegs <= 2)
320 NewBase = Regs[NumRegs-1].first;
352 for (unsigned i = 0; i != NumRegs; ++i)
H A DARMCodeEmitter.cpp1872 unsigned NumRegs = 1;
1877 ++NumRegs;
1882 Binary |= NumRegs * 2;
1884 Binary |= NumRegs;
H A DARMISelDAGToDAG.cpp1667 unsigned NumRegs = NumVecs; local
1669 NumRegs *= 2;
1672 if (Alignment >= 32 && NumRegs == 4)
1674 else if (Alignment >= 16 && (NumRegs == 2 || NumRegs == 4))
3533 unsigned NumRegs = InlineAsm::getNumOperandRegisters(Flag); local
3534 if (NumRegs)
3551 || NumRegs != 2)
/external/llvm/lib/Target/Mips/
H A DMipsISelLowering.h233 unsigned NumRegs; // Number of registers used for this argument. member in struct:llvm::MipsTargetLowering::ByValArgInfo
236 ByValArgInfo() : FirstIdx(0), NumRegs(0), Address(0) {}
H A DMipsISelLowering.cpp3269 ByVal.Address = CCInfo.AllocateStack(ByValSize - RegSize * ByVal.NumRegs,
3324 ByValSize -= RegSize, ++I, ++ByVal.NumRegs)
3350 unsigned RegAreaSize = ByVal.NumRegs * CC.regSize();
3366 if (!ByVal.NumRegs)
3373 for (unsigned I = 0; I < ByVal.NumRegs; ++I) {
3400 if (ByVal.NumRegs) {
3402 bool LeftoverBytes = (ByVal.NumRegs * RegSize > ByValSize);
3406 for (; I < ByVal.NumRegs - LeftoverBytes; ++I, Offset += RegSize) {
3487 unsigned NumRegs = CC.numIntArgRegs(); local
3490 unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs, NumRegs);
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/external/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGBuilder.cpp234 unsigned NumRegs = local
237 assert(NumRegs == NumParts && "Part count doesn't match vector breakdown!");
238 NumParts = NumRegs; // Silence a compiler warning.
535 unsigned NumRegs = TLI.getVectorTypeBreakdown(*DAG.getContext(), ValueVT, local
540 assert(NumRegs == NumParts && "Part count doesn't match vector breakdown!");
541 NumParts = NumRegs; // Silence a compiler warning.
620 unsigned NumRegs = tli.getNumRegisters(Context, ValueVT); local
622 for (unsigned i = 0; i != NumRegs; ++i)
625 Reg += NumRegs;
693 unsigned NumRegs local
782 unsigned NumRegs = Regs.size(); local
854 unsigned NumRegs = TLI.getNumRegisters(*DAG.getContext(), ValueVTs[Value]); local
5780 unsigned NumRegs = 1; local
6437 unsigned NumRegs = getNumRegisters(CLI.RetTy->getContext(), VT); local
6583 unsigned NumRegs = getNumRegisters(CLI.RetTy->getContext(), VT); local
6715 unsigned NumRegs = TLI->getNumRegisters(*CurDAG->getContext(), VT); local
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H A DFunctionLoweringInfo.cpp234 unsigned NumRegs = TLI->getNumRegisters(Ty->getContext(), ValueVT); local
235 for (unsigned i = 0; i != NumRegs; ++i) {
/external/llvm/lib/Transforms/Scalar/
H A DLoopStrengthReduce.cpp792 unsigned NumRegs; member in class:__anon22594::Cost
802 : NumRegs(0), AddRecCost(0), NumIVMuls(0), NumBaseAdds(0), ImmCost(0),
812 return ((NumRegs | AddRecCost | NumIVMuls | NumBaseAdds
814 || ((NumRegs & AddRecCost & NumIVMuls & NumBaseAdds
821 return NumRegs == ~0u;
882 ++NumRegs;
972 NumRegs = ~0u;
983 if (NumRegs != Other.NumRegs)
984 return NumRegs < Othe
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/external/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCCodeEmitter.cpp1399 unsigned NumRegs = (MI.getNumOperands() - Op) & 0xff;
1402 Binary |= NumRegs;
1404 Binary |= NumRegs * 2;
/external/chromium_org/v8/src/
H A Dframes.h41 int NumRegs(RegList list);
/external/v8/src/
H A Dframes.h41 int NumRegs(RegList list);
/external/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp1433 unsigned NumRegs = TLI->getNumRegisters(F->getContext(), ObjectVT); local
1434 for (unsigned parti = 0; parti < NumRegs; ++parti) {
1438 if (NumRegs > 0)

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