1;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
2;RUN: llc < %s -march=r600 -mcpu=verde | FileCheck --check-prefix=SI-CHECK %s
3
4;EG-CHECK: @ashr_v2i32
5;EG-CHECK: ASHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
6;EG-CHECK: ASHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
7
8;SI-CHECK: @ashr_v2i32
9;SI-CHECK: V_ASHR_I32_e32 VGPR{{[0-9]+, VGPR[0-9]+, VGPR[0-9]+}}
10;SI-CHECK: V_ASHR_I32_e32 VGPR{{[0-9]+, VGPR[0-9]+, VGPR[0-9]+}}
11
12define void @ashr_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
13  %b_ptr = getelementptr <2 x i32> addrspace(1)* %in, i32 1
14  %a = load <2 x i32> addrspace(1) * %in
15  %b = load <2 x i32> addrspace(1) * %b_ptr
16  %result = ashr <2 x i32> %a, %b
17  store <2 x i32> %result, <2 x i32> addrspace(1)* %out
18  ret void
19}
20
21;EG-CHECK: @ashr_v4i32
22;EG-CHECK: ASHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
23;EG-CHECK: ASHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
24;EG-CHECK: ASHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
25;EG-CHECK: ASHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
26
27;SI-CHECK: @ashr_v4i32
28;SI-CHECK: V_ASHR_I32_e32 VGPR{{[0-9]+, VGPR[0-9]+, VGPR[0-9]+}}
29;SI-CHECK: V_ASHR_I32_e32 VGPR{{[0-9]+, VGPR[0-9]+, VGPR[0-9]+}}
30;SI-CHECK: V_ASHR_I32_e32 VGPR{{[0-9]+, VGPR[0-9]+, VGPR[0-9]+}}
31;SI-CHECK: V_ASHR_I32_e32 VGPR{{[0-9]+, VGPR[0-9]+, VGPR[0-9]+}}
32
33define void @ashr_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
34  %b_ptr = getelementptr <4 x i32> addrspace(1)* %in, i32 1
35  %a = load <4 x i32> addrspace(1) * %in
36  %b = load <4 x i32> addrspace(1) * %b_ptr
37  %result = ashr <4 x i32> %a, %b
38  store <4 x i32> %result, <4 x i32> addrspace(1)* %out
39  ret void
40}
41
42;EG-CHECK: @ashr_i64
43;EG-CHECK: ASHR
44
45;SI-CHECK: @ashr_i64
46;SI-CHECK: V_ASHR_I64
47define void @ashr_i64(i64 addrspace(1)* %out, i32 %in) {
48entry:
49  %0 = sext i32 %in to i64
50  %1 = ashr i64 %0, 8
51  store i64 %1, i64 addrspace(1)* %out
52  ret void
53}
54
55