| d862faa2ceae186da5518607505eb942d634ced9 |
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28-Apr-2011 |
Carl Shapiro <cshapiro@google.com> |
Get rid of uneeded extern, enum, typedef and struct qualifiers.
Change-Id: I236c5a1553a51f82c9bc3eaaab042046c854d3b4
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| 5d5b94c8d14b166af580d5dd5906db4f9527d6ca |
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20-Apr-2011 |
Carl Shapiro <cshapiro@google.com> |
Move the compiler into C++.
Change-Id: Idffbdb02c29e2be03a75f5a0a664603f2299504a
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| 01605d2b668e8e1701cfdfa302dde847b9171fc9 |
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01-Feb-2011 |
Carl Shapiro <cshapiro@google.com> |
Remove the unused monitor tracking and deadlock prediction code.
This feature has been in the code base for several releases but has never
been enabled.
Change-Id: Ia770b03ebc90a3dc7851c0cd8ef301f9762f50db
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| f6789277a9d25379bf43ffc39ef091db722dd5af |
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25-Sep-2010 |
buzbee <buzbee@google.com> |
JIT: Source code reorganization to isolate target independent code
Much of the register utility code is target independent. Move it up
a level so the x86 JIT can use it.
Change-Id: Id9895a42281fd836cb1a2c942e106de94df62a9a
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| bff121aa3e5d3c34caf837227cb00a46bf3f1966 |
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05-Aug-2010 |
buzbee <buzbee@google.com> |
JIT: Reworked the assembler to be smarter about short instruction forms
Previously, the JIT wasn't generating short-form compare and branch on
zero/not zero instructions for Thumb2. The reason was that these only
allow a 1-byte displacement, and when they didn't reach the assembler would
abort the trace, split it in half and try again. This change re-enables
cbz, cbnz generation and introduces a relatively lightweight retry
mechanism.
Also includes changes for Thumb2 to always generate large displacement
literal loads and conditional branches to minimize the number of retry
attempts.
Change-Id: Icf066836fad203f5c0fcbbb2ae8e1aa73d1cf816
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| fc075c2d1ae63c26f96e0c6eeb72efc898dbebbf |
|
29-May-2010 |
Ben Cheng <bccheng@android.com> |
Clean up warnings detected by gcc.
Also re-enabled the JIT for the ARMv5te target.
Change-Id: I89fd229205e30e6ee92a4933290a7d8dca001232
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| bd1326d0e6b82a24ee80d50921e62152ea919151 |
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03-Apr-2010 |
Ben Cheng <bccheng@android.com> |
Clean up the codegen for invoking helper callout functions.
All invoked functions are documented in compiler/codegen/arm/CalloutHelper.h
Bug: 2567981
Change-Id: Ia7cd4107272df1b0b5588fbcc0aafcc6d0723d60
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| 434bae646046871c334b95bd9123a78da66c27c3 |
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27-Mar-2010 |
Bill Buzbee <buzbee@google.com> |
Fix for 2542488 JIT codegen bug with overlapping wide operands
Change-Id: I2f31492f68cb753f76dd664cd6b0a52d7d32de4c
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| 88dc28740f628a8d0d8fe05af0e11443f8793aa1 |
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03-Feb-2010 |
jeffhao <jeffhao@google.com> |
Made Self Verification mode's memory interface less intrusive.
|
| 9e45c0b968d63ea38353c99252d233879c2efdaf |
|
03-Feb-2010 |
jeffhao <jeffhao@google.com> |
Made Self Verification mode's memory interface less intrusive.
|
| 5d90c20bd7903d7bba966b224e576bf137bf8b4b |
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23-Nov-2009 |
Ben Cheng <bccheng@google.com> |
Restructure the codegen to make architectural depedency explicit.
The original Codegen.c is broken into three components:
- CodegenCommon.c (arch-independend)
- CodegenFactory.c (Thumb1/2 dependent)
- CodegenDriver.c (Dalvik dependent)
For the Thumb/Thumb2 directories, each contain the followin three files:
- Factory.c (low-level routines for instruction selections)
- Gen.c (invoke the ISA-specific instruction selection routines)
- Ralloc.c (arch-dependent register pools)
The FP directory contains FP-specific codegen routines depending on
Thumb/Thumb2/VFP/PortableFP:
- Thumb2VFP.c
- ThumbVFP.c
- ThumbPortableFP.c
Then the hierarchy is formed by stacking these files in the following top-down
order:
1 CodegenCommon.c
2 Thumb[2]/Factory.c
3 CodegenFactory.c
4 Thumb[2]/Gen.c
5 FP stuff
6 Thumb[2]/Ralloc.c
7 CodegenDriver.c
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| 72e93344b4d1ffc71e9c832ec23de0657e5b04a5 |
|
13-Nov-2009 |
Jean-Baptiste Queru <jbq@google.com> |
eclair snapshot
|
| 1465db5ee2d3c4c4dcc8e017a294172e858765cb |
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24-Sep-2009 |
Bill Buzbee <buzbee@google.com> |
Major registor allocation rework - stage 1.
Direct usage of registers abstracted out.
Live values tracked locally. Redundant loads and stores suppressed.
Address of registers and register pairs unified w/ single "location" mechanism
Register types inferred using existing dataflow analysis pass.
Interim (i.e. Hack) mechanism for storing register liveness info. Rewrite TBD.
Stubbed-out code for linear scan allocation (for loop and long traces)
Moved optimistic lock check for monitor-enter/exit inline for Thumb2
Minor restructuring, renaming and general cleanup of codegen
Renaming of enums to follow coding convention
Formatting fixes introduced by the enum renaming
Rewrite of RallocUtil.c and addition of linear scan to come in stage 2.
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| d7d426a1d746f70edeaeccf77886f3ad8298e28c |
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22-Sep-2009 |
Ben Cheng <bccheng@google.com> |
Implemented a new scheduler and FP register allocator.
Improved performance by 50% over existing JIT for some FP benchmarks.
|
| dcf3e5d43a1831a166f70cb9e0694cd4b0b356b0 |
|
11-Sep-2009 |
Ben Cheng <bccheng@google.com> |
Model resource usage for each Thumb/Thumb2 instrution.
This is an mid-point checkin to avoid future merge nightmare for the register
allocator work.
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| 270c1d64a192341be842f46734054c692bac061e |
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14-Aug-2009 |
Bill Buzbee <buzbee@google.com> |
Thumb/Thumb2 instruction selection rework.
Change-id: I7428278f07f49e675d0271c58b3cbf1f6a4e9da1
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| 9bc3df373ae6f4f7e6e97d554884d4e0dbad5494 |
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30-Jul-2009 |
Bill Buzbee <buzbee@google.com> |
Stage 3 of Thumb2 support. armv7-a now generates vfp code inline.
|