0c2dc522d0e120f346cf0a40c8cf0c93346131c2 |
|
03-Jul-2012 |
Dong-Yuan Chen <dong-yuan.chen@intel.com> |
[X86] X86 trace JIT compiler support This patch provides a fully functional x86 trace JIT compiler for Dalvik VM. It is built on top of the existing x86 fast interpreter with bug fixes and needed extension to support trace JIT interface. The x86 trace JIT code generator was developed independent of the existing template-based code generator and thus does not share exactly the same infrastructure. Included in this patch are: * Deprecated and removed the x86-atom fast interpreter that is no longer functional since ICS. * Augmented x86 fast interpreter to provide interfaces for x86 trace JIT compiler. * Added x86 trace JIT code generator with full JDWP debugging support. * Method JIT and self-verification mode are not supported. The x86 code generator uses the x86 instruction encoder/decoder library from the Apache Harmony project. Additional wrapper extension and bug fixes were added to support the x86 trace JIT code generator. The x86 instruction encoder/decoder is embedded inside the x86 code generator under the libenc subdirectory. Change-Id: I241113681963a16c13a3562390813cbaaa6eedf0 Signed-off-by: Dong-Yuan Chen <dong-yuan.chen@intel.com> Signed-off-by: Yixin Shou <yixin.shou@intel.com> Signed-off-by: Johnnie Birch <johnnie.l.birch.jr@intel.com> Signed-off-by: Udayan <udayan.banerji@intel.com> Signed-off-by: Sushma Kyasaralli Thimmappa <sushma.kyasaralli.thimmappa@intel.com> Signed-off-by: Bijoy Jose <bijoy.a.jose@intel.com> Signed-off-by: Razvan A Lupusoru <razvan.a.lupusoru@intel.com> Signed-off-by: Tim Hartley <timothy.d.hartley@intel.com>
|
9f601a917c8878204482c37aec7005054b6776fa |
|
12-Feb-2011 |
buzbee <buzbee@google.com> |
Interpreter restructuring: eliminate InterpState The key datastructure for the interpreter is InterpState. This change eliminates it, merging its data with the Thread structure. Here's why: In principio creavit Fadden Thread et InterpState. And it was good. Thread holds thread-private state, while InterpState captures data associated with a Dalvik interpreter activation. Because JNI calls can result in nested interpreter invocations, we can have more than one InterpState for each actual thread. InterpState was relatively small, and it all worked well. It was used enough that in the Arm version a register (rGLUE) was dedicated to it. Then, along came the JIT guys, who saw InterpState as a convenient place to dump all sorts of useful data that they wanted quick access to through that dedicated register. InterpState grew and grew. In terms of space, this wasn't a big problem - but it did mean that the initialization cost of each interpreter activation grew as well. For applications that do a lot of callbacks from native code into Dalvik, this is measurable. It's also mostly useless cost because much of the JIT-related InterpState initialization was setting up useful constants - things that don't need to be saved and restored all the time. The biggest problem, though, deals with thread control. When something interesting is happening that needs all threads to be stopped (such as GC and debugger attach), we have access to all of the Thread structures, but we don't have access to all of the InterpState structures (which may be buried/nested on the native stack). As a result, polling for thread suspension is done via a one-indirection pointer chase. InterpState itself can't hold the stop bits because we can't always find it, so instead it holds a pointer to the global or thread-specific stop control. Yuck. With this change, we eliminate InterpState and merge all needed data into Thread. Further, we replace the decidated rGLUE register with a pointer to the Thread structure (rSELF). The small subset of state data that needs to be saved and restored across nested interpreter activations is collected into a record that is saved to the interpreter frame, and restored on exit. Further, these small records are linked together to allow tracebacks to show nested activations. Old InterpState variables that simply contain useful constants are initialized once at thread creation time. This CL is large enough by itself that the new ability to streamline suspend checks is not done here - that will happen in a future CL. Here we just focus on consolidation. Change-Id: Ide6b2fb85716fea454ac113f5611263a96687356
|
f3e177289ac078f18401cfd8eebafe584dd0d01f |
|
12-Sep-2010 |
buzbee <buzbee@google.com> |
x86 mterp: reduce x86/x86-atom differences To ease future x86 development, elminate unnecessary differences between x86 and x86-atom targets. 1. Macros instead of defines (cosmetic change) 2. Register naming convention (cosmetic change) 3. Register usage convention - Drop rIBASE, freeing %edx for general usage - use %edi for rPC (callee-save) & eliminate spills 4. Spill & temp frame layout 5. rGLUE usage 0(%ebp) instead of -24(%ebp) 6. Jump table transition between instruction interpretations instead of computed goto. 7. Change entry convention for instruction handlers: Previously: %bl contains 8-bit Dalvik opcode %bh contains 2nd half of 16-bit Dalvik insn (usually AA or BA) upper 16 bits of %ebx are zero Now: %bl contains 2nd half of 16-bit Dalvik insn (usually AA or BA) upper 24 bits of %ebx are zero 8. Include copies of x86-atom macros and defines into x86 build. This allows the x86 build to mix-and-match x86 and x86-atom handlers via the normal config mechanism. [Note - only for non-control-flow instructions. There are still some conflicts in the footer.S main loop re-entry points]. Change-Id: Ib9d549b56f7ffd7420f9dbf97b2169f65603ee83
|
7365493ad8d360c1dcf9cd8b6eee62747af01cae |
|
09-Jun-2010 |
Carl Shapiro <cshapiro@google.com> |
Remove repeated newlines at the end of files. Change-Id: I1e3d103a7b932ef21acedb6438c0f26b315df28f
|
72e93344b4d1ffc71e9c832ec23de0657e5b04a5 |
|
13-Nov-2009 |
Jean-Baptiste Queru <jbq@google.com> |
eclair snapshot
|
f6c387128427e121477c1b32ad35cdcaa5101ba3 |
|
04-Mar-2009 |
The Android Open Source Project <initial-contribution@android.com> |
auto import from //depot/cupcake/@135843
|
f72d5de56a522ac3be03873bdde26f23a5eeeb3c |
|
04-Mar-2009 |
The Android Open Source Project <initial-contribution@android.com> |
auto import from //depot/cupcake/@135843
|
c4080f6bdeda19901a508cc75f96ac7e07903918 |
|
11-Feb-2009 |
Johnnie Birch <johnnie.l.birch.jr@intel.com> |
This patch rewrites common_invokeOld for the x86 fast interpreter. The implementation is similar to what is done for the armv5 code. Testing shows the patch provides a performance boost to benchmarks such as Caffeine Mark. When testing the simulator build on an Intel(R) Core(TM)2 Quad CPU Q9550 @ 2.83GHz, the string score for Caffeine Mark improved by 6%, the Method score improved by 12% and the overall score improved by 3%. This patch is one of our incremental efforts to merge some Intel's x86 fast interpreter features in http://review.source.android.com/Gerrit#change,6041 to the mterp/x86 directory.
|
89c1feb0a69a7707b271086e749975b3f7acacf7 |
|
18-Dec-2008 |
The Android Open Source Project <initial-contribution@android.com> |
Code drop from //branches/cupcake/...@124589
|