| 87773c318fcee853fb34a80a10c4347d523bdafb |
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01-Aug-2013 |
Tim Northover <tnorthover@apple.com> |
AArch64: add initial NEON support
Patch by Ana Pazos.
- Completed implementation of instruction formats:
AdvSIMD three same
AdvSIMD modified immediate
AdvSIMD scalar pairwise
- Completed implementation of instruction classes
(some of the instructions in these classes
belong to yet unfinished instruction formats):
Vector Arithmetic
Vector Immediate
Vector Pairwise Arithmetic
- Initial implementation of instruction formats:
AdvSIMD scalar two-reg misc
AdvSIMD scalar three same
- Intial implementation of instruction class:
Scalar Arithmetic
- Initial clang changes to support arm v8 intrinsics.
Note: no clang changes for scalar intrinsics function name mangling yet.
- Comprehensive test cases for added instructions
To verify auto codegen, encoding, decoding, diagnosis, intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187567 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
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| 45db92038bf540fbbd8dfe5dff520aa8566d7cef |
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04-May-2013 |
Tim Northover <Tim.Northover@arm.com> |
AArch64: implement large code model access to global variables.
The MOVZ/MOVK instruction sequence may not be the most efficient (a
literal-pool load could be better) but adding that would require
reinstating the ConstantIslands pass.
For now the sequence is correct, and that's enough. Beware, as of
commit GNU ld does not appear to support the relocations needed for
this. Its primary purpose (for now) will be to support JITed code,
since in that case there is no guarantee of where your code will end
up in memory relative to external symbols it references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181117 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
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| 4385f5dfced4e14bc59dfedb1f75116c0aabbc36 |
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03-Apr-2013 |
Tim Northover <Tim.Northover@arm.com> |
AArch64: implement ETMv4 trace system registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178637 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
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| 42a1b2f0b196633c0327801e810fc98849a00c47 |
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28-Mar-2013 |
Tim Northover <Tim.Northover@arm.com> |
AArch64: implement GICv3 system registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178236 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
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| 9e3b31345f0d17b757e183a8384db92616256926 |
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06-Feb-2013 |
Tim Northover <Tim.Northover@arm.com> |
Add icache prefetch operations to AArch64
This adds hints to the various "prfm" instructions so that they can
affect the instruction cache as well as the data cache.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174495 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
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| 19254c49a8752fe8c6fa648a6eb29f20a1f62c8b |
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05-Feb-2013 |
Tim Northover <Tim.Northover@arm.com> |
Remove cyclic dependency in AArch64 libraries
This moves the bit twiddling and string fiddling functions required by other
parts of the backend into a separate library. Previously they resided in
AArch64Desc, which created a circular dependency between various components.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174369 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
|