7d1a0d4e3ebf058a8b1d0dea9b6119444ed041c8 |
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29-Jun-2013 |
Vincent Lejeune <vljn@ovi.com> |
R600: Bank Swizzle now display SCL equivalent git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185267 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp
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5c35290fa35ae234fed02496404cb0fc37e1c8a5 |
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23-May-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
Move passes from namespace llvm into anonymous namespaces. Sort includes while there. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182594 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp
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d3293b49f9c7af741d2edd3062499fb50db0e89b |
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17-May-2013 |
Vincent Lejeune <vljn@ovi.com> |
R600: Improve texture handling git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182125 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp
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9a9e936650bb82244f38dbddf6c4e427c2ae49f9 |
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17-May-2013 |
Vincent Lejeune <vljn@ovi.com> |
R600: prettier dump of clamp git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182121 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp
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9e1808733eeea4f248eeef35ba06ee3f7aa5707d |
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02-May-2013 |
Vincent Lejeune <vljn@ovi.com> |
R600: Improve asmPrint of ALU clause git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180957 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp
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92f24d403f16ab2ee4598e32c926acc9c2344140 |
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02-May-2013 |
Vincent Lejeune <vljn@ovi.com> |
R600: Prettier asmPrint of Alu git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180956 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp
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53f22df199542f6fc4e0edc5b7cecbeacea11ada |
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21-Feb-2013 |
Christian Konig <christian.koenig@amd.com> |
R600/SI: add all the other missing asm operands v2 v2: put implicit parameters in [] Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175754 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp
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01115b1f5032b848659669b161af1bdd9e646208 |
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14-Feb-2013 |
Michel Danzer <michel.daenzer@amd.com> |
R600/SI: Fix int_SI_fs_interp_constant The important fix is that the constant interpolation value is stored in the parameter slot P0, which is encoded as 2. In addition, drop the SI_INTERP_CONST pseudo instruction, pass the parameter slot as an operand to V_INTERP_MOV_F32 instead of hardcoding it there, and add a special operand class for the parameter slots for type checking and pretty printing. NOTE: This is a candidate for the Mesa stable branch. Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175193 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp
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c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8 |
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06-Feb-2013 |
Tom Stellard <thomas.stellard@amd.com> |
R600: Support for indirect addressing v4 Only implemented for R600 so far. SI is missing implementations of a few callbacks used by the Indirect Addressing pass and needs code to handle frame indices. At the moment R600 only supports array sizes of 16 dwords or less. Register packing of vector types is currently disabled, which means that a vec4 is stored in T0_X, T1_X, T2_X, T3_X, rather than T0_XYZW. In order to correctly pack registers in all cases, we will need to implement an analysis pass for R600 that determines the correct vector width for each array. v2: - Add support for i8 zext load from stack. - Coding style fixes v3: - Don't reserve registers for indirect addressing when it isn't being used. - Fix bug caused by LLVM limiting the number of SubRegIndex declarations. v4: - Fix 64-bit defines git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174525 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp
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9f7818d9bdfce2e9c7a2cbe31490a135aa6d1211 |
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23-Jan-2013 |
Tom Stellard <thomas.stellard@amd.com> |
R600: rework handling of the constants Remove Cxxx registers, add new special register - "ALU_CONST" and new operand for each alu src - "sel". ALU_CONST is used to designate that the new operand contains the value to override src.sel, src.kc_bank, src.chan for constants in the driver. Patch by: Vadim Girlin Vincent Lejeune: - Use pointers for constants - Fold CONST_ADDRESS when possible Tom Stellard: - Give CONSTANT_BUFFER_0 its own address space - Use integer types for constant loads Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173222 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp
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f98f2ce29e6e2996fa58f38979143eceaa818335 |
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11-Dec-2012 |
Tom Stellard <thomas.stellard@amd.com> |
Add R600 backend A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169915 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp
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