/external/llvm/utils/TableGen/ |
H A D | AsmWriterInst.cpp | 203 CGIOperandList::OperandInfo OpInfo = CGI.Operands[OpNo]; local 205 unsigned MIOp = OpInfo.MIOperandNo; 206 Operands.push_back(AsmWriterOperand(OpInfo.PrinterMethodName,
|
H A D | InstrInfoEmitter.cpp | 58 const OperandInfoMapTy &OpInfo, 438 const OperandInfoMapTy &OpInfo, 515 OS << "OperandInfo" << OpInfo.find(OperandInfo)->second; 435 emitRecord(const CodeGenInstruction &Inst, unsigned Num, Record *InstrInfo, std::map<std::vector<Record*>, unsigned> &EmittedLists, const OperandInfoMapTy &OpInfo, raw_ostream &OS) argument
|
H A D | AsmMatcherEmitter.cpp | 1562 const CGIOperandList::OperandInfo &OpInfo = ResultInst->Operands[i]; local 1566 if (OpInfo.MINumOperands == 1) 1567 TiedOp = OpInfo.getTiedRegister(); 1574 int SrcOperand = findAsmOperandNamed(OpInfo.Name); 1575 if (OpInfo.Name.empty() || SrcOperand == -1) { 1586 unsigned NumOperands = OpInfo.MINumOperands; 1595 AsmOperands[SrcOperand+AI].SrcOpName == OpInfo.Name && 1611 const CGIOperandList::OperandInfo *OpInfo = &ResultInst->Operands[i]; local 1615 if (OpInfo->MINumOperands == 1) 1616 TiedOp = OpInfo [all...] |
H A D | CodeGenDAGPatterns.cpp | 2509 const SDNodeInfo &OpInfo = CDP.getSDNodeInfo(N1->getOperator()); local 2510 if (OpInfo.getNumResults() != 1 || OpInfo.getNumOperands() != 1) 2512 return OpInfo.getEnumName() == "ISD::BITCAST"; 2542 const SDNodeInfo &OpInfo = CDP.getSDNodeInfo(N->getOperator()); local 2545 if (OpInfo.hasProperty(SDNPMayStore)) mayStore = true; 2546 if (OpInfo.hasProperty(SDNPMayLoad)) mayLoad = true; 2547 if (OpInfo.hasProperty(SDNPSideEffect)) hasSideEffects = true; 2548 if (OpInfo.hasProperty(SDNPVariadic)) isVariadic = true;
|
/external/llvm/lib/Analysis/ |
H A D | CostModel.cpp | 92 TargetTransformInfo::OperandValueKind OpInfo = local 99 OpInfo = TargetTransformInfo::OK_UniformConstantValue; 103 OpInfo = TargetTransformInfo::OK_UniformConstantValue; 105 return OpInfo;
|
/external/llvm/include/llvm/Bitcode/ |
H A D | BitCodes.h | 181 void Add(const BitCodeAbbrevOp &OpInfo) { argument 182 OperandList.push_back(OpInfo);
|
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/ |
H A D | nv50_ir_target.h | 139 struct OpInfo struct in class:nv50_ir::Target 141 OpInfo *variants; 161 inline const OpInfo& getOpInfo(const Instruction *) const; 162 inline const OpInfo& getOpInfo(const operation) const; 210 OpInfo opInfo[OP_LAST + 1]; 213 const Target::OpInfo& Target::getOpInfo(const Instruction *insn) const 218 const Target::OpInfo& Target::getOpInfo(const operation op) const
|
/external/mesa3d/src/gallium/drivers/nv50/codegen/ |
H A D | nv50_ir_target.h | 139 struct OpInfo struct in class:nv50_ir::Target 141 OpInfo *variants; 161 inline const OpInfo& getOpInfo(const Instruction *) const; 162 inline const OpInfo& getOpInfo(const operation) const; 210 OpInfo opInfo[OP_LAST + 1]; 213 const Target::OpInfo& Target::getOpInfo(const Instruction *insn) const 218 const Target::OpInfo& Target::getOpInfo(const operation op) const
|
/external/llvm/include/llvm/MC/ |
H A D | MCInstrDesc.h | 147 const MCOperandInfo *OpInfo; // 'NumOperands' entries about operands member in class:llvm::MCInstrDesc 154 (OpInfo[OpNum].Constraints & (1 << Constraint))) { 156 return (int)(OpInfo[OpNum].Constraints >> Pos) & 0xf; 567 if (OpInfo[i].isPredicate())
|
/external/clang/lib/CodeGen/ |
H A D | CGExprComplex.cpp | 639 BinOpInfo OpInfo; local 644 OpInfo.Ty = E->getComputationResultType(); 647 assert(OpInfo.Ty->isAnyComplexType()); 648 assert(CGF.getContext().hasSameUnqualifiedType(OpInfo.Ty, 650 OpInfo.RHS = Visit(E->getRHS()); 657 OpInfo.LHS = EmitComplexToComplexCast(LHSVal, LHSTy, OpInfo.Ty); 660 OpInfo.LHS = EmitScalarToComplexCast(LHSVal, LHSTy, OpInfo.Ty); 664 ComplexPairTy Result = (this->*Func)(OpInfo); [all...] |
H A D | CGExprScalar.cpp | 1904 BinOpInfo OpInfo; local 1911 OpInfo.RHS = Visit(E->getRHS()); 1912 OpInfo.Ty = E->getComputationResultType(); 1913 OpInfo.Opcode = E->getOpcode(); 1914 OpInfo.FPContractable = false; 1915 OpInfo.E = E; 1928 switch (OpInfo.Opcode) { 1954 llvm::Value *amt = CGF.EmitToMemory(EmitScalarConversion(OpInfo.RHS, 1965 OpInfo.LHS = EmitLoadOfLValue(LHSLV); 1966 OpInfo [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 2077 AsmOperandInfo &OpInfo = ConstraintOperands.back(); local 2080 if (OpInfo.multipleAlternatives.size() > maCount) 2081 maCount = OpInfo.multipleAlternatives.size(); 2083 OpInfo.ConstraintVT = MVT::Other; 2086 switch (OpInfo.Type) { 2089 if (OpInfo.isIndirect) { 2090 OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++)); 2099 OpInfo.ConstraintVT = getSimpleValueType(STy->getElementType(ResNo)); 2102 OpInfo.ConstraintVT = getSimpleValueType(CS.getType()); 2107 OpInfo 2167 AsmOperandInfo& OpInfo = ConstraintOperands[cIndex]; local 2215 AsmOperandInfo& OpInfo = ConstraintOperands[cIndex]; local 2357 ChooseConstraint(TargetLowering::AsmOperandInfo &OpInfo, const TargetLowering &TLI, SDValue Op, SelectionDAG *DAG) argument 2408 ComputeConstraintToUse(AsmOperandInfo &OpInfo, SDValue Op, SelectionDAG *DAG) const argument [all...] |
H A D | SelectionDAGBuilder.cpp | 5763 /// OpInfo describes the operand. 5768 SDISelAsmOperandInfo &OpInfo) { 5777 TLI.getRegForInlineAsmConstraint(OpInfo.ConstraintCode, 5778 OpInfo.ConstraintVT); 5781 if (OpInfo.ConstraintVT != MVT::Other) { 5785 if (OpInfo.Type == InlineAsm::isInput && 5786 PhysReg.second && !PhysReg.second->hasType(OpInfo.ConstraintVT)) { 5791 if (RegVT.getSizeInBits() == OpInfo.ConstraintVT.getSizeInBits()) { 5792 OpInfo.CallOperand = DAG.getNode(ISD::BITCAST, DL, 5793 RegVT, OpInfo 5765 GetRegistersForValue(SelectionDAG &DAG, const TargetLowering &TLI, SDLoc DL, SDISelAsmOperandInfo &OpInfo) argument 5883 SDISelAsmOperandInfo &OpInfo = ConstraintOperands.back(); local 5957 SDISelAsmOperandInfo &OpInfo = ConstraintOperands[i]; local 6046 SDISelAsmOperandInfo &OpInfo = ConstraintOperands[i]; local 6079 TargetLowering::AsmOperandInfo &OpInfo = TargetConstraints[i]; local 6110 SDISelAsmOperandInfo &OpInfo = ConstraintOperands[i]; local [all...] |
/external/llvm/lib/Target/Mips/AsmParser/ |
H A D | MipsAsmParser.cpp | 464 const MCOperandInfo &OpInfo = MCID.OpInfo[i]; local 465 if ((OpInfo.OperandType == MCOI::OPERAND_MEMORY) 466 || (OpInfo.OperandType == MCOI::OPERAND_UNKNOWN)) {
|
/external/llvm/lib/Transforms/Scalar/ |
H A D | CodeGenPrepare.cpp | 1257 TargetLowering::AsmOperandInfo &OpInfo = TargetConstraints[i]; local 1260 TLI.ComputeConstraintToUse(OpInfo, SDValue()); 1264 if (OpInfo.CallOperandVal == OpVal && 1265 (OpInfo.ConstraintType != TargetLowering::C_Memory || 1266 !OpInfo.isIndirect)) 1674 TargetLowering::AsmOperandInfo &OpInfo = TargetConstraints[i]; local 1677 TLI->ComputeConstraintToUse(OpInfo, SDValue()); 1679 if (OpInfo.ConstraintType == TargetLowering::C_Memory && 1680 OpInfo.isIndirect) { 1683 } else if (OpInfo [all...] |
/external/llvm/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 559 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo; local 564 if (OpInfo[i].isOptionalDef() && OpInfo[i].RegClass == ARM::CCRRegClassID) { 565 if (i > 0 && OpInfo[i-1].isPredicate()) continue; 624 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo; local 629 if (OpInfo[i].isPredicate()) { 661 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo; local [all...] |