Searched refs:MemVT (Results 1 - 14 of 14) sorted by relevance

/external/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h646 SDValue getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, SDValue Chain,
651 SDValue getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, SDValue Chain,
659 SDValue getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, SDValue Chain,
663 SDValue getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, SDValue Chain,
670 SDValue getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, EVT VT,
675 SDValue getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, EVT VT,
687 EVT MemVT, MachinePointerInfo PtrInfo,
693 EVT MemVT, MachinePointerInfo PtrInfo,
699 EVT MemVT, MachineMemOperand *MMO);
713 EVT MemVT, boo
[all...]
H A DSelectionDAGNodes.h1093 AtomicSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTL, EVT MemVT, argument
1097 : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {
1101 AtomicSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTL, EVT MemVT, argument
1105 : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {
1109 AtomicSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTL, EVT MemVT, argument
1113 : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {
1654 EVT MemVT, MachineMemOperand *MMO)
1655 : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) {
1690 ISD::MemIndexedMode AM, ISD::LoadExtType ETy, EVT MemVT,
1692 : LSBaseSDNode(ISD::LOAD, Order, dl, ChainPtrOff, 3, VTs, AM, MemVT, MM
1652 LSBaseSDNode(ISD::NodeType NodeTy, unsigned Order, DebugLoc dl, SDValue *Operands, unsigned numOperands, SDVTList VTs, ISD::MemIndexedMode AM, EVT MemVT, MachineMemOperand *MMO) argument
1689 LoadSDNode(SDValue *ChainPtrOff, unsigned Order, DebugLoc dl, SDVTList VTs, ISD::MemIndexedMode AM, ISD::LoadExtType ETy, EVT MemVT, MachineMemOperand *MMO) argument
1718 StoreSDNode(SDValue *ChainValuePtrOff, unsigned Order, DebugLoc dl, SDVTList VTs, ISD::MemIndexedMode AM, bool isTrunc, EVT MemVT, MachineMemOperand *MMO) argument
[all...]
/external/llvm/include/llvm/Target/
H A DTargetLowering.h465 LegalizeAction getTruncStoreAction(MVT ValVT, MVT MemVT) const {
466 assert(ValVT < MVT::LAST_VALUETYPE && MemVT < MVT::LAST_VALUETYPE &&
469 [MemVT.SimpleTy];
474 bool isTruncStoreLegal(EVT ValVT, EVT MemVT) const {
475 return isTypeLegal(ValVT) && MemVT.isSimple() &&
476 getTruncStoreAction(ValVT.getSimpleVT(), MemVT.getSimpleVT()) == Legal;
975 void setTruncStoreAction(MVT ValVT, MVT MemVT,
977 assert(ValVT < MVT::LAST_VALUETYPE && MemVT < MVT::LAST_VALUETYPE &&
979 TruncStoreActions[ValVT.SimpleTy][MemVT.SimpleTy] = (uint8_t)Action;
/external/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp4080 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, argument
4087 Alignment = getEVTAlignment(MemVT);
4102 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
4104 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO,
4108 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, argument
4121 ID.AddInteger(MemVT.getRawBits());
4130 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl.getIROrder(), dl.getDebugLoc(), VTs, MemVT, Chain,
4138 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, argument
4146 Alignment = getEVTAlignment(MemVT);
4163 MemVT
4169 getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, SDValue Chain, SDValue Ptr, SDValue Val, MachineMemOperand *MMO, AtomicOrdering Ordering, SynchronizationScope SynchScope) argument
4211 getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, EVT VT, SDValue Chain, SDValue Ptr, const Value* PtrVal, unsigned Alignment, AtomicOrdering Ordering, SynchronizationScope SynchScope) argument
4242 getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, EVT VT, SDValue Chain, SDValue Ptr, MachineMemOperand *MMO, AtomicOrdering Ordering, SynchronizationScope SynchScope) argument
4283 getMemIntrinsicNode(unsigned Opcode, SDLoc dl, const EVT *VTs, unsigned NumVTs, const SDValue *Ops, unsigned NumOps, EVT MemVT, MachinePointerInfo PtrInfo, unsigned Align, bool Vol, bool ReadMem, bool WriteMem) argument
4295 getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList, const SDValue *Ops, unsigned NumOps, EVT MemVT, MachinePointerInfo PtrInfo, unsigned Align, bool Vol, bool ReadMem, bool WriteMem) argument
4318 getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList, const SDValue *Ops, unsigned NumOps, EVT MemVT, MachineMemOperand *MMO) argument
4388 getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, SDValue Offset, MachinePointerInfo PtrInfo, EVT MemVT, bool isVolatile, bool isNonTemporal, bool isInvariant, unsigned Alignment, const MDNode *TBAAInfo, const MDNode *Ranges) argument
4421 getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, SDValue Offset, EVT MemVT, MachineMemOperand *MMO) argument
4481 getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, EVT MemVT, bool isVolatile, bool isNonTemporal, unsigned Alignment, const MDNode *TBAAInfo) argument
[all...]
H A DLegalizeVectorTypes.cpp2450 EVT MemVT((MVT::SimpleValueType) VT);
2451 unsigned MemVTWidth = MemVT.getSizeInBits();
2452 if (MemVT.getSizeInBits() <= WidenEltWidth)
2454 if (TLI.isTypeLegal(MemVT) && (WidenWidth % MemVTWidth) == 0 &&
2458 RetVT = MemVT;
2467 EVT MemVT = (MVT::SimpleValueType) VT; local
2468 unsigned MemVTWidth = MemVT.getSizeInBits();
2469 if (TLI.isTypeLegal(MemVT) && WidenEltVT == MemVT.getVectorElementType() &&
2474 if (RetVT.getSizeInBits() < MemVTWidth || MemVT
[all...]
H A DDAGCombiner.cpp739 EVT MemVT = LD->getMemoryVT(); local
741 ? (TLI.isLoadExtLegal(ISD::ZEXTLOAD, MemVT) ? ISD::ZEXTLOAD
748 MemVT, LD->isVolatile(),
963 EVT MemVT = LD->getMemoryVT(); local
965 ? (TLI.isLoadExtLegal(ISD::ZEXTLOAD, MemVT) ? ISD::ZEXTLOAD
971 MemVT, LD->isVolatile(),
2711 EVT MemVT = LN0->getMemoryVT(); local
2716 BitWidth - MemVT.getScalarType().getSizeInBits())) &&
2718 TLI.isLoadExtLegal(ISD::ZEXTLOAD, MemVT))) {
2721 LN0->getPointerInfo(), MemVT,
2733 EVT MemVT = LN0->getMemoryVT(); local
4491 EVT MemVT = LN0->getMemoryVT(); local
4824 EVT MemVT = LN0->getMemoryVT(); local
5016 EVT MemVT = LN0->getMemoryVT(); local
7915 EVT MemVT = St->getMemoryVT(); local
[all...]
H A DLegalizeDAG.cpp371 EVT MemVT = EVT::getIntegerVT(*DAG.getContext(), local
377 MemVT, false, false, 0);
382 MemVT, ST->isVolatile(),
489 EVT MemVT = EVT::getIntegerVT(*DAG.getContext(), local
493 MemVT, LD->isVolatile(),
500 MachinePointerInfo(), MemVT,
3572 EVT MemVT = EVT::getIntegerVT(*DAG.getContext(), EntrySize * 8);
3574 MachinePointerInfo::getJumpTable(), MemVT,
H A DLegalizeIntegerTypes.cpp1811 EVT MemVT = N->getMemoryVT(); local
1814 MemVT, isVolatile, isNonTemporal, Alignment);
1858 EVT MemVT = N->getMemoryVT(); local
1859 unsigned EBytes = MemVT.getStoreSize();
1866 MemVT.getSizeInBits() - ExcessBits),
/external/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp1407 EVT MemVT = EVT::getIntegerVT(*DAG.getContext(), EntrySize * 8); local
1409 MachinePointerInfo::getJumpTable(), MemVT, false, false,
1958 EVT VT = LD->getValueType(0), MemVT = LD->getMemoryVT(); local
1968 return DAG.getMemIntrinsicNode(Opc, DL, VTList, Ops, 3, MemVT,
1975 EVT MemVT = LD->getMemoryVT(); local
1977 // Return if load is aligned or if MemVT is neither i32 nor i64.
1978 if ((LD->getAlignment() >= MemVT.getSizeInBits() / 8) ||
1979 ((MemVT != MVT::i32) && (MemVT != MVT::i64)))
2037 EVT MemVT local
2097 EVT MemVT = SD->getMemoryVT(); local
[all...]
/external/llvm/lib/Target/R600/
H A DR600ISelLowering.cpp1177 EVT MemVT = LoadNode->getMemoryVT(); local
1178 assert(!MemVT.isVector() && (MemVT == MVT::i16 || MemVT == MVT::i8));
1180 DAG.getConstant(VT.getSizeInBits() - MemVT.getSizeInBits(), MVT::i32);
1182 LoadNode->getPointerInfo(), MemVT,
/external/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp601 EVT MemVT = EltVT; local
621 MemVT, MachinePointerInfo());
638 MemVT, MachinePointerInfo());
658 unsigned PerStoreOffset = MemVT.getStoreSizeInBits() / 8 * VecSize;
712 Ops.size(), MemVT,
H A DNVPTXISelDAGToDAG.cpp1925 EVT MemVT = Mem->getMemoryVT(); local
1933 switch (MemVT.getSimpleVT().SimpleTy) {
1960 switch (MemVT.getSimpleVT().SimpleTy) {
1987 switch (MemVT.getSimpleVT().SimpleTy) {
/external/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp522 EVT MemVT; local
524 MemVT = DstVT; // FP_ROUND must use DstVT, we can't do a 'trunc load'.
526 MemVT = SrcIsSSE ? SrcVT : DstVT;
528 SDValue MemTmp = CurDAG->CreateStackTemporary(MemVT);
534 MemTmp, MachinePointerInfo(), MemVT,
538 MemVT, false, false, 0);
H A DX86ISelLowering.cpp17282 EVT MemVT = Ld->getMemoryVT(); local
17290 bool IsAligned = Alignment == 0 || Alignment >= MemVT.getSizeInBits()/8;
17300 EVT HalfVT = EVT::getVectorVT(*DAG.getContext(), MemVT.getScalarType(),
17330 assert(MemVT != RegVT && "Cannot extend to the same type");
17331 assert(MemVT.isVector() && "Must load a vector from memory");
17334 unsigned MemSz = MemVT.getSizeInBits();
17376 // memory. In practice, we ''widen'' MemVT.
17378 EVT::getVectorVT(*DAG.getContext(), MemVT.getScalarType(),
17379 loadRegZize/MemVT.getScalarType().getSizeInBits());
17446 MemVT
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