Searched refs:SSE (Results 1 - 25 of 42) sorted by relevance

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/external/clang/lib/StaticAnalyzer/Core/
H A DSimpleConstraintManager.cpp52 if (const SymSymExpr *SSE = dyn_cast<SymSymExpr>(SE)) {
53 if (BinaryOperator::isComparisonOp(SSE->getOpcode())) {
55 if (Loc::isLocType(SSE->getLHS()->getType())) {
56 assert(Loc::isLocType(SSE->getRHS()->getType()));
182 } else if (const SymSymExpr *SSE = dyn_cast<SymSymExpr>(sym)) {
190 BinaryOperator::Opcode Op = SSE->getOpcode();
194 assert(Loc::isLocType(SSE->getLHS()->getType()));
195 assert(Loc::isLocType(SSE->getRHS()->getType()));
197 SymbolRef Subtraction = SymMgr.getSymSymExpr(SSE->getRHS(), BO_Sub,
198 SSE
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/external/eigen/Eigen/src/Geometry/arch/
H A DGeometry_SSE.h19 struct quat_product<Architecture::SSE, Derived, OtherDerived, float, Aligned>
41 struct cross3_impl<Architecture::SSE,VectorLhs,VectorRhs,float,true>
60 struct quat_product<Architecture::SSE, Derived, OtherDerived, double, Aligned>
/external/libvpx/libvpx/vp8/encoder/ppc/
H A Dcsystemdependent.c58 extern unsigned int vp8_get8x8var_c(unsigned char *src_ptr, int source_stride, unsigned char *ref_ptr, int recon_stride, unsigned int *SSE, int *Sum);
118 extern unsigned int vp8_get8x8var_ppc(unsigned char *src_ptr, int source_stride, unsigned char *ref_ptr, int recon_stride, unsigned int *SSE, int *Sum);
119 extern unsigned int vp8_get16x16var_ppc(unsigned char *src_ptr, int source_stride, unsigned char *ref_ptr, int recon_stride, unsigned int *SSE, int *Sum);
/external/eigen/Eigen/src/Core/util/
H A DConstants.h400 SSE = 0x1, enumerator in enum:Eigen::Architecture::Type
403 Target = SSE
/external/chromium_org/base/
H A Dcpu.h22 SSE, enumerator in enum:base::CPU::IntelMicroArchitecture
H A Dcpu.cc158 if (has_sse()) return SSE;
/external/oprofile/events/i386/atom/
H A Dunit_masks10 0x01 prefetcht0 Streaming SIMD Extensions (SSE) PrefetchT0 instructions executed
11 0x06 sw_l2 Streaming SIMD Extensions (SSE) PrefetchT1 and PrefetchT2 instructions executed
12 0x08 prefetchnta Streaming SIMD Extensions (SSE) Prefetch NTA instructions executed
85 0x01 packed_single Retired Streaming SIMD Extensions (SSE) packed-single instructions
86 0x02 scalar_single Retired Streaming SIMD Extensions (SSE) scalar-single instructions
92 0x01 packed_single Retired computational Streaming SIMD Extensions (SSE) packed-single instructions
93 0x02 scalar_single Retired computational Streaming SIMD Extensions (SSE) scalar-single instructions
H A Devents15 event:0x07 counters:0,1 um:simd_prefetch minimum:6000 name:PREFETCH : Streaming SIMD Extensions (SSE) Prefetch instructions executed
71 event:0xC7 counters:0,1 um:simd_inst_retired minimum:6000 name:SIMD_INST_RETIRED : Retired Streaming SIMD Extensions (SSE) instructions
73 event:0xCA counters:0,1 um:simd_comp_inst_retired minimum:6000 name:SIMD_COMP_INST_RETIRED : Retired computational Streaming SIMD Extensions (SSE) instructions.
/external/libvpx/libvpx/vp9/encoder/x86/
H A Dvp9_variance_mmx.c23 unsigned int *SSE,
32 unsigned int *SSE,
H A Dvp9_variance_sse2.c23 unsigned int *SSE,
37 unsigned int *SSE,
46 unsigned int *SSE,
115 unsigned int *SSE,
H A Dvp9_subpel_variance_impl_sse2.asm114 mov rdi, arg(6) ;[SSE]
221 mov rdi, arg(6) ;[SSE]
325 mov rdi, arg(6) ;[SSE]
H A Dvp9_variance_impl_sse2.asm78 ; unsigned int * SSE,
198 mov rdi, arg(4) ;[SSE]
222 ; unsigned int * SSE,
383 mov rdi, arg(4) ;[SSE]
/external/libvpx/libvpx/vp8/common/x86/
H A Dvariance_ssse3.c22 unsigned int *SSE,
H A Dvariance_sse2.c40 unsigned int *SSE,
54 unsigned int *SSE,
63 unsigned int *SSE,
H A Dvariance_mmx.c45 unsigned int *SSE,
54 unsigned int *SSE,
/external/oprofile/events/x86-64/family10/
H A Dunit_masks50 0x01 Add pipe ops excluding load ops and SSE move ops
51 0x02 Multiply pipe ops excluding load ops and SSE move ops
52 0x04 Store pipe ops excluding load ops and SSE move ops
53 0x08 Add pipe load ops and SSE move ops
54 0x10 Multiply pipe load ops and SSE move ops
55 0x20 Store pipe load ops and SSE move ops
68 0x04 SSE instructions (SSE, SSE2, SSE3, and SSE4A)
75 0x02 SSE retype microfaults
76 0x04 SSE reclas
[all...]
/external/chromium_org/third_party/yasm/source/patched-yasm/modules/objfmts/xdf/tests/
H A Dxdflong.asm85 or edx, 0x00000620 ; Enable PAE, SSE OSFXSR, SEE OSXMMEXCPT
146 idesc64 isrL, 0x0008, 0 ; 0x13, 19, #XF, SSE Fault
185 dw isrR, 0 ; 0x13, 19, #XF, SSE Fault
H A Dxdfprotect.asm120 idesc32 isrP, 0x0008, 0 ; 0x13, 19, #XF, SSE Fault
158 dw isrR, 0 ; 0x13, 19, #XF, SSE Fault
/external/oprofile/events/x86-64/family11h/
H A Dunit_masks63 0x04 Packed SSE & SSE2 instructions
64 0x08 Packed scalar SSE & SSE2 instructions
71 0x02 SSE retype microfaults
72 0x04 SSE reclass microfaults
73 0x08 SSE and x87 microtraps
/external/oprofile/events/x86-64/hammer/
H A Dunit_masks57 0x04 Combined packed SSE & SSE2 instructions
58 0x08 Combined packed scalar SSE & SSE2 instructions
65 0x02 SSE retype microfaults
66 0x04 SSE reclass microfaults
67 0x08 SSE and x87 microtraps
/external/oprofile/events/i386/westmere/
H A Dunit_masks84 0x04 sse_fp SSE and SSE2 FP Uops
86 0x10 sse_fp_packed SSE FP packed Uops
87 0x20 sse_fp_scalar SSE FP scalar Uops
88 0x40 sse_single_precision SSE* FP single precision Uops
89 0x80 sse_double_precision SSE* FP double precision Uops
/external/chromium_org/third_party/libwebp/enc/
H A Dfilter.c302 const double SSE = iw2 * (sxx + syy - 2. * sxy); local
303 if (SSE > kMinValue) return SSE;
/external/webp/src/enc/
H A Dfilter.c302 const double SSE = iw2 * (sxx + syy - 2. * sxy); local
303 if (SSE > kMinValue) return SSE;
/external/clang/lib/CodeGen/
H A DTargetInfo.cpp786 // Otherwise, if the type contains an SSE vector type, the alignment is 16.
1083 SSE, enumerator in enum:__anon15241::X86_64ABIInfo::Class
1106 /// final MEMORY or SSE classes when necessary.
1359 // eightbyte isn't SSE or any other eightbyte isn't SSEUP, the whole
1363 // (d) If SSEUP is not preceded by SSE or SSEUP, it is converted to SSE.
1375 if (AggregateSize > 128 && (Lo != SSE || Hi != SSEUp))
1377 if (Hi == SSEUp && Lo != SSE)
1378 Hi = SSE;
1401 // (f) Otherwise class SSE i
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/external/libvpx/libvpx/vp8/common/ppc/
H A Dvariance_altivec.asm154 ;# r7 unsigned int *SSE
176 ;# r7 unsigned int *SSE

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