/art/test/003-omnibus-opcodes/ |
H A D | build | 23 ${JAVAC} -d classes `find src2 -name '*.java'`
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/art/test/etc/ |
H A D | default-build | 23 if [ -r src2 ]; then 24 ${JAVAC} -d classes `find src2 -name '*.java'`
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/art/compiler/dex/quick/ |
H A D | mir_to_lir-inl.h | 95 inline LIR* Mir2Lir::NewLIR3(int opcode, int dest, int src1, int src2) { argument 100 LIR* insn = RawLIR(current_dalvik_offset_, opcode, dest, src1, src2); 105 inline LIR* Mir2Lir::NewLIR4(int opcode, int dest, int src1, int src2, int info) { argument 110 LIR* insn = RawLIR(current_dalvik_offset_, opcode, dest, src1, src2, info); 115 inline LIR* Mir2Lir::NewLIR5(int opcode, int dest, int src1, int src2, int info1, argument 121 LIR* insn = RawLIR(current_dalvik_offset_, opcode, dest, src1, src2, info1, info2);
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H A D | codegen_util.cc | 900 bool Mir2Lir::EvaluateBranch(Instruction::Code opcode, int32_t src1, int32_t src2) { argument 903 case Instruction::IF_EQ: is_taken = (src1 == src2); break; 904 case Instruction::IF_NE: is_taken = (src1 != src2); break; 905 case Instruction::IF_LT: is_taken = (src1 < src2); break; 906 case Instruction::IF_GE: is_taken = (src1 >= src2); break; 907 case Instruction::IF_GT: is_taken = (src1 > src2); break; 908 case Instruction::IF_LE: is_taken = (src1 <= src2); break; 922 // Convert relation of src1/src2 to src2/src1
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H A D | mir_to_lir.h | 118 int operands[5]; // [0..4] = [dest, src1, src2, extra, extra2]. 267 LIR* NewLIR3(int opcode, int dest, int src1, int src2); 268 LIR* NewLIR4(int opcode, int dest, int src1, int src2, int info); 269 LIR* NewLIR5(int opcode, int dest, int src1, int src2, int info1, int info2); 279 bool EvaluateBranch(Instruction::Code opcode, int src1, int src2); 657 virtual LIR* OpCmpBranch(ConditionCode cond, int src1, int src2,
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/art/compiler/dex/portable/ |
H A D | mir_to_gbc.cc | 297 ::llvm::Value* src1, ::llvm::Value* src2) { 299 DCHECK_EQ(src1->getType(), src2->getType()); 301 case kCondEq: res = irb_->CreateICmpEQ(src1, src2); break; 302 case kCondNe: res = irb_->CreateICmpNE(src1, src2); break; 303 case kCondLt: res = irb_->CreateICmpSLT(src1, src2); break; 304 case kCondGe: res = irb_->CreateICmpSGE(src1, src2); break; 305 case kCondGt: res = irb_->CreateICmpSGT(src1, src2); break; 306 case kCondLe: res = irb_->CreateICmpSLE(src1, src2); break; 318 ::llvm::Value* src2 = GetLLVMValue(rl_src2.orig_sreg); local 319 ::llvm::Value* cond_value = ConvertCompare(cc, src1, src2); 296 ConvertCompare(ConditionCode cc, ::llvm::Value* src1, ::llvm::Value* src2) argument 333 ::llvm::Value* src2; local 346 GenDivModOp(bool is_div, bool is_long, ::llvm::Value* src1, ::llvm::Value* src2) argument 369 GenArithOp(OpKind op, bool is_long, ::llvm::Value* src1, ::llvm::Value* src2) argument 394 ::llvm::Value* src2 = GetLLVMValue(rl_src2.orig_sreg); local 431 ::llvm::Value* src2 = GetLLVMValue(rl_src2.orig_sreg); local 440 ::llvm::Value* src2 = irb_->getInt32(imm); local [all...] |
H A D | mir_to_gbc.h | 109 ::llvm::Value* src1, ::llvm::Value* src2); 115 ::llvm::Value* src2); 117 ::llvm::Value* src2);
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/art/compiler/dex/ |
H A D | arena_bit_vector.h | 99 void Intersect(const ArenaBitVector* src2);
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H A D | ssa_transformation.cc | 436 * Perform dest U= src1 ^ ~src2 440 const ArenaBitVector* src2) { 442 dest->GetStorageSize() != src2->GetStorageSize() || 444 dest->IsExpandable() != src2->IsExpandable()) { 450 dest->GetRawStorage()[idx] |= src1->GetRawStorageWord(idx) & ~(src2->GetRawStorageWord(idx)); 439 ComputeSuccLineIn(ArenaBitVector* dest, const ArenaBitVector* src1, const ArenaBitVector* src2) argument
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H A D | mir_graph.h | 619 const ArenaBitVector* src2);
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/art/compiler/dex/quick/mips/ |
H A D | int_mips.cc | 64 LIR* MipsMir2Lir::OpCmpBranch(ConditionCode cond, int src1, int src2, argument 116 branch = NewLIR2(br_op, src1, src2); 120 NewLIR3(slt_op, t_reg, src2, src1); 122 NewLIR3(slt_op, t_reg, src1, src2);
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H A D | codegen_mips.h | 140 LIR* OpCmpBranch(ConditionCode cond, int src1, int src2, LIR* target);
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/art/compiler/dex/quick/x86/ |
H A D | int_x86.cc | 88 LIR* X86Mir2Lir::OpCmpBranch(ConditionCode cond, int src1, int src2, argument 90 NewLIR2(kX86Cmp32RR, src1, src2);
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H A D | codegen_x86.h | 140 LIR* OpCmpBranch(ConditionCode cond, int src1, int src2, LIR* target);
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/art/compiler/dex/quick/arm/ |
H A D | codegen_arm.h | 139 LIR* OpCmpBranch(ConditionCode cond, int src1, int src2, LIR* target);
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H A D | int_arm.cc | 28 int src2, LIR* target) { 29 OpRegReg(kOpCmp, src1, src2); 250 // Normalize such that if either operand is constant, src2 will be constant. 27 OpCmpBranch(ConditionCode cond, int src1, int src2, LIR* target) argument
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/art/runtime/ |
H A D | debugger.cc | 1027 const uint16_t* src2 = reinterpret_cast<uint16_t*>(a->GetRawData(sizeof(uint16_t))); local 1028 for (int i = 0; i < count; ++i) JDWP::Write2BE(&dst, src2[offset + i]);
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